using System; using System.Runtime.InteropServices; using Vanara.InteropServices; #pragma warning disable CS1591 // Missing XML comment for publicly visible type or member namespace Vanara.PInvoke { /// /// Contains flag bits that are specific to the resource type, as indicated in the following table. Flags can be bitwise-ORed together as appropriate. /// [PInvokeData("wdm.h")] [Flags] public enum CM_RESOURCE : ushort { CM_RESOURCE_INTERRUPT_LEVEL_SENSITIVE = 0x00, CM_RESOURCE_INTERRUPT_LATCHED = 0x01, CM_RESOURCE_INTERRUPT_MESSAGE = 0x02, CM_RESOURCE_INTERRUPT_POLICY_INCLUDED = 0x04, CM_RESOURCE_INTERRUPT_SECONDARY_INTERRUPT = 0x10, CM_RESOURCE_INTERRUPT_WAKE_HINT = 0x20, CM_RESOURCE_INTERRUPT_LEVEL_LATCHED_BITS = 0x0001, CM_RESOURCE_INTERRUPT_MESSAGE_TOKEN = 0xFFFE, CM_RESOURCE_MEMORY_READ_WRITE = 0x0000, CM_RESOURCE_MEMORY_READ_ONLY = 0x0001, CM_RESOURCE_MEMORY_WRITE_ONLY = 0x0002, CM_RESOURCE_MEMORY_WRITEABILITY_MASK = 0x0003, CM_RESOURCE_MEMORY_PREFETCHABLE = 0x0004, CM_RESOURCE_MEMORY_COMBINEDWRITE = 0x0008, CM_RESOURCE_MEMORY_24 = 0x0010, CM_RESOURCE_MEMORY_CACHEABLE = 0x0020, CM_RESOURCE_MEMORY_WINDOW_DECODE = 0x0040, CM_RESOURCE_MEMORY_BAR = 0x0080, CM_RESOURCE_MEMORY_COMPAT_FOR_INACCESSIBLE_RANGE = 0x0100, CM_RESOURCE_MEMORY_LARGE = 0x0E00, CM_RESOURCE_MEMORY_LARGE_40 = 0x0200, CM_RESOURCE_MEMORY_LARGE_48 = 0x0400, CM_RESOURCE_MEMORY_LARGE_64 = 0x0800, CM_RESOURCE_PORT_MEMORY = 0x0000, CM_RESOURCE_PORT_IO = 0x0001, CM_RESOURCE_PORT_10_BIT_DECODE = 0x0004, CM_RESOURCE_PORT_12_BIT_DECODE = 0x0008, CM_RESOURCE_PORT_16_BIT_DECODE = 0x0010, CM_RESOURCE_PORT_POSITIVE_DECODE = 0x0020, CM_RESOURCE_PORT_PASSIVE_DECODE = 0x0040, CM_RESOURCE_PORT_WINDOW_DECODE = 0x0080, CM_RESOURCE_PORT_BAR = 0x0100, CM_RESOURCE_DMA_8 = 0x0000, CM_RESOURCE_DMA_16 = 0x0001, CM_RESOURCE_DMA_32 = 0x0002, CM_RESOURCE_DMA_8_AND_16 = 0x0004, CM_RESOURCE_DMA_BUS_MASTER = 0x0008, CM_RESOURCE_DMA_TYPE_A = 0x0010, CM_RESOURCE_DMA_TYPE_B = 0x0020, CM_RESOURCE_DMA_TYPE_F = 0x0040, CM_RESOURCE_DMA_V3 = 0x0080, DMAV3_TRANFER_WIDTH_8 = 0x00, DMAV3_TRANFER_WIDTH_16 = 0x01, DMAV3_TRANFER_WIDTH_32 = 0x02, DMAV3_TRANFER_WIDTH_64 = 0x03, DMAV3_TRANFER_WIDTH_128 = 0x04, DMAV3_TRANFER_WIDTH_256 = 0x05, CM_RESOURCE_CONNECTION_CLASS_GPIO = 0x01, CM_RESOURCE_CONNECTION_CLASS_SERIAL = 0x02, CM_RESOURCE_CONNECTION_CLASS_FUNCTION_CONFIG = 0x03, CM_RESOURCE_CONNECTION_TYPE_GPIO_IO = 0x02, CM_RESOURCE_CONNECTION_TYPE_SERIAL_I2C = 0x01, CM_RESOURCE_CONNECTION_TYPE_SERIAL_SPI = 0x02, CM_RESOURCE_CONNECTION_TYPE_SERIAL_UART = 0x03, CM_RESOURCE_CONNECTION_TYPE_FUNCTION_CONFIG = 0x01, } /// Indicates whether the described resource can be shared. [PInvokeData("wdm.h")] public enum CM_SHARE_DISPOSITION : byte { /// Undetermined. CmResourceShareUndetermined = 0, /// The device requires exclusive use of the resource. CmResourceShareDeviceExclusive, /// The driver requires exclusive use of the resource. (Not supported for WDM drivers.) CmResourceShareDriverExclusive, /// The resource can be shared without restriction. CmResourceShareShared } /// /// Identifies the resource type. The constant value specified for Type indicates which structure within the u union is valid, as /// indicated in the following table. (These flags are used within both CM_PARTIAL_RESOURCE_DESCRIPTOR and IO_RESOURCE_DESCRIPTOR /// structures, except where noted.) /// [PInvokeData("wdm.h")] [Flags] public enum CmResourceType : byte { /// No value is set. CmResourceTypeNull = 0, /// u.Port CmResourceTypePort = 1, /// /// u.Interrupt or u.MessageInterrupt. If the CM_RESOURCE_INTERRUPT_MESSAGE flag of Flags is set, use u.MessageInterrupt; otherwise, /// use u.Interrupt. /// CmResourceTypeInterrupt = 2, /// u.Memory CmResourceTypeMemory = 3, /// u.Dma (if CM_RESOURCE_DMA_V3 is not set) or u.DmaV3 (if CM_RESOURCE_DMA_V3 flag is set) CmResourceTypeDma = 4, /// u.DeviceSpecificData(Not used within IO_RESOURCE_DESCRIPTOR.) CmResourceTypeDeviceSpecific = 5, /// u.BusNumber CmResourceTypeBusNumber = 6, /// /// One of u.Memory40, u.Memory48, or u.Memory64.The CM_RESOURCE_MEMORY_LARGE_XXX flags set in the Flags member determines which /// structure is used. /// CmResourceTypeMemoryLarge = 7, /// Not used. CmResourceTypeNonArbitrated = 128, /// Reserved for system use. CmResourceTypeConfigData = 128, /// u.DevicePrivate CmResourceTypeDevicePrivate = 129, /// u.DevicePrivate CmResourceTypePcCardConfig = 130, /// u.DevicePrivate CmResourceTypeMfCardConfig = 131, /// u.Connection CmResourceTypeConnection = 132, } /// The INTERFACE_TYPE enumeration indicates the bus type. // https://docs.microsoft.com/en-us/windows-hardware/drivers/ddi/content/wdm/ne-wdm-_interface_type typedef enum _INTERFACE_TYPE { // InterfaceTypeUndefined, Internal, Isa, Eisa, MicroChannel, TurboChannel, PCIBus, VMEBus, NuBus, PCMCIABus, CBus, MPIBus, MPSABus, // ProcessorInternal, InternalPowerBus, PNPISABus, PNPBus, Vmcs, ACPIBus, MaximumInterfaceType } INTERFACE_TYPE, *PINTERFACE_TYPE; [PInvokeData("wdm.h", MSDNShortId = "4d20f3fd-d06e-420b-af69-9ef34addc611")] public enum INTERFACE_TYPE { /// Indicates that the interface type is undefined. InterfaceTypeUndefined = -1, /// For internal use only. Internal, /// Indicates that the interface is published by the ISA bus driver. Isa, /// Indicates that the interface is published by the EISA bus driver. Eisa, /// Indicates that the interface is published by the MicroChannel bus driver. MicroChannel, /// Indicates that the interface is published by the TurboChannel bus driver. TurboChannel, /// Indicates that the interface is published by the PCI bus driver. PCIBus, /// Indicates that the interface is published by the VME bus driver. VMEBus, /// Indicates that the interface is published by the NuBus driver. NuBus, /// Indicates that the interface is published by the PCMCIA bus driver. PCMCIABus, /// Indicates that the interface is published by the Cbus driver. CBus, /// Indicates that the interface is published by the MPI bus driver. MPIBus, /// Indicates that the interface is published by the MPSA bus driver. MPSABus, /// Indicates that the interface is published by the ISA bus driver. ProcessorInternal, /// /// Indicates that the interface is published for an internal power bus. Some devices have power control ports that allow them to /// share power control with other devices. The Windows architecture represents these devices as slots on a virtual bus called an /// "internal power bus." /// InternalPowerBus, /// Indicates that the interface is published by the PNPISA bus driver. PNPISABus, /// Indicates that the interface is published by the PNP bus driver. PNPBus, /// Reserved for use by the operating system. Vmcs, /// /// Indicates that the interface is published by the ACPI bus driver. The ACPI bus driver enumerates devices that are described in /// the ACPI firmware of the hardware platform. These devices might physically reside on buses that are controlled by other bus /// drivers, but the ACPI bus driver must enumerate these devices because the other bus drivers cannot detect them. This interface /// type is defined starting with Windows 8. /// ACPIBus, /// Marks the upper limit of the possible bus types. MaximumInterfaceType, } /// /// /// The CM_FULL_RESOURCE_DESCRIPTOR structure specifies a set of system hardware resources of various types, assigned to a device /// that is connected to a specific bus. This structure is contained within a CM_RESOURCE_LIST structure. /// /// // https://docs.microsoft.com/en-us/windows-hardware/drivers/ddi/content/wdm/ns-wdm-_cm_full_resource_descriptor typedef struct // _CM_FULL_RESOURCE_DESCRIPTOR { INTERFACE_TYPE InterfaceType; ULONG BusNumber; CM_PARTIAL_RESOURCE_LIST PartialResourceList; } // CM_FULL_RESOURCE_DESCRIPTOR, *PCM_FULL_RESOURCE_DESCRIPTOR; [PInvokeData("wdm.h", MSDNShortId = "e405c545-da0c-4b47-84c2-dd26d746da94")] [StructLayout(LayoutKind.Sequential, CharSet = CharSet.Auto)] public struct CM_FULL_RESOURCE_DESCRIPTOR { /// /// Specifies the type of bus to which the device is connected. This must be one of the types defined by INTERFACE_TYPE, in Wdm.h or /// Ntddk.h. (Not used by WDM drivers.) /// public INTERFACE_TYPE InterfaceType; /// /// The system-assigned, driver-supplied, zero-based number of the bus to which the device is connected. (Not used by WDM drivers.) /// public uint BusNumber; /// A CM_PARTIAL_RESOURCE_LIST structure. public CM_PARTIAL_RESOURCE_LIST PartialResourceList; } /// /// The CM_PARTIAL_RESOURCE_DESCRIPTOR structure specifies one or more system hardware resources, of a single type, assigned to a /// device. This structure is used to create an array within a CM_PARTIAL_RESOURCE_LIST structure. /// /// /// A CM_PARTIAL_RESOURCE_DESCRIPTOR structure can describe either a raw (bus-relative) resource or a translated (system physical) /// resource, depending on the routine or IRP with which it is being used. For more information, see Raw and Translated Resources and IRP_MN_START_DEVICE. /// // https://docs.microsoft.com/en-us/windows-hardware/drivers/ddi/content/wdm/ns-wdm-_cm_partial_resource_descriptor typedef struct // _CM_PARTIAL_RESOURCE_DESCRIPTOR { UCHAR Type; UCHAR ShareDisposition; USHORT Flags; union { struct { long Start; ULONG Length; } // Generic; struct { long Start; ULONG Length; } Port; struct { #if ... USHORT Level; USHORT Group; #else ULONG Level; #endif ULONG // Vector; UIntPtr Affinity; } Interrupt; struct { union { struct { USHORT Group; USHORT Reserved; USHORT MessageCount; ULONG Vector; // UIntPtr Affinity; } Raw; struct { #if ... USHORT Level; USHORT Group; #else ULONG Level; #endif ULONG Vector; UIntPtr Affinity; } // Translated; } DUMMYUNIONNAME; } MessageInterrupt; struct { long Start; ULONG Length; } Memory; struct { ULONG Channel; ULONG Port; // ULONG Reserved1; } Dma; struct { ULONG Channel; ULONG RequestLine; UCHAR TransferWidth; UCHAR Reserved1; UCHAR Reserved2; UCHAR // Reserved3; } DmaV3; struct { ULONG Data[3]; } DevicePrivate; struct { ULONG Start; ULONG Length; ULONG Reserved; } BusNumber; struct { // ULONG DataSize; ULONG Reserved1; ULONG Reserved2; } DeviceSpecificData; struct { long Start; ULONG Length40; } Memory40; struct { long // Start; ULONG Length48; } Memory48; struct { long Start; ULONG Length64; } Memory64; struct { UCHAR Class; UCHAR Type; UCHAR Reserved1; // UCHAR Reserved2; ULONG IdLowPart; ULONG IdHighPart; } Connection; } u; } CM_PARTIAL_RESOURCE_DESCRIPTOR, *PCM_PARTIAL_RESOURCE_DESCRIPTOR; [PInvokeData("wdm.h", MSDNShortId = "96bf7bab-b8f5-439c-8717-ea6956ed0213")] [StructLayout(LayoutKind.Sequential)] public struct CM_PARTIAL_RESOURCE_DESCRIPTOR { public const ulong CM_RESOURCE_MEMORY_LARGE_40_MAXLEN = 0x000000FFFFFFFF00; public const ulong CM_RESOURCE_MEMORY_LARGE_48_MAXLEN = 0x0000FFFFFFFF0000; public const ulong CM_RESOURCE_MEMORY_LARGE_64_MAXLEN = 0xFFFFFFFF00000000; /// /// /// Identifies the resource type. The constant value specified for Type indicates which structure within the u union is /// valid, as indicated in the following table. (These flags are used within both CM_PARTIAL_RESOURCE_DESCRIPTOR and /// IO_RESOURCE_DESCRIPTOR structures, except where noted.) /// /// /// /// Type value /// u member substructure /// /// /// CmResourceTypePort /// u.Port /// /// /// CmResourceTypeInterrupt /// /// u.Interrupt or u.MessageInterrupt.If the CM_RESOURCE_INTERRUPT_MESSAGE flag of Flags is set, use u.MessageInterrupt; otherwise, /// use u.Interrupt. /// /// /// /// CmResourceTypeMemory /// u.Memory /// /// /// CmResourceTypeMemoryLarge /// /// One of u.Memory40, u.Memory48, or u.Memory64.The CM_RESOURCE_MEMORY_LARGE_XXX flags set in the Flags member determines which /// structure is used. /// /// /// /// CmResourceTypeDma /// u.Dma (if CM_RESOURCE_DMA_V3 is not set) or u.DmaV3 (if CM_RESOURCE_DMA_V3 flag is set) /// /// /// CmResourceTypeDevicePrivate /// u.DevicePrivate /// /// /// CmResourceTypeBusNumber /// u.BusNumber /// /// /// CmResourceTypeDeviceSpecific /// u.DeviceSpecificData(Not used within IO_RESOURCE_DESCRIPTOR.) /// /// /// CmResourceTypePcCardConfig /// u.DevicePrivate /// /// /// CmResourceTypeMfCardConfig /// u.DevicePrivate /// /// /// CmResourceTypeConnection /// u.Connection /// /// /// CmResourceTypeConfigData /// Reserved for system use. /// /// /// CmResourceTypeNonArbitrated /// Not used. /// /// /// public CmResourceType Type; /// /// Indicates whether the described resource can be shared. Valid constant values are listed in the following table. /// /// /// Value /// Meaning /// /// /// CmResourceShareDeviceExclusive /// The device requires exclusive use of the resource. /// /// /// CmResourceShareDriverExclusive /// The driver requires exclusive use of the resource. (Not supported for WDM drivers.) /// /// /// CmResourceShareShared /// The resource can be shared without restriction. /// /// /// public CM_SHARE_DISPOSITION ShareDisposition; /// /// /// Contains flag bits that are specific to the resource type, as indicated in the following table. Flags can be bitwise-ORed /// together as appropriate. /// /// /// /// Resource type /// Flag /// Definition /// /// /// CmResourceTypePort /// /// /// /// CM_RESOURCE_PORT_MEMORY /// The device is accessed in memory address space. /// /// /// /// CM_RESOURCE_PORT_IO /// The device is accessed in I/O address space. /// /// /// /// CM_RESOURCE_PORT_10_BIT_DECODE /// The device decodes 10 bits of the port address. /// /// /// /// CM_RESOURCE_PORT_12_BIT_DECODE /// The device decodes 12 bits of the port address. /// /// /// /// CM_RESOURCE_PORT_16_BIT_DECODE /// The device decodes 16 bits of the port address. /// /// /// /// CM_RESOURCE_PORT_POSITIVE_DECODE /// /// The device uses "positive decode" instead of "subtractive decode". (In general, PCI devices use positive decode and ISA buses use /// subtractive decode.) /// /// /// /// /// CM_RESOURCE_PORT_PASSIVE_DECODE /// The device decodes the port but the driver does not use it. /// /// /// /// CM_RESOURCE_PORT_WINDOW_DECODE /// /// /// /// CmResourceTypeInterrupt /// /// /// /// CM_RESOURCE_INTERRUPT_LEVEL_SENSITIVE /// The IRQ line is level-triggered. (These IRQs are usually sharable.) /// /// /// /// CM_RESOURCE_INTERRUPT_LATCHED /// The IRQ line is edge-triggered. /// /// /// /// CM_RESOURCE_INTERRUPT_MESSAGE /// /// If this flag is set, the interrupt is a message-signaled interrupt. Otherwise, the interrupt is a line-based interrupt. This flag /// can be set starting with Windows Vista. /// /// /// /// /// CM_RESOURCE_INTERRUPT_POLICY_INCLUDED /// Not used with the CM_PARTIAL_RESOURCE_DESCRIPTOR structure. For more information about this flag, see IO_RESOURCE_DESCRIPTOR. /// /// /// /// CM_RESOURCE_INTERRUPT_SECONDARY_INTERRUPT /// /// The interrupt is a secondary interrupt. This flag can be set starting with Windows 8. For more information about secondary /// interrupts, see GPIO Interrupts. /// /// /// /// /// CM_RESOURCE_INTERRUPT_WAKE_HINT /// /// The interrupt is capable of waking the operating system from a low-power idle state or a system sleep state. This flag can be set /// starting with Windows 8. For more information about wake capabilities, see Enabling Device Wake-Up. /// /// /// /// CmResourceTypeMemory /// /// /// /// CM_RESOURCE_MEMORY_READ_WRITE /// The memory range is readable and writable. /// /// /// /// CM_RESOURCE_MEMORY_READ_ONLY /// The memory range is read-only. /// /// /// /// CM_RESOURCE_MEMORY_WRITE_ONLY /// The memory range is write-only. /// /// /// /// CM_RESOURCE_MEMORY_PREFETCHABLE /// The memory range is prefetchable. /// /// /// /// CM_RESOURCE_MEMORY_COMBINEDWRITE /// Combined-write caching is allowed. /// /// /// /// CM_RESOURCE_MEMORY_24 /// The device uses 24-bit addressing. /// /// /// /// CM_RESOURCE_MEMORY_CACHEABLE /// The memory range is cacheable. /// /// /// CmResourceTypeMemoryLarge /// /// /// /// CM_RESOURCE_MEMORY_LARGE_40 /// The memory descriptor uses the u.Memory40 member. /// /// /// /// CM_RESOURCE_MEMORY_LARGE_48 /// The memory descriptor uses the u.Memory48 member. /// /// /// /// CM_RESOURCE_MEMORY_LARGE_64 /// The memory descriptor uses the u.Memory64 member. /// /// /// CmResourceTypeDma /// /// /// /// CM_RESOURCE_DMA_8 /// 8-bit DMA channel /// /// /// /// CM_RESOURCE_DMA_16 /// 16-bit DMA channel /// /// /// /// CM_RESOURCE_DMA_32 /// 32-bit DMA channel /// /// /// /// CM_RESOURCE_DMA_8_AND_16 /// 8-bit and 16-bit DMA channel /// /// /// /// CM_RESOURCE_DMA_BUS_MASTER /// The device supports bus master DMA transfers. /// /// /// /// CM_RESOURCE_DMA_TYPE_A /// Type A DMA /// /// /// /// CM_RESOURCE_DMA_TYPE_B /// Type B DMA /// /// /// /// CM_RESOURCE_DMA_TYPE_F /// Type F DMA /// /// /// /// CM_RESOURCE_DMA_V3 /// Use the DmaV3 member instead of the Dma member. The DmaV3 member is available starting with Windows 8. /// /// /// public CM_RESOURCE Flags; /// The union public union u; [StructLayout(LayoutKind.Explicit)] public struct union { /// The generic [FieldOffset(0)] public Generic Generic; /// The port [FieldOffset(0)] public Generic Port; /// The interrupt [FieldOffset(0)] public Interrupt Interrupt; /// The message interrupt raw [FieldOffset(0)] public MessageInterruptRaw MessageInterruptRaw; /// The message interrupt translated [FieldOffset(0)] public Interrupt MessageInterruptTranslated; /// The memory [FieldOffset(0)] public Generic Memory; /// The dma [FieldOffset(0)] public Dma Dma; /// The dma v3 [FieldOffset(0)] public DmaV3 DmaV3; /// The device private [FieldOffset(0)] public DevicePrivate DevicePrivate; /// The bus number [FieldOffset(0)] public BusNumber BusNumber; /// The device specific data [FieldOffset(0)] public DeviceSpecificData DeviceSpecificData; /// The memory40 [FieldOffset(0)] public Memory40 Memory40; /// The memory48 [FieldOffset(0)] public Memory48 Memory48; /// The memory64 [FieldOffset(0)] public Memory64 Memory64; /// The connection [FieldOffset(0)] public Connection Connection; } [StructLayout(LayoutKind.Sequential)] public struct Generic { /// /// /// For raw resources: Specifies the bus-relative physical address of the lowest of a range of contiguous I/O port addresses /// allocated to the device. /// /// /// For translated resources: Specifies the system physical address of the lowest of a range of contiguous I/O port addresses /// allocated to the device. /// /// For more information about raw and translated resources, see Remarks. /// public long Start; /// The length, in bytes, of the range of allocated I/O port addresses. public uint Length; } [StructLayout(LayoutKind.Sequential, Pack = 2)] public struct Interrupt { /// The level public ushort Level; /// /// Specifies the processor group number. This member exists only if the NT_PROCESSOR_GROUPS constant is defined at compile time. /// This member can be nonzero only on Windows 7 and later versions of Windows. The Group and Affinity members /// together specify a group affinity that indicates which processors the device can interrupt. To specify an affinity for any /// group, set Group to ALL_PROCESSOR_GROUPS. /// public ushort Group; /// /// For raw resources: Specifies the device's bus-specific interrupt vector (if appropriate for the platform and bus). /// For translated resources: Specifies the global system interrupt vector assigned to the device. /// For more information about raw and translated resources, see Remarks. /// public uint Vector; /// /// Contains a UIntPtr-typed bitmask value indicating the set of processors the device can interrupt. To indicate that the /// device can interrupt any processor, this member is set to -1. /// public UIntPtr Affinity; } [StructLayout(LayoutKind.Sequential, Pack = 2)] public struct MessageInterruptRaw { /// /// Specifies a processor group number. This member exists only if NT_PROCESSOR_GROUPS is defined at compile time. This member /// can be nonzero only on Windows 7 and later versions of Windows. The Group and Affinity members together specify /// a group affinity that indicates which processors can receive the device's interrupts. To specify an affinity for any group, /// set Group to ALL_PROCESSOR_GROUPS. /// public ushort Group; /// Specifies the number of message-signaled interrupts generated for this driver. public ushort MessageCount; /// Specifies the device's interrupt vector. public uint Vector; /// Specifies a UIntPtr value that indicates the processors that receive the device's interrupts. public UIntPtr Affinity; } [StructLayout(LayoutKind.Sequential)] public struct Dma { /// Specifies the number of the DMA channel on a system DMA controller that the device can use. public uint Channel; /// Specifies the number of the DMA port that an MCA-type device can use. public uint Port; /// Not used. public uint Reserved1; } [StructLayout(LayoutKind.Sequential, Pack = 1)] public struct DmaV3 { /// Specifies the number of the DMA channel on the system DMA controller that is allocated to the device. public uint Channel; /// Specifies the number of the request line on the system DMA controller that is allocated to the device. public uint RequestLine; /// /// Specifies the width, in bits, of the data bus that the system DMA controller that is allocated to the device uses to transfer /// data to or from the device. /// public byte TransferWidth; /// Not used. public byte Reserved1; /// Not used. public byte Reserved2; /// Not used. public byte Reserved3; } [StructLayout(LayoutKind.Sequential)] public struct DevicePrivate { private uint data0, data1, data2; /// The data public uint[] Data { get => new[] {data0, data1, data2}; set { data0 = value[0]; data1 = value[1]; data2 = value[2]; } } } [StructLayout(LayoutKind.Sequential)] public struct BusNumber { /// Specifies the lowest-numbered of a range of contiguous buses allocated to the device. public uint Start; /// Specifies the number of buses allocated to the device. public uint Length; /// Not used. public uint Reserved; } [StructLayout(LayoutKind.Sequential)] public struct DeviceSpecificData { /// Specifies the number of bytes appended to the end of the CM_PARTIAL_RESOURCE_DESCRIPTOR structure. public uint DataSize; /// Not used. public uint Reserved1; /// Not used. public uint Reserved2; } [StructLayout(LayoutKind.Sequential)] public struct Memory40 { /// /// /// For raw resources: Specifies the bus-relative physical address of the lowest of a range of contiguous memory addresses that /// are allocated to the device. /// /// /// For translated resources: Specifies the system physical address of the lowest of a range of contiguous memory addresses that /// are allocated to the device. /// /// For more information about raw and translated resources, see Remarks. /// public long Start; /// /// Contains the high 32 bits of the 40-bit length, in bytes, of the range of allocated memory addresses. The lowest 8 bits are /// treated as zero. /// public uint Length40; } [StructLayout(LayoutKind.Sequential)] public struct Memory48 { /// /// /// For raw resources: Specifies the bus-relative physical address of the lowest of a range of contiguous memory addresses that /// are allocated to the device. /// /// /// For translated resources: Specifies the system physical address of the lowest of a range of contiguous memory addresses that /// are allocated to the device. /// /// For more information about raw and translated resources, see Remarks. /// public long Start; /// /// Contains the high 32 bits of the 48-bit length, in bytes, of the range of allocated memory addresses. The lowest 16 bits are /// treated as zero. /// public uint Length48; } [StructLayout(LayoutKind.Sequential)] public struct Memory64 { /// /// /// For raw resources: Specifies the bus-relative physical address of the lowest of a range of contiguous memory addresses that /// are allocated to the device. /// /// /// For translated resources: Specifies the system physical address of the lowest of a range of contiguous memory addresses that /// are allocated to the device. /// /// For more information about raw and translated resources, see Remarks. /// public long Start; /// /// Contains the high 32 bits of the 64-bit length, in bytes, of the range of allocated memory addresses. The lowest 32 bits are /// treated as zero. /// public uint Length64; } [StructLayout(LayoutKind.Sequential, Pack = 1)] public struct Connection { /// /// Specifies the connection class. This member is set to one of the following values. /// /// /// Value /// Meaning /// /// /// CM_RESOURCE_CONNECTION_CLASS_GPIO /// Access the device through one or more pins on a GPIO controller. /// /// /// CM_RESOURCE_CONNECTION_CLASS_SERIAL /// Access the device through a serial bus or serial port. /// /// /// public byte Class; /// /// Specifies the connection type. /// If Class = CM_RESOURCE_CONNECTION_CLASS_GPIO, Type is set to the following value. /// /// /// Value /// Meaning /// /// /// CM_RESOURCE_CONNECTION_TYPE_GPIO_IO /// Access the device through GPIO pins that are configured for I/O. /// /// /// If Class = CM_RESOURCE_CONNECTION_CLASS_SERIAL, Type is set to one of the following values. /// /// /// Value /// Meaning /// /// /// CM_RESOURCE_CONNECTION_TYPE_SERIAL_I2C /// The device is connected to an I²C bus. /// /// /// CM_RESOURCE_CONNECTION_TYPE_SERIAL_SPI /// The device is connected to an SPI bus. /// /// /// CM_RESOURCE_CONNECTION_TYPE_SERIAL_UART /// The device is connected to a serial port. /// /// /// public byte Type; /// Not used. public byte Reserved1; /// Not used. public byte Reserved2; /// Contains the lower 32 bits of the 64-bit connection ID. public uint IdLowPart; /// Contains the upper 32 bits of the 64-bit connection ID. public uint IdHighPart; } } /// /// /// The CM_PARTIAL_RESOURCE_LIST structure specifies a set of system hardware resources, of various types, assigned to a device. /// This structure is contained within a CM_FULL_RESOURCE_DESCRIPTOR structure. /// /// /// /// /// This structure is the header for an array of CM_PARTIAL_RESOURCE_DESCRIPTOR structures. The PartialDescriptors member /// contains the first element in this array, and the Count member specifies the total number of array elements. If the array /// contains more than one element, the remaining elements in the array immediately follow the CM_PARTIAL_RESOURCE_LIST structure /// in memory. The total number of bytes occupied by the CM_PARTIAL_RESOURCE_LIST structure and any array elements that follow /// this structure is sizeof( CM_PARTIAL_RESOURCE_LIST) + ( Count - 1) * sizeof( CM_PARTIAL_RESOURCE_DESCRIPTOR). /// /// // https://docs.microsoft.com/en-us/windows-hardware/drivers/ddi/content/wdm/ns-wdm-_cm_partial_resource_list typedef struct // _CM_PARTIAL_RESOURCE_LIST { USHORT Version; USHORT Revision; ULONG Count; CM_PARTIAL_RESOURCE_DESCRIPTOR PartialDescriptors[1]; } // CM_PARTIAL_RESOURCE_LIST, *PCM_PARTIAL_RESOURCE_LIST; [PInvokeData("wdm.h", MSDNShortId = "f16b26f5-1f32-4c2e-83ec-0a0f79a4be85")] [VanaraMarshaler(typeof(SafeAnysizeStructMarshaler), nameof(Count))] [StructLayout(LayoutKind.Sequential)] public struct CM_PARTIAL_RESOURCE_LIST { /// The version number of this structure. This value should be 1. public ushort Version; /// The revision of this structure. This value should be 1. public ushort Revision; /// The number of elements contained in the PartialDescriptors array. public uint Count; /// The first element in an array of one or more CM_PARTIAL_RESOURCE_DESCRIPTOR structures. [MarshalAs(UnmanagedType.ByValArray, SizeConst = 1)] public CM_PARTIAL_RESOURCE_DESCRIPTOR[] PartialDescriptors; } /// The CM_RESOURCE_LIST structure specifies all of the system hardware resources assigned to a device. /// /// /// This structure describes the assignment of hardware resources to a device. An IRP_MN_START_DEVICE IRP uses this structure to specify /// the resources that the Plug and Play manager assigns to a device. Drivers for legacy devices use this structure to pass their /// resource requirements to the IoReportResourceForDetection routine. For more information about hardware resource allocation, see /// Hardware Resources. /// /// /// The CM_RESOURCE_LIST structure is a header for a larger data structure, of variable size, that contains one or more full /// resource descriptors. All of the data in this larger structure occupies a contiguous block of memory. Each full resource descriptor /// occupies a subblock within the larger block. /// /// /// A full resource descriptor begins with a CM_FULL_RESOURCE_DESCRIPTOR structure, which serves as a header for an array of /// CM_PARTIAL_RESOURCE_DESCRIPTOR structures. The length of this array determines the size of the full resource descriptor. The last /// member in the CM_FULL_RESOURCE_DESCRIPTOR structure is a CM_PARTIAL_RESOURCE_LIST structure that contains, as its last member, /// the first element in this array. If the array contains more than one element, the remaining elements immediately follow, in memory, /// the end of the CM_PARTIAL_RESOURCE_LIST structure, which is also the end of the CM_FULL_RESOURCE_DESCRIPTOR structure. /// /// /// Driver code can use pointer arithmetic to step from one full resource descriptor to the next. For example, if a parameter named list /// is a pointer to the CM_FULL_RESOURCE_DESCRIPTOR structure at the start of one full resource descriptor, list can be updated to /// point to the start of the next full resource descriptor as follows: /// /// /// In this example, is a pointer to the start of the CM_PARTIAL_RESOURCE_DESCRIPTOR array, and is the number of elements in the /// array. For more information about the PartialDescriptors and Count members, see CM_PARTIAL_RESOURCE_LIST. #### Examples /// All PnP drivers must handle IRP_MN_START_DEVICE IRPs. Typically, a driver's handler for this IRP walks the lists of assigned /// resources that are pointed to by the Parameters.StartDevice.AllocatedResources and /// Parameters.StartDevice.AllocatedResourcesTranslated members of the IO_STACK_LOCATION structure in the IRP. The following code /// example contains a function—named GetAssignedResources—that is called in the handler to walk each list. This function verifies that /// the required resources are specified in the list, and configures the device to use the resources. The GetAssignedResources function /// returns TRUE if it succeeds. Otherwise, it returns FALSE (probably from the switch statement, although the /// details are omitted to simplify the code example). /// /// // https://docs.microsoft.com/en-us/windows-hardware/drivers/ddi/content/wdm/ns-wdm-_cm_resource_list typedef struct _CM_RESOURCE_LIST { // ULONG Count; CM_FULL_RESOURCE_DESCRIPTOR List[1]; } CM_RESOURCE_LIST, *PCM_RESOURCE_LIST; [PInvokeData("wdm.h", MSDNShortId = "01f31255-a4f7-4a16-9238-a7391bb850d1")] [VanaraMarshaler(typeof(SafeAnysizeStructMarshaler), nameof(Count))] [StructLayout(LayoutKind.Sequential, CharSet = CharSet.Auto)] public struct CM_RESOURCE_LIST { /// /// The number of full resource descriptors that are specified by this CM_RESOURCE_LIST structure. The List member is /// the header for the first full resource descriptor. For WDM drivers, Count is always 1. /// public uint Count; /// /// The CM_FULL_RESOURCE_DESCRIPTOR structure that serves as the header for the first full resource descriptor. If the /// CM_RESOURCE_LIST structure contains more than one full resource descriptor, the second full resource descriptor /// immediately follows the first in memory, and so on. The size of each full resource descriptor depends on the length of the /// CM_PARTIAL_RESOURCE_DESCRIPTOR array that it contains. For more information, see the following Remarks section. /// [MarshalAs(UnmanagedType.ByValArray, SizeConst = 1)] public CM_FULL_RESOURCE_DESCRIPTOR[] List; } }