Enable core1 && Fix portYield when called in ISR
parent
8f14b9dae3
commit
e4bd4ccaa7
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@ -80,7 +80,7 @@ int os_entry(int (*user_main)(int, char **))
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return -1;
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}
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//core_sync_awaken((uintptr_t)os_entry_core1);
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core_sync_awaken((uintptr_t)os_entry_core1);
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vTaskStartScheduler();
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return param.ret;
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}
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@ -197,7 +197,10 @@ void vPortExitCritical(void)
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void vPortYield()
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{
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core_sync_request(uxPortGetProcessorId(), CORE_SYNC_SWITCH_CONTEXT);
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if (uxPortIsInISR())
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portYIELD_FROM_ISR();
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else
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core_sync_request(uxPortGetProcessorId(), CORE_SYNC_SWITCH_CONTEXT);
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}
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void vPortYieldFromISR(void)
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