Enable core1 && Fix portYield when called in ISR

fix/double
sunnycase 2019-02-14 11:52:24 +08:00
parent 8f14b9dae3
commit e4bd4ccaa7
2 changed files with 5 additions and 2 deletions

View File

@ -80,7 +80,7 @@ int os_entry(int (*user_main)(int, char **))
return -1;
}
//core_sync_awaken((uintptr_t)os_entry_core1);
core_sync_awaken((uintptr_t)os_entry_core1);
vTaskStartScheduler();
return param.ret;
}

View File

@ -197,7 +197,10 @@ void vPortExitCritical(void)
void vPortYield()
{
core_sync_request(uxPortGetProcessorId(), CORE_SYNC_SWITCH_CONTEXT);
if (uxPortIsInISR())
portYIELD_FROM_ISR();
else
core_sync_request(uxPortGetProcessorId(), CORE_SYNC_SWITCH_CONTEXT);
}
void vPortYieldFromISR(void)