126 lines
3.2 KiB
C
126 lines
3.2 KiB
C
/* Copyright 2018 Canaan Inc.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include <devices.h>
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#include <stdio.h>
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#include "project_cfg.h"
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#include "jlt32009a.h"
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#define SPI_CLOCK_RATE 6400000U
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#define WAIT_CYCLE 0U
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enum _instruction_length
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{
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INSTRUCTION_LEN_0 = 0,
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INSTRUCTION_LEN_8 = 8,
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INSTRUCTION_LEN_16 = 16,
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INSTRUCTION_LEN_32 = 32,
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} ;
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enum _address_length
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{
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ADDRESS_LEN_0 = 0,
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ADDRESS_LEN_8 = 8,
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ADDRESS_LEN_16 = 16,
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ADDRESS_LEN_32 = 32,
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} ;
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enum _frame_length
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{
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FRAME_LEN_0 = 0,
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FRAME_LEN_8 = 8,
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FRAME_LEN_16 = 16,
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FRAME_LEN_32 = 32,
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} ;
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handle_t gio;
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handle_t spi0;
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handle_t spi_dfs8;
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handle_t spi_dfs16;
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handle_t spi_dfs32;
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void init_dcx()
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{
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gio = io_open("/dev/gpio0");
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configASSERT(gio);
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gpio_set_drive_mode(gio, DCX_GPIONUM, GPIO_DM_OUTPUT);
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gpio_set_pin_value(gio, DCX_GPIONUM, GPIO_PV_HIGH);
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}
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void set_dcx_control()
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{
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configASSERT(gio);
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gpio_set_pin_value(gio, DCX_GPIONUM, GPIO_PV_LOW);
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}
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void set_dcx_data()
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{
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configASSERT(gio);
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gpio_set_pin_value(gio, DCX_GPIONUM, GPIO_PV_HIGH);
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}
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void spi_control_init()
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{
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spi0 = io_open("/dev/spi0");
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configASSERT(spi0);
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spi_dfs8 = spi_get_device(spi0, SPI_MODE_0, SPI_FF_OCTAL, 1 << SPI_SLAVE_SELECT, FRAME_LEN_8);
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spi_dev_config_non_standard(spi_dfs8, INSTRUCTION_LEN_8, ADDRESS_LEN_0, WAIT_CYCLE, SPI_AITM_AS_FRAME_FORMAT);
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spi_dfs16 = spi_get_device(spi0, SPI_MODE_0, SPI_FF_OCTAL, 1 << SPI_SLAVE_SELECT, FRAME_LEN_16);
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spi_dev_config_non_standard(spi_dfs16, INSTRUCTION_LEN_16, ADDRESS_LEN_0, WAIT_CYCLE, SPI_AITM_AS_FRAME_FORMAT);
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spi_dfs32 = spi_get_device(spi0, SPI_MODE_0, SPI_FF_OCTAL, 1 << SPI_SLAVE_SELECT, FRAME_LEN_32);
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spi_dev_config_non_standard(spi_dfs32, INSTRUCTION_LEN_0, ADDRESS_LEN_32, WAIT_CYCLE, SPI_AITM_AS_FRAME_FORMAT);
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spi_dev_set_clock_rate(spi_dfs8, SPI_CLOCK_RATE);
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spi_dev_set_clock_rate(spi_dfs16, SPI_CLOCK_RATE);
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spi_dev_set_clock_rate(spi_dfs32, SPI_CLOCK_RATE);
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}
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void tft_hard_init(void)
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{
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init_dcx();
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spi_control_init();
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}
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void tft_write_command(uint8_t cmd)
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{
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set_dcx_control();
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io_write(spi_dfs8, (const uint8_t *)(&cmd), 1);
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}
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void tft_write_byte(uint8_t* data_buf, uint32_t length)
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{
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set_dcx_data();
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io_write(spi_dfs8, (const uint8_t *)(data_buf), length);
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}
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void tft_write_half(uint16_t* data_buf, uint32_t length)
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{
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set_dcx_data();
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io_write(spi_dfs16, (const uint8_t *)(data_buf), length * 2);
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}
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void tft_write_word(uint32_t* data_buf, uint32_t length)
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{
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set_dcx_data();
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io_write(spi_dfs32, (const uint8_t *)data_buf, length * 4);
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}
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void tft_fill_data(uint32_t* data_buf, uint32_t length)
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{
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set_dcx_data();
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spi_dev_fill(spi_dfs32, 0, *data_buf, *data_buf, length - 1);
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}
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