229 lines
6.8 KiB
C
229 lines
6.8 KiB
C
/* Copyright 2018 Canaan Inc.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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/*
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* FreeRTOS Kernel V10.0.1
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* Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy of
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* this software and associated documentation files (the "Software"), to deal in
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* the Software without restriction, including without limitation the rights to
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* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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* the Software, and to permit persons to whom the Software is furnished to do so,
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* subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in all
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* copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* http://www.FreeRTOS.org
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* http://aws.amazon.com/freertos
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*
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* 1 tab == 4 spaces!
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*/
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/*-----------------------------------------------------------
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* Implementation of functions defined in portable.h for the RISC-V port.
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*----------------------------------------------------------*/
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/* Scheduler includes. */
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#include "FreeRTOS.h"
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#include "core_sync.h"
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#include "portmacro.h"
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#include "task.h"
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#include <atomic.h>
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#include <clint.h>
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#include <encoding.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <sysctl.h>
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#include <syslog.h>
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extern volatile uintptr_t g_irq_count[portNUM_PROCESSORS];
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/* A variable is used to keep track of the critical section nesting. This
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variable has to be stored as part of the task context and must be initialised to
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a non zero value to ensure interrupts don't inadvertently become unmasked before
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the scheduler starts. As it is stored as part of the task context it will
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automatically be set to 0 when the first task is started. */
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static UBaseType_t uxCriticalNesting[portNUM_PROCESSORS] = { [0 ... portNUM_PROCESSORS - 1] = 0xaaaaaaaa };
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PRIVILEGED_DATA static corelock_t xCoreLock = CORELOCK_INIT;
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UBaseType_t uxCPUClockRate = 390000000;
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/* Contains context when starting scheduler, save all 31 registers */
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#ifdef __gracefulExit
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#error Not ported
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BaseType_t xStartContext[31] = { 0 };
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#endif
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/*
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* Handler for timer interrupt
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*/
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void vPortSysTickHandler(void);
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/*
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* Setup the timer to generate the tick interrupts.
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*/
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void vPortSetupTimer(void);
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/*
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* Used to catch tasks that attempt to return from their implementing function.
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*/
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static void prvTaskExitError(void);
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UBaseType_t uxPortGetProcessorId()
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{
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return (UBaseType_t)read_csr(mhartid);
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}
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UBaseType_t uxPortIsInISR()
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{
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return g_irq_count[uxPortGetProcessorId()] > 0;
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}
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/*-----------------------------------------------------------*/
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/* Sets the next timer interrupt
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* Reads previous timer compare register, and adds tickrate */
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void prvSetNextTimerInterrupt(void)
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{
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UBaseType_t uxPsrId = uxPortGetProcessorId();
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clint->mtimecmp[uxPsrId] = clint->mtime + (configTICK_CLOCK_HZ / configTICK_RATE_HZ);
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}
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/*-----------------------------------------------------------*/
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/* Sets and enable the timer interrupt */
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void vPortSetupTimer(void)
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{
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prvSetNextTimerInterrupt();
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/* Enable timer interupt */
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__asm volatile("csrs mie,%0" ::"r"(0x80));
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}
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/*-----------------------------------------------------------*/
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void handle_irq_m_timer(uintptr_t *regs, uintptr_t cause)
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{
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prvSetNextTimerInterrupt();
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if (xTaskGetSchedulerState() == taskSCHEDULER_NOT_STARTED)
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return;
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/* Increment the RTOS tick. */
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if (xTaskIncrementTick() != pdFALSE)
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vTaskSwitchContext();
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}
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void prvTaskExitError(void)
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{
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/* A function that implements a task must not exit or attempt to return to
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its caller as there is nothing to return to. If a task wants to exit it
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should instead call vTaskDelete( NULL ).
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Artificially force an assert() to be triggered if configASSERT() is
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defined, then stop here so application writers can catch the error. */
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UBaseType_t uxPsrId = uxPortGetProcessorId();
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configASSERT(uxCriticalNesting[uxPsrId] == ~0UL);
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portDISABLE_INTERRUPTS();
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for (;;)
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;
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}
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/*-----------------------------------------------------------*/
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/* Clear current interrupt mask and set given mask */
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void vPortClearInterruptMask(int mask)
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{
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__asm volatile("csrw mie, %0" ::"r"(mask));
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}
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/*-----------------------------------------------------------*/
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/* Set interrupt mask and return current interrupt enable register */
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int vPortSetInterruptMask(void)
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{
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int ret;
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__asm volatile("csrr %0,mie"
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: "=r"(ret));
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__asm volatile("csrc mie,%0" ::"r"(0x888));
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return ret;
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}
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/*-----------------------------------------------------------*/
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/*
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* See header file for description.
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*/
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StackType_t *pxPortInitialiseStack(StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters)
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{
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/* Simulate the stack frame as it would be created by a context switch
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interrupt. */
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pxTopOfStack -= NUM_XCEPT_REGS;
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memset(pxTopOfStack, 0, sizeof(StackType_t) * NUM_XCEPT_REGS);
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pxTopOfStack[REG_RA] = (portSTACK_TYPE)prvTaskExitError; /* Register ra */
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pxTopOfStack[REG_SP] = (portSTACK_TYPE)pxTopOfStack;
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pxTopOfStack[REG_A0] = (portSTACK_TYPE)pvParameters; /* Register a0 */
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pxTopOfStack[REG_EPC] = (portSTACK_TYPE)pxCode; /* Register mepc */
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return pxTopOfStack;
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}
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void vPortEnterCritical(void)
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{
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vTaskEnterCritical();
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corelock_lock(&xCoreLock);
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}
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void vPortExitCritical(void)
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{
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corelock_unlock(&xCoreLock);
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vTaskExitCritical();
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}
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void vPortYield()
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{
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core_sync_request(uxPortGetProcessorId(), CORE_SYNC_SWITCH_CONTEXT);
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}
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void vPortYieldFromISR(void)
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{
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vTaskSwitchContext();
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}
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void vPortFatal(const char *file, int line, const char *message)
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{
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portDISABLE_INTERRUPTS();
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corelock_lock(&xCoreLock);
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LOGE("FreeRTOS", "(%s:%d) %s", file, line, message);
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while (1)
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;
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exit(-1);
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while (1)
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;
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}
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UBaseType_t uxPortGetCPUClock()
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{
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return uxCPUClockRate;
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}
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void vPortDebugBreak(void)
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{
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asm volatile("sbreak");
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}
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