394 lines
13 KiB
C
394 lines
13 KiB
C
/* Copyright 2018 Canaan Inc.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include <syslog.h>
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#include "io.h"
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#include "plic.h"
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#include "stddef.h"
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#include "sysctl.h"
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#include "timer.h"
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#include "utils.h"
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/**
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* @brief Private definitions for the timer instance
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*/
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typedef struct timer_instance
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{
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timer_callback_t callback;
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void *ctx;
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bool single_shot;
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} timer_instance_t;
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volatile timer_instance_t timer_instance[TIMER_DEVICE_MAX][TIMER_CHANNEL_MAX];
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volatile kendryte_timer_t *const timer[3] =
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{
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(volatile kendryte_timer_t *)TIMER0_BASE_ADDR,
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(volatile kendryte_timer_t *)TIMER1_BASE_ADDR,
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(volatile kendryte_timer_t *)TIMER2_BASE_ADDR};
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void timer_init(timer_device_number_t timer_number)
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{
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for(size_t i = 0; i < TIMER_CHANNEL_MAX; i++)
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timer_instance[timer_number][i] = (const timer_instance_t){
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.callback = NULL,
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.ctx = NULL,
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.single_shot = 0,
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};
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sysctl_clock_enable(SYSCTL_CLOCK_TIMER0 + timer_number);
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}
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void timer_set_clock_div(timer_device_number_t timer_number, uint32_t div)
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{
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sysctl_clock_set_threshold(timer_number == 0 ? SYSCTL_THRESHOLD_TIMER0 : timer_number == 1 ? SYSCTL_THRESHOLD_TIMER1 : SYSCTL_THRESHOLD_TIMER2, div);
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}
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void timer_enable(timer_device_number_t timer_number, timer_channel_number_t channel)
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{
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timer[timer_number]->channel[channel].control |= TIMER_CR_ENABLE;
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}
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void timer_disable(timer_device_number_t timer_number, timer_channel_number_t channel)
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{
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timer[timer_number]->channel[channel].control &= (~TIMER_CR_ENABLE);
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}
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void timer_enable_pwm(timer_device_number_t timer_number, timer_channel_number_t channel)
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{
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timer[timer_number]->channel[channel].control |= TIMER_CR_PWM_ENABLE;
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}
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void timer_disable_pwm(timer_device_number_t timer_number, timer_channel_number_t channel)
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{
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timer[timer_number]->channel[channel].control &= (~TIMER_CR_PWM_ENABLE);
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}
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void timer_enable_interrupt(timer_device_number_t timer_number, timer_channel_number_t channel)
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{
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timer[timer_number]->channel[channel].control &= (~TIMER_CR_INTERRUPT_MASK);
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}
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void timer_disable_interrupt(timer_device_number_t timer_number, timer_channel_number_t channel)
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{
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timer[timer_number]->channel[channel].control |= TIMER_CR_INTERRUPT_MASK;
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}
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void timer_set_mode(timer_device_number_t timer_number, timer_channel_number_t channel, uint32_t mode)
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{
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timer[timer_number]->channel[channel].control &= (~TIMER_CR_MODE_MASK);
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timer[timer_number]->channel[channel].control |= mode;
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}
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void timer_set_reload(timer_device_number_t timer_number, timer_channel_number_t channel, uint32_t count)
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{
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timer[timer_number]->channel[channel].load_count = count;
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}
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void timer_set_reload2(timer_device_number_t timer_number, timer_channel_number_t channel, uint32_t count)
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{
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timer[timer_number]->load_count2[channel] = count;
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}
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uint32_t timer_get_count(timer_device_number_t timer_number, timer_channel_number_t channel)
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{
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return timer[timer_number]->channel[channel].current_value;
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}
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uint32_t timer_get_reload(timer_device_number_t timer_number, timer_channel_number_t channel)
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{
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return timer[timer_number]->channel[channel].load_count;
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}
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uint32_t timer_get_reload2(timer_device_number_t timer_number, timer_channel_number_t channel)
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{
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return timer[timer_number]->load_count2[channel];
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}
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uint32_t timer_get_interrupt_status(timer_device_number_t timer_number)
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{
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return timer[timer_number]->intr_stat;
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}
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uint32_t timer_get_raw_interrupt_status(timer_device_number_t timer_number)
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{
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return timer[timer_number]->raw_intr_stat;
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}
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uint32_t timer_channel_get_interrupt_status(timer_device_number_t timer_number, timer_channel_number_t channel)
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{
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return timer[timer_number]->channel[channel].intr_stat;
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}
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void timer_clear_interrupt(timer_device_number_t timer_number)
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{
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timer[timer_number]->eoi = timer[timer_number]->eoi;
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}
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void timer_channel_clear_interrupt(timer_device_number_t timer_number, timer_channel_number_t channel)
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{
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timer[timer_number]->channel[channel].eoi = timer[timer_number]->channel[channel].eoi;
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}
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void timer_set_enable(timer_device_number_t timer_number, timer_channel_number_t channel, uint32_t enable)
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{
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if(enable)
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timer[timer_number]->channel[channel].control = TIMER_CR_USER_MODE | TIMER_CR_ENABLE;
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else
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timer[timer_number]->channel[channel].control = TIMER_CR_INTERRUPT_MASK;
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}
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size_t timer_set_interval(timer_device_number_t timer_number, timer_channel_number_t channel, size_t nanoseconds)
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{
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uint32_t clk_freq = sysctl_clock_get_freq(SYSCTL_CLOCK_TIMER0 + timer_number);
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double min_step = 1e9 / clk_freq;
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size_t value = (size_t)(nanoseconds / min_step);
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configASSERT(value > 0 && value < UINT32_MAX);
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timer[timer_number]->channel[channel].load_count = (uint32_t)value;
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return (size_t)(min_step * value);
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}
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typedef void (*timer_ontick)();
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timer_ontick time_irq[3][4] = {NULL};
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static int timer_isr(void *parm)
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{
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uint32_t timer_number;
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for(timer_number = 0; timer_number < 3; timer_number++)
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{
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if(parm == timer[timer_number])
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break;
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}
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uint32_t channel = timer[timer_number]->intr_stat;
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size_t i = 0;
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for(i = 0; i < 4; i++)
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{
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if(channel & 1)
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{
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if(time_irq[timer_number][i])
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(time_irq[timer_number][i])();
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break;
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}
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channel >>= 1;
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}
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readl(&timer[timer_number]->eoi);
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return 0;
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}
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void timer_set_irq(timer_device_number_t timer_number, timer_channel_number_t channel, void (*func)(), uint32_t priority)
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{
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time_irq[timer_number][channel] = func;
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if(channel < 2)
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{
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plic_set_priority(IRQN_TIMER0A_INTERRUPT + timer_number * 2, priority);
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plic_irq_register(IRQN_TIMER0A_INTERRUPT + timer_number * 2, timer_isr, (void *)timer[timer_number]);
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plic_irq_enable(IRQN_TIMER0A_INTERRUPT + timer_number * 2);
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} else
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{
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plic_set_priority(IRQN_TIMER0B_INTERRUPT + timer_number * 2, priority);
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plic_irq_register(IRQN_TIMER0B_INTERRUPT + timer_number * 2, timer_isr, (void *)timer[timer_number]);
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plic_irq_enable(IRQN_TIMER0B_INTERRUPT + timer_number * 2);
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}
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}
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/**
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* @brief Get the timer irqn by device and channel object
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*
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* @note Internal function, not public
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* @param device The device
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* @param channel The channel
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* @return plic_irq_t IRQ number
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*/
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static plic_irq_t get_timer_irqn_by_device_and_channel(timer_device_number_t device, timer_channel_number_t channel)
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{
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if(device < TIMER_DEVICE_MAX && channel < TIMER_CHANNEL_MAX)
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{
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/*
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* Select timer interrupt part
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* Hierarchy of Timer interrupt to PLIC
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* +---------+ +-----------+
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* | 0+----+ | |
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* | | +--+0A |
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* | 1+----+ | |
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* | TIMER0 | | |
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* | 2+----+ | |
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* | | +--+0B |
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* | 3+----+ | |
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* +---------+ | |
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* | |
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* +---------+ | |
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* | 0+----+ | |
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* | | +--+1A |
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* | 1+----+ | |
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* | TIMER1 | | PLIC |
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* | 2+----+ | |
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* | | +--+1B |
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* | 3+----+ | |
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* +---------+ | |
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* | |
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* +---------+ | |
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* | 0+----+ | |
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* | | +--+2A |
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* | 1+----+ | |
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* | TIMER2 | | |
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* | 2+----+ | |
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* | | +--+2B |
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* | 3+----+ | |
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* +---------+ +-----------+
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*
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*/
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if(channel < 2)
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{
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/* It is part A interrupt, offset + 0 */
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return IRQN_TIMER0A_INTERRUPT + device * 2;
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} else
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{
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/* It is part B interrupt, offset + 1 */
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return IRQN_TIMER0B_INTERRUPT + device * 2;
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}
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}
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return IRQN_NO_INTERRUPT;
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}
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/**
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* @brief Process user callback function
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*
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* @note Internal function, not public
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* @param device The timer device
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* @param ctx The context
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* @return int The callback result
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*/
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static int timer_interrupt_handler(timer_device_number_t device, void *ctx)
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{
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uint32_t channel_int_stat = timer[device]->intr_stat;
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for(size_t i = 0; i < TIMER_CHANNEL_MAX; i++)
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{
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/* Check every bit for interrupt status */
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if(channel_int_stat & 1)
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{
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if(timer_instance[device][i].callback)
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{
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/* Process user callback function */
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timer_instance[device][i].callback(timer_instance[device][i].ctx);
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/* Check if this timer is a single shot timer */
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if(timer_instance[device][i].single_shot)
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{
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/* Single shot timer, disable it */
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timer_set_enable(device, i, 0);
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}
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}
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/* Clear timer interrupt flag for specific channel */
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readl(&timer[device]->channel[i].eoi);
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}
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channel_int_stat >>= 1;
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}
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/*
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* NOTE:
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* Don't read timer[device]->eoi here, or you will lost some interrupt
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* readl(&timer[device]->eoi);
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*/
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return 0;
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}
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/**
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* @brief Callback function bus for timer interrupt
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*
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* @note Internal function, not public
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* @param ctx The context
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* @return int The callback result
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*/
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static int timer0_interrupt_callback(void *ctx)
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{
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return timer_interrupt_handler(TIMER_DEVICE_0, ctx);
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}
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/**
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* @brief Callback function bus for timer interrupt
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*
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* @note Internal function, not public
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* @param ctx The context
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* @return int The callback result
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*/
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static int timer1_interrupt_callback(void *ctx)
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{
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return timer_interrupt_handler(TIMER_DEVICE_1, ctx);
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}
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/**
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* @brief Callback function bus for timer interrupt
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*
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* @note Internal function, not public
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* @param ctx The context
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* @return int The callback result
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*/
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static int timer2_interrupt_callback(void *ctx)
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{
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return timer_interrupt_handler(TIMER_DEVICE_2, ctx);
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}
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int timer_irq_register(timer_device_number_t device, timer_channel_number_t channel, int is_single_shot, uint32_t priority, timer_callback_t callback, void *ctx)
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{
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if(device < TIMER_DEVICE_MAX && channel < TIMER_CHANNEL_MAX)
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{
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plic_irq_t irq_number = get_timer_irqn_by_device_and_channel(device, channel);
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plic_irq_callback_t plic_irq_callback[TIMER_DEVICE_MAX] = {
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timer0_interrupt_callback,
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timer1_interrupt_callback,
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timer2_interrupt_callback,
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};
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timer_instance[device][channel] = (const timer_instance_t){
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.callback = callback,
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.ctx = ctx,
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.single_shot = is_single_shot,
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};
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plic_set_priority(irq_number, priority);
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plic_irq_register(irq_number, plic_irq_callback[device], (void *)&timer_instance[device]);
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plic_irq_enable(irq_number);
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return 0;
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}
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return -1;
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}
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int timer_irq_unregister(timer_device_number_t device, timer_channel_number_t channel)
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{
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if(device < TIMER_DEVICE_MAX && channel < TIMER_CHANNEL_MAX)
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{
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timer_instance[device][channel] = (const timer_instance_t){
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.callback = NULL,
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.ctx = NULL,
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.single_shot = 0,
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};
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/* Combine 0 and 1 to A interrupt, 2 and 3 to B interrupt */
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if((!(timer_instance[device][TIMER_CHANNEL_0].callback ||
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timer_instance[device][TIMER_CHANNEL_1].callback)) ||
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(!(timer_instance[device][TIMER_CHANNEL_2].callback ||
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timer_instance[device][TIMER_CHANNEL_3].callback)))
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{
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plic_irq_t irq_number = get_timer_irqn_by_device_and_channel(device, channel);
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plic_irq_unregister(irq_number);
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}
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return 0;
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}
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return -1;
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} |