112 lines
2.8 KiB
C
112 lines
2.8 KiB
C
/* Copyright 2018 Canaan Inc.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include <stdlib.h>
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#include "atomic.h"
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#include "clint.h"
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#include "dmac.h"
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#include "entry.h"
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#include "fpioa.h"
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#include "platform.h"
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#include "plic.h"
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#include "sysctl.h"
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#include "syslog.h"
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#include "uart.h"
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#include "syscalls.h"
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extern volatile uint64_t g_wake_up[2];
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core_instance_t core1_instance;
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volatile char * const ram = (volatile char*)RAM_BASE_ADDR;
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extern char _heap_start[];
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extern char _heap_end[];
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void thread_entry(int core_id)
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{
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while (!atomic_read(&g_wake_up[core_id]));
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}
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void core_enable(int core_id)
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{
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clint_ipi_send(core_id);
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atomic_set(&g_wake_up[core_id], 1);
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}
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int register_core1(core_function func, void *ctx)
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{
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if(func == NULL)
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return -1;
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core1_instance.callback = func;
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core1_instance.ctx = ctx;
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core_enable(1);
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return 0;
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}
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int __attribute__((weak)) os_entry(int core_id, int number_of_cores, int (*user_main)(int, char**))
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{
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/* Call main if there is no OS */
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return user_main(0, 0);
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}
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void _init_bsp(int core_id, int number_of_cores)
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{
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extern int main(int argc, char* argv[]);
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extern void __libc_init_array(void);
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extern void __libc_fini_array(void);
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if (core_id == 0)
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{
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/* Initialize bss data to 0 */
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init_bss();
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/* Init UART */
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fpioa_set_function(4, FUNC_UART3_RX);
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fpioa_set_function(5, FUNC_UART3_TX);
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uart_debug_init(UART_DEVICE_3);
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/* Init FPIOA */
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fpioa_init();
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/* Register finalization function */
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atexit(__libc_fini_array);
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/* Init libc array for C++ */
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__libc_init_array();
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/* Get reset status */
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sysctl_get_reset_status();
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/* Init plic */
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plic_init();
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/* Enable global interrupt */
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sysctl_enable_irq();
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}
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int ret = 0;
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if (core_id == 0)
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{
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core1_instance.callback = NULL;
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core1_instance.ctx = NULL;
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ret = os_entry(core_id, number_of_cores, main);
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}
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else
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{
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plic_init();
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sysctl_enable_irq();
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thread_entry(core_id);
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if(core1_instance.callback == NULL)
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asm volatile ("wfi");
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else
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ret = core1_instance.callback(core1_instance.ctx);
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}
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exit(ret);
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}
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