264 lines
7.7 KiB
C++
264 lines
7.7 KiB
C++
/* Copyright 2019-2020 Canaan Inc.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#pragma once
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#include <array>
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#include <cstdint>
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#ifdef __riscv64
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#define NNCASE_TARGET_K210_SIMULATOR 0
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#include <kpu.h>
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#else
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#define NNCASE_TARGET_K210_SIMULATOR 1
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#endif
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namespace nncase
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{
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namespace runtime
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{
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namespace k210
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{
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#if NNCASE_TARGET_K210_SIMULATOR
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typedef struct
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{
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union {
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uint64_t reg;
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struct
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{
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uint64_t int_en : 1;
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uint64_t ram_flag : 1;
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uint64_t full_add : 1;
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uint64_t depth_wise_layer : 1;
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uint64_t reserved : 60;
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} data;
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} interrupt_enabe;
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union {
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uint64_t reg;
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struct
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{
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uint64_t image_src_addr : 15;
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uint64_t reserved0 : 17;
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uint64_t image_dst_addr : 15;
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uint64_t reserved1 : 17;
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} data;
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} image_addr;
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union {
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uint64_t reg;
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struct
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{
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uint64_t i_ch_num : 10;
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uint64_t reserved0 : 22;
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uint64_t o_ch_num : 10;
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uint64_t reserved1 : 6;
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uint64_t o_ch_num_coef : 10;
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uint64_t reserved2 : 6;
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} data;
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} image_channel_num;
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union {
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uint64_t reg;
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struct
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{
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uint64_t i_row_wid : 10;
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uint64_t i_col_high : 9;
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uint64_t reserved0 : 13;
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uint64_t o_row_wid : 10;
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uint64_t o_col_high : 9;
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uint64_t reserved1 : 13;
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} data;
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} image_size;
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union {
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uint64_t reg;
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struct
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{
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uint64_t kernel_type : 3;
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uint64_t pad_type : 1;
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uint64_t pool_type : 4;
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uint64_t first_stride : 1;
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uint64_t bypass_conv : 1;
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uint64_t load_para : 1;
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uint64_t reserved0 : 5;
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uint64_t dma_burst_size : 8;
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uint64_t pad_value : 8;
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uint64_t bwsx_base_addr : 32;
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} data;
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} kernel_pool_type_cfg;
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union {
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uint64_t reg;
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struct
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{
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uint64_t load_coor : 1;
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uint64_t load_time : 6;
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uint64_t reserved0 : 8;
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uint64_t para_size : 17;
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uint64_t para_start_addr : 32;
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} data;
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} kernel_load_cfg;
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union {
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uint64_t reg;
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struct
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{
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uint64_t coef_column_offset : 4;
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uint64_t coef_row_offset : 12;
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uint64_t reserved0 : 48;
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} data;
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} kernel_offset;
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union {
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uint64_t reg;
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struct
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{
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uint64_t channel_switch_addr : 15;
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uint64_t reserved : 1;
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uint64_t row_switch_addr : 4;
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uint64_t coef_size : 8;
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uint64_t coef_group : 3;
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uint64_t load_act : 1;
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uint64_t active_addr : 32;
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} data;
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} kernel_calc_type_cfg;
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union {
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uint64_t reg;
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struct
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{
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uint64_t wb_channel_switch_addr : 15;
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uint64_t reserved0 : 1;
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uint64_t wb_row_switch_addr : 4;
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uint64_t wb_group : 3;
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uint64_t reserved1 : 41;
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} data;
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} write_back_cfg;
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union {
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uint64_t reg;
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struct
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{
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uint64_t shr_w : 4;
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uint64_t shr_x : 4;
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uint64_t arg_w : 24;
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uint64_t arg_x : 24;
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uint64_t reserved0 : 8;
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} data;
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} conv_value;
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union {
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uint64_t reg;
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struct
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{
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uint64_t arg_add : 40;
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uint64_t reserved : 24;
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} data;
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} conv_value2;
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union {
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uint64_t reg;
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struct
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{
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uint64_t send_data_out : 1;
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uint64_t reserved : 15;
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uint64_t channel_byte_num : 16;
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uint64_t dma_total_byte : 32;
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} data;
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} dma_parameter;
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} kpu_layer_argument_t;
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typedef struct
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{
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union {
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uint64_t reg;
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struct
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{
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uint64_t shift_number : 8;
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uint64_t y_mul : 16;
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uint64_t x_start : 36;
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} data;
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} activate_para[16];
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union {
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uint64_t reg;
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struct
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{
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uint8_t result_bias[8];
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} data;
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} activate_para_bias0;
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union {
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uint64_t reg;
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struct
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{
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uint8_t result_bias[8];
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} data;
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} activate_para_bias1;
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} kpu_activate_table_t;
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#endif
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typedef struct
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{
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union {
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uint64_t reg;
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struct
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{
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uint64_t norm_mul : 24;
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uint64_t norm_add : 32;
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uint64_t norm_shift : 4;
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} data;
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} batchnorm;
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} kpu_batchnorm_argument_t;
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typedef enum _kpu_filter_type
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{
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kpu_filter_1x1 = 0,
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kpu_filter_3x3 = 1
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} kpu_filter_type_t;
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typedef enum _kpu_pool_type
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{
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kpu_pool_bypass = 0,
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kpu_pool_max_2_s2 = 1,
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kpu_pool_mean_2_s2 = 2,
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kpu_pool_max_4_s4 = 3,
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kpu_pool_mean_4_s4 = 4,
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kpu_pool_left_top_2_s2 = 5,
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kpu_pool_right_top_2_s2 = 6,
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kpu_pool_left_top_4_s4 = 7,
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kpu_pool_mean_2_s1 = 8,
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kpu_pool_max_2_s1 = 9
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} kpu_pool_type_t;
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struct kpu_batchnorm_segment
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{
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int32_t mul;
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int32_t shift;
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int32_t add;
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};
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struct kpu_activation_segment
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{
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int64_t start_x;
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int32_t mul;
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int32_t shift;
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int32_t add;
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};
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using kpu_activation_table_t = std::array<kpu_activation_segment, 16>;
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}
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}
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}
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