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kendryte-standalone-sdk
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create format rule and reformat

reformat
GongT 2019-05-31 20:30:41 +08:00
parent e2dd551e09
commit 804a11f92d
68 changed files with 7997 additions and 8571 deletions
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42
.clang-format Normal file
View File

@ -0,0 +1,42 @@
---
Language: Cpp
BasedOnStyle: LLVM
UseTab: Never
#AlignConsecutiveMacros: true
AlignTrailingComments: true
IndentWidth: 4
TabWidth: 4
AllowShortIfStatementsOnASingleLine: false
IndentCaseLabels: false
ColumnLimit: 0
AccessModifierOffset: -4
BreakBeforeBraces: Custom
IncludeCategories:
- Regex: '^<'
Priority: 1
- Regex: '.*'
Priority: 50
- Regex: '^"'
Priority: 99
IncludeIsMainRegex: "^$"
IndentCaseLabels: true
SpaceBeforeParens: Never
BraceWrapping:
# AfterCaseLabel: true
AfterClass: true
AfterControlStatement: true
AfterEnum: true
AfterFunction: true
AfterNamespace: true
AfterObjCDeclaration: true
AfterStruct: true
AfterUnion: true
AfterExternBlock: false
BeforeCatch: false
BeforeElse: false
IndentBraces: false
SplitEmptyFunction: true
SplitEmptyRecord: true
SplitEmptyNamespace: true
...

1
lib/bsp/entry.c
View File

@ -34,4 +34,3 @@ void __attribute__((weak)) _fini(void)
* These don't have to do anything since we use init_array/fini_array.
*/
}

21
lib/bsp/entry_user.c
View File

@ -21,23 +21,24 @@
#include "fpioa.h"
#include "platform.h"
#include "plic.h"
#include "syscalls.h"
#include "sysctl.h"
#include "syslog.h"
#include "uart.h"
#include "syscalls.h"
extern volatile uint64_t g_wake_up[2];
core_instance_t core1_instance;
volatile char * const ram = (volatile char*)RAM_BASE_ADDR;
volatile char *const ram = (volatile char *)RAM_BASE_ADDR;
extern char _heap_start[];
extern char _heap_end[];
void thread_entry(int core_id)
{
while (!atomic_read(&g_wake_up[core_id]));
while(!atomic_read(&g_wake_up[core_id]))
;
}
void core_enable(int core_id)
@ -56,7 +57,7 @@ int register_core1(core_function func, void *ctx)
return 0;
}
int __attribute__((weak)) os_entry(int core_id, int number_of_cores, int (*user_main)(int, char**))
int __attribute__((weak)) os_entry(int core_id, int number_of_cores, int (*user_main)(int, char **))
{
/* Call main if there is no OS */
return user_main(0, 0);
@ -64,11 +65,11 @@ int __attribute__((weak)) os_entry(int core_id, int number_of_cores, int (*user_
void _init_bsp(int core_id, int number_of_cores)
{
extern int main(int argc, char* argv[]);
extern int main(int argc, char *argv[]);
extern void __libc_init_array(void);
extern void __libc_fini_array(void);
if (core_id == 0)
if(core_id == 0)
{
/* Initialize bss data to 0 */
init_bss();
@ -91,19 +92,18 @@ void _init_bsp(int core_id, int number_of_cores)
}
int ret = 0;
if (core_id == 0)
if(core_id == 0)
{
core1_instance.callback = NULL;
core1_instance.ctx = NULL;
ret = os_entry(core_id, number_of_cores, main);
}
else
} else
{
plic_init();
sysctl_enable_irq();
thread_entry(core_id);
if(core1_instance.callback == NULL)
asm volatile ("wfi");
asm volatile("wfi");
else
ret = core1_instance.callback(core1_instance.ctx);
}
@ -114,4 +114,3 @@ int pthread_setcancelstate(int __state, int *__oldstate)
{
return 0;
}

44
lib/bsp/include/atomic.h
View File

@ -20,7 +20,6 @@
extern "C" {
#endif
#define SPINLOCK_INIT \
{ \
0 \
@ -33,7 +32,6 @@ extern "C" {
.core = -1 \
}
/* Defination of memory barrier macro */
#define mb() \
{ \
@ -41,8 +39,8 @@ extern "C" {
: "memory"); \
}
#define atomic_set(ptr, val) (*(volatile typeof(*(ptr))*)(ptr) = val)
#define atomic_read(ptr) (*(volatile typeof(*(ptr))*)(ptr))
#define atomic_set(ptr, val) (*(volatile typeof(*(ptr)) *)(ptr) = val)
#define atomic_read(ptr) (*(volatile typeof(*(ptr)) *)(ptr))
#ifndef __riscv_atomic
#error "atomic extension is required."
@ -64,7 +62,6 @@ typedef struct _semaphore
int waiting;
} semaphore_t;
typedef struct _corelock
{
spinlock_t lock;
@ -82,7 +79,8 @@ static inline int spinlock_trylock(spinlock_t *lock)
static inline void spinlock_lock(spinlock_t *lock)
{
while (spinlock_trylock(lock));
while(spinlock_trylock(lock))
;
}
static inline void spinlock_unlock(spinlock_t *lock)
@ -90,7 +88,7 @@ static inline void spinlock_unlock(spinlock_t *lock)
/* Use memory barrier to keep coherency */
mb();
atomic_set(&lock->lock, 0);
asm volatile ("nop");
asm volatile("nop");
}
static inline void semaphore_signal(semaphore_t *semaphore, int i)
@ -103,10 +101,10 @@ static inline void semaphore_signal(semaphore_t *semaphore, int i)
static inline void semaphore_wait(semaphore_t *semaphore, int i)
{
atomic_add(&(semaphore->waiting), 1);
while (1)
while(1)
{
spinlock_lock(&(semaphore->lock));
if (semaphore->count >= i)
if(semaphore->count >= i)
{
semaphore->count -= i;
atomic_add(&(semaphore->waiting), -1);
@ -144,20 +142,18 @@ static inline int corelock_trylock(corelock_t *lock)
return -1;
}
if (lock->count == 0)
if(lock->count == 0)
{
/* First time get lock */
lock->count++;
lock->core = core;
res = 0;
}
else if (lock->core == core)
} else if(lock->core == core)
{
/* Same core get lock */
lock->count++;
res = 0;
}
else
} else
{
/* Different core get lock */
res = -1;
@ -175,27 +171,25 @@ static inline void corelock_lock(corelock_t *lock)
: "=r"(core));
spinlock_lock(&lock->lock);
if (lock->count == 0)
if(lock->count == 0)
{
/* First time get lock */
lock->count++;
lock->core = core;
}
else if (lock->core == core)
} else if(lock->core == core)
{
/* Same core get lock */
lock->count++;
}
else
} else
{
/* Different core get lock */
spinlock_unlock(&lock->lock);
do
{
while (atomic_read(&lock->count))
while(atomic_read(&lock->count))
;
} while (corelock_trylock(lock));
} while(corelock_trylock(lock));
return;
}
spinlock_unlock(&lock->lock);
@ -209,17 +203,16 @@ static inline void corelock_unlock(corelock_t *lock)
: "=r"(core));
spinlock_lock(&lock->lock);
if (lock->core == core)
if(lock->core == core)
{
/* Same core release lock */
lock->count--;
if (lock->count <= 0)
if(lock->count <= 0)
{
lock->core = -1;
lock->count = 0;
}
}
else
} else
{
/* Different core release lock */
spinlock_unlock(&lock->lock);
@ -241,4 +234,3 @@ static inline void corelock_unlock(corelock_t *lock)
#endif
#endif /* _BSP_ATOMIC_H */

6
lib/bsp/include/bsp.h
View File

@ -1,9 +1,9 @@
#ifndef _KENDRYTE_BSP_H
#define _KENDRYTE_BSP_H
#include "atomic.h"
#include "entry.h"
#include "sleep.h"
#include "encoding.h"
#include "syscalls.h"
#include "entry.h"
#include "printf.h"
#include "sleep.h"
#include "syscalls.h"
#endif

145
lib/bsp/include/dump.h
View File

@ -31,89 +31,89 @@ static inline void
dump_core(const char *reason, uintptr_t cause, uintptr_t epc, uintptr_t regs[32], uintptr_t fregs[32])
{
static const char *const reg_usage[][2] =
{
{"zero ", "Hard-wired zero"},
{"ra ", "Return address"},
{"sp ", "Stack pointer"},
{"gp ", "Global pointer"},
{"tp ", "Thread pointer"},
{"t0 ", "Temporaries Caller"},
{"t1 ", "Temporaries Caller"},
{"t2 ", "Temporaries Caller"},
{"s0/fp", "Saved register/frame pointer"},
{"s1 ", "Saved register"},
{"a0 ", "Function arguments/return values"},
{"a1 ", "Function arguments/return values"},
{"a2 ", "Function arguments values"},
{"a3 ", "Function arguments values"},
{"a4 ", "Function arguments values"},
{"a5 ", "Function arguments values"},
{"a6 ", "Function arguments values"},
{"a7 ", "Function arguments values"},
{"s2 ", "Saved registers"},
{"s3 ", "Saved registers"},
{"s4 ", "Saved registers"},
{"s5 ", "Saved registers"},
{"s6 ", "Saved registers"},
{"s7 ", "Saved registers"},
{"s8 ", "Saved registers"},
{"s9 ", "Saved registers"},
{"s10 ", "Saved registers"},
{"s11 ", "Saved registers"},
{"t3 ", "Temporaries Caller"},
{"t4 ", "Temporaries Caller"},
{"t5 ", "Temporaries Caller"},
{"t6 ", "Temporaries Caller"},
};
{
{"zero ", "Hard-wired zero"},
{"ra ", "Return address"},
{"sp ", "Stack pointer"},
{"gp ", "Global pointer"},
{"tp ", "Thread pointer"},
{"t0 ", "Temporaries Caller"},
{"t1 ", "Temporaries Caller"},
{"t2 ", "Temporaries Caller"},
{"s0/fp", "Saved register/frame pointer"},
{"s1 ", "Saved register"},
{"a0 ", "Function arguments/return values"},
{"a1 ", "Function arguments/return values"},
{"a2 ", "Function arguments values"},
{"a3 ", "Function arguments values"},
{"a4 ", "Function arguments values"},
{"a5 ", "Function arguments values"},
{"a6 ", "Function arguments values"},
{"a7 ", "Function arguments values"},
{"s2 ", "Saved registers"},
{"s3 ", "Saved registers"},
{"s4 ", "Saved registers"},
{"s5 ", "Saved registers"},
{"s6 ", "Saved registers"},
{"s7 ", "Saved registers"},
{"s8 ", "Saved registers"},
{"s9 ", "Saved registers"},
{"s10 ", "Saved registers"},
{"s11 ", "Saved registers"},
{"t3 ", "Temporaries Caller"},
{"t4 ", "Temporaries Caller"},
{"t5 ", "Temporaries Caller"},
{"t6 ", "Temporaries Caller"},
};
static const char *const regf_usage[][2] =
{
{"ft0 ", "FP temporaries"},
{"ft1 ", "FP temporaries"},
{"ft2 ", "FP temporaries"},
{"ft3 ", "FP temporaries"},
{"ft4 ", "FP temporaries"},
{"ft5 ", "FP temporaries"},
{"ft6 ", "FP temporaries"},
{"ft7 ", "FP temporaries"},
{"fs0 ", "FP saved registers"},
{"fs1 ", "FP saved registers"},
{"fa0 ", "FP arguments/return values"},
{"fa1 ", "FP arguments/return values"},
{"fa2 ", "FP arguments values"},
{"fa3 ", "FP arguments values"},
{"fa4 ", "FP arguments values"},
{"fa5 ", "FP arguments values"},
{"fa6 ", "FP arguments values"},
{"fa7 ", "FP arguments values"},
{"fs2 ", "FP Saved registers"},
{"fs3 ", "FP Saved registers"},
{"fs4 ", "FP Saved registers"},
{"fs5 ", "FP Saved registers"},
{"fs6 ", "FP Saved registers"},
{"fs7 ", "FP Saved registers"},
{"fs8 ", "FP Saved registers"},
{"fs9 ", "FP Saved registers"},
{"fs10", "FP Saved registers"},
{"fs11", "FP Saved registers"},
{"ft8 ", "FP Temporaries Caller"},
{"ft9 ", "FP Temporaries Caller"},
{"ft10", "FP Temporaries Caller"},
{"ft11", "FP Temporaries Caller"},
};
{
{"ft0 ", "FP temporaries"},
{"ft1 ", "FP temporaries"},
{"ft2 ", "FP temporaries"},
{"ft3 ", "FP temporaries"},
{"ft4 ", "FP temporaries"},
{"ft5 ", "FP temporaries"},
{"ft6 ", "FP temporaries"},
{"ft7 ", "FP temporaries"},
{"fs0 ", "FP saved registers"},
{"fs1 ", "FP saved registers"},
{"fa0 ", "FP arguments/return values"},
{"fa1 ", "FP arguments/return values"},
{"fa2 ", "FP arguments values"},
{"fa3 ", "FP arguments values"},
{"fa4 ", "FP arguments values"},
{"fa5 ", "FP arguments values"},
{"fa6 ", "FP arguments values"},
{"fa7 ", "FP arguments values"},
{"fs2 ", "FP Saved registers"},
{"fs3 ", "FP Saved registers"},
{"fs4 ", "FP Saved registers"},
{"fs5 ", "FP Saved registers"},
{"fs6 ", "FP Saved registers"},
{"fs7 ", "FP Saved registers"},
{"fs8 ", "FP Saved registers"},
{"fs9 ", "FP Saved registers"},
{"fs10", "FP Saved registers"},
{"fs11", "FP Saved registers"},
{"ft8 ", "FP Temporaries Caller"},
{"ft9 ", "FP Temporaries Caller"},
{"ft10", "FP Temporaries Caller"},
{"ft11", "FP Temporaries Caller"},
};
if (CONFIG_LOG_LEVEL >= LOG_ERROR)
if(CONFIG_LOG_LEVEL >= LOG_ERROR)
{
const char unknown_reason[] = "unknown";
if (!reason)
if(!reason)
reason = unknown_reason;
DUMP_PRINTF("core dump: %s\r\n", reason);
DUMP_PRINTF("Cause 0x%016lx, EPC 0x%016lx\r\n", cause, epc);
int i = 0;
for (i = 0; i < 32 / 2; i++)
for(i = 0; i < 32 / 2; i++)
{
DUMP_PRINTF(
"reg[%02d](%s) = 0x%016lx, reg[%02d](%s) = 0x%016lx\r\n",
@ -121,7 +121,7 @@ dump_core(const char *reason, uintptr_t cause, uintptr_t epc, uintptr_t regs[32]
i * 2 + 1, reg_usage[i * 2 + 1][0], regs[i * 2 + 1]);
}
for (i = 0; i < 32 / 2; i++)
for(i = 0; i < 32 / 2; i++)
{
DUMP_PRINTF(
"freg[%02d](%s) = 0x%016lx(%f), freg[%02d](%s) = 0x%016lx(%f)\r\n",
@ -138,4 +138,3 @@ dump_core(const char *reason, uintptr_t cause, uintptr_t epc, uintptr_t regs[32]
#endif
#endif /* _BSP_DUMP_H */

1567
lib/bsp/include/encoding.h
View File

File diff suppressed because it is too large Load Diff

5
lib/bsp/include/entry.h
View File

@ -42,7 +42,7 @@ static inline void init_lma(void)
src = &_data_lma;
dst = &_data;
while (dst < &_edata)
while(dst < &_edata)
*dst++ = *src++;
}
@ -53,7 +53,7 @@ static inline void init_bss(void)
unsigned int *dst;
dst = &_bss;
while (dst < &_ebss)
while(dst < &_ebss)
*dst++ = 0;
}
@ -78,4 +78,3 @@ static inline void init_tls(void)
#endif
#endif /* _BSP_ENTRY_H */

1
lib/bsp/include/interrupt.h
View File

@ -44,4 +44,3 @@ extern "C" {
#endif
#endif /* _BSP_INTERRUPT_H */

1
lib/bsp/include/platform.h
View File

@ -96,4 +96,3 @@ extern "C" {
#endif
#endif /* _BSP_PLATFORM_H */

13
lib/bsp/include/printf.h
View File

@ -151,7 +151,7 @@
extern "C" {
#endif
typedef void (*putcf)(void*, char);
typedef void (*putcf)(void *, char);
/**
* 'tfp_format' really is the central function for all tinyprintf. For
@ -189,12 +189,12 @@ void tfp_printf(char *fmt, ...) _TFP_SPECIFY_PRINTF_FMT(1, 2);
#include <forward_list>
namespace std
{
template <typename... Args>
auto tfp_printf(Args&&... args) -> decltype(::tfp_printf(std::forward<Args>(args)...))
{
return ::tfp_printf(std::forward<Args>(args)...);
}
template <typename... Args>
auto tfp_printf(Args &&... args) -> decltype(::tfp_printf(std::forward<Args>(args)...))
{
return ::tfp_printf(std::forward<Args>(args)...);
}
} // namespace std
#endif
#endif
#endif
@ -206,4 +206,3 @@ int printk(const char *format, ...) _TFP_SPECIFY_PRINTF_FMT(1, 2);
#endif
#endif /* _BSP_PRINTF_H */

3
lib/bsp/include/sleep.h
View File

@ -16,8 +16,8 @@
#ifndef _BSP_SLEEP_H
#define _BSP_SLEEP_H
#include "encoding.h"
#include "clint.h"
#include "encoding.h"
#include "syscalls.h"
#ifdef __cplusplus
@ -33,4 +33,3 @@ unsigned int sleep(unsigned int seconds);
#endif
#endif /* _BSP_SLEEP_H */

1
lib/bsp/include/syscalls.h
View File

@ -88,4 +88,3 @@ size_t get_free_heap_size(void);
#endif
#endif /* _BSP_SYSCALLS_H */

66
lib/bsp/include/util.h
View File

@ -16,7 +16,6 @@
#ifndef _BSP_UTIL_H
#define _BSP_UTIL_H
#include <stdint.h>
#if defined(__riscv)
#include "encoding.h"
@ -55,29 +54,22 @@ extern "C" {
#define PREALLOCATE 0
#endif
#define static_assert(cond) \
{ \
switch (0) \
{ \
case 0: \
case !!(long)(cond):; \
} \
}
#define static_assert(cond){ \
switch(0){ \
case 0 : case !!(long)(cond):; } }
#define stringify_1(s) #s
#define stringify(s) stringify_1(s)
#define stats(code, iter) \
do \
{ \
unsigned long _c = -read_cycle(), _i = -read_csr(minstret); \
code; \
_c += read_cycle(), _i += read_csr(minstret); \
if (cid == 0) \
printf("\r\n%s: %ld cycles, %ld.%ld cycles/iter, %ld.%ld CPI\r\n", \
stringify(code), _c, _c / iter, 10 * _c / iter % 10, _c / _i, 10 * _c / _i % 10); \
} while (0)
#define stats(code, iter) \
do \
{ \
unsigned long _c = -read_cycle(), _i = -read_csr(minstret); \
code; \
_c += read_cycle(), _i += read_csr(minstret); \
if(cid == 0) \
printf("\r\n%s: %ld cycles, %ld.%ld cycles/iter, %ld.%ld CPI\r\n", \
stringify(code), _c, _c / iter, 10 * _c / iter % 10, _c / _i, 10 * _c / _i % 10); \
} while(0)
/**
* Set SET_STATS to 1 if you want to carve out the piece that actually
@ -86,19 +78,20 @@ extern "C" {
#if HOST_DEBUG
#include <stdio.h>
static void setStats(int enable) {}
static void setStats(int enable)
{
}
#else
extern void setStats(int enable);
#endif
static void printArray(const char name[], int n, const int arr[])
{
#if HOST_DEBUG
int i;
printf(" %10s :", name);
for (i = 0; i < n; i++)
for(i = 0; i < n; i++)
printf(" %3d ", arr[i]);
printf("\r\n");
#endif
@ -110,7 +103,7 @@ static void printDoubleArray(const char name[], int n, const double arr[])
int i;
printf(" %10s :", name);
for (i = 0; i < n; i++)
for(i = 0; i < n; i++)
printf(" %g ", arr[i]);
printf("\r\n");
#endif
@ -120,17 +113,17 @@ static int verify(int n, const volatile int *test, const int *verify)
{
int i;
/* Unrolled for faster verification */
for (i = 0; i < n / 2 * 2; i += 2)
for(i = 0; i < n / 2 * 2; i += 2)
{
int t0 = test[i], t1 = test[i + 1];
int v0 = verify[i], v1 = verify[i + 1];
if (t0 != v0)
if(t0 != v0)
return i + 1;
if (t1 != v1)
if(t1 != v1)
return i + 2;
}
if (n % 2 != 0 && test[n - 1] != verify[n - 1])
if(n % 2 != 0 && test[n - 1] != verify[n - 1])
return n;
return 0;
}
@ -139,16 +132,16 @@ static int verifyDouble(int n, const volatile double *test, const double *verify
{
int i;
/* Unrolled for faster verification */
for (i = 0; i < n / 2 * 2; i += 2)
for(i = 0; i < n / 2 * 2; i += 2)
{
double t0 = test[i], t1 = test[i + 1];
double v0 = verify[i], v1 = verify[i + 1];
int eq1 = t0 == v0, eq2 = t1 == v1;
if (!(eq1 & eq2))
if(!(eq1 & eq2))
return i + 1 + eq1;
}
if (n % 2 != 0 && test[n - 1] != verify[n - 1])
if(n % 2 != 0 && test[n - 1] != verify[n - 1])
return n;
return 0;
}
@ -163,14 +156,13 @@ static void __attribute__((noinline)) barrier(int ncores)
__sync_synchronize();
threadsense = !threadsense;
if (__sync_fetch_and_add(&count, 1) == ncores - 1)
if(__sync_fetch_and_add(&count, 1) == ncores - 1)
{
count = 0;
sense = threadsense;
}
else
} else
{
while (sense != threadsense)
while(sense != threadsense)
;
}
@ -184,7 +176,6 @@ static uint64_t lfsr(uint64_t x)
return (x >> 1) | (bit << 62);
}
#if defined(__GNUC__)
#pragma GCC diagnostic warning "-Wunused-parameter"
#pragma GCC diagnostic warning "-Wunused-function"
@ -195,4 +186,3 @@ static uint64_t lfsr(uint64_t x)
#endif
#endif /* _BSP_UTIL_H */

3
lib/bsp/interrupt.c
View File

@ -17,8 +17,8 @@
#include <stdint.h>
#include <stdlib.h>
#include "interrupt.h"
#include "dump.h"
#include "interrupt.h"
#include "syscalls.h"
#include "syslog.h"
@ -63,4 +63,3 @@ handle_irq(uintptr_t cause, uintptr_t epc, uintptr_t regs[32], uintptr_t fregs[3
#endif
return irq_table[cause & CAUSE_MACHINE_IRQ_REASON_MASK](cause, epc, regs, fregs);
}

43
lib/bsp/locks.c
View File

@ -1,8 +1,8 @@
#include <sys/lock.h>
#include <stdlib.h>
#include <sys/lock.h>
#include "bsp.h"
#define LOCK_MAX_NUM (1024)
#define LOCK_MAX_NUM (1024)
typedef long _lock_t;
@ -37,7 +37,8 @@ static inline long lock_trylock(_lock_t *lock)
static inline void lock_lock(_lock_t *lock)
{
while (lock_trylock(lock));
while(lock_trylock(lock))
;
}
static inline void lock_unlock(_lock_t *lock)
@ -45,7 +46,7 @@ static inline void lock_unlock(_lock_t *lock)
/* Use memory barrier to keep coherency */
mb();
atomic_swap(lock, 0);
asm volatile ("nop");
asm volatile("nop");
}
static reculock_t *get_reculock(_lock_t *lock)
@ -77,8 +78,7 @@ static reculock_t *reculock_init(_lock_t *lock)
{
return NULL;
}
*v_reculock = (reculock_t)
{
*v_reculock = (reculock_t){
.lock = lock,
.counter = 0,
.core = 0,
@ -92,8 +92,7 @@ static void reculock_deinit(_lock_t *lock)
reculock_t *v_reculock = get_reculock(lock);
if(v_reculock)
{
*v_reculock = (reculock_t)
{
*v_reculock = (reculock_t){
.lock = NULL,
.counter = 0,
.core = 0,
@ -125,20 +124,18 @@ static inline int reculock_trylock(_lock_t *lock)
}
}
if (v_reculock->counter == 0)
if(v_reculock->counter == 0)
{
/* First time get lock */
v_reculock->counter++;
v_reculock->core = core;
res = 0;
}
else if (v_reculock->core == core)
} else if(v_reculock->core == core)
{
/* Same core get lock */
v_reculock->counter++;
res = 0;
}
else
} else
{
/* Different core get lock */
res = -1;
@ -167,26 +164,24 @@ static inline void reculock_lock(_lock_t *lock)
}
}
if (v_reculock->counter == 0)
if(v_reculock->counter == 0)
{
/* First time get lock */
v_reculock->counter++;
v_reculock->core = core;
}
else if (v_reculock->core == core)
} else if(v_reculock->core == core)
{
/* Same core get lock */
v_reculock->counter++;
}
else
} else
{
/* Different core get lock */
lock_unlock(lock);
do
{
while (atomic_read(&reculock->counter))
while(atomic_read(&reculock->counter))
;
} while (reculock_trylock(lock));
} while(reculock_trylock(lock));
return;
}
lock_unlock(lock);
@ -207,18 +202,17 @@ static inline void reculock_unlock(_lock_t *lock)
show_error();
}
if (v_reculock->core == core)
if(v_reculock->core == core)
{
/* Same core release lock */
v_reculock->counter--;
if (v_reculock->counter <= 0)
if(v_reculock->counter <= 0)
{
v_reculock->core = 0;
v_reculock->counter = 0;
v_reculock->lock = NULL;
}
}
else
} else
{
/* Different core release lock */
lock_unlock(lock);
@ -276,4 +270,3 @@ void _lock_release_recursive(_lock_t *lock)
{
reculock_unlock(lock);
}

161
lib/bsp/printf.c
View File

@ -28,8 +28,8 @@
*/
#include <stddef.h>
#include "printf.h"
#include "atomic.h"
#include "printf.h"
#include "syscalls.h"
/**
@ -72,21 +72,17 @@
#define _TFP_GCC_NO_INLINE_
#endif
#if defined(PRINTF_LONG_SUPPORT)
#define BF_MAX 20 /* long = 64b on some architectures */
#else
#define BF_MAX 10 /* int = 32b on some architectures */
#endif
#define IS_DIGIT(x) ((x) >= '0' && (x) <= '9')
/* Clear unused warnings for actually unused variables */
#define UNUSED(x) (void)(x)
/**
* Implementation
*/
@ -106,20 +102,18 @@ struct param
static corelock_t lock = CORELOCK_INIT;
#if defined(PRINTF_LONG_LONG_SUPPORT)
static void _TFP_GCC_NO_INLINE_ ulli2a(unsigned long long int num, struct param *p)
{
unsigned long long int d = 1;
char *bf = p->bf;
if ((p->prec == 0) && (num == 0))
if((p->prec == 0) && (num == 0))
return;
while (num / d >= p->base)
while(num / d >= p->base)
{
d *= p->base;
}
while (d != 0)
while(d != 0)
{
int dgt = num / d;
num %= d;
@ -131,7 +125,7 @@ static void _TFP_GCC_NO_INLINE_ ulli2a(unsigned long long int num, struct param
static void lli2a(long long int num, struct param *p)
{
if (num < 0)
if(num < 0)
{
num = -num;
p->sign = '-';
@ -145,13 +139,13 @@ static void uli2a(unsigned long int num, struct param *p)
{
unsigned long int d = 1;
char *bf = p->bf;
if ((p->prec == 0) && (num == 0))
if((p->prec == 0) && (num == 0))
return;
while (num / d >= p->base)
while(num / d >= p->base)
{
d *= p->base;
}
while (d != 0)
while(d != 0)
{
int dgt = num / d;
num %= d;
@ -163,7 +157,7 @@ static void uli2a(unsigned long int num, struct param *p)
static void li2a(long num, struct param *p)
{
if (num < 0)
if(num < 0)
{
num = -num;
p->sign = '-';
@ -176,13 +170,13 @@ static void ui2a(unsigned int num, struct param *p)
{
unsigned int d = 1;
char *bf = p->bf;
if ((p->prec == 0) && (num == 0))
if((p->prec == 0) && (num == 0))
return;
while (num / d >= p->base)
while(num / d >= p->base)
{
d *= p->base;
}
while (d != 0)
while(d != 0)
{
int dgt = num / d;
num %= d;
@ -194,7 +188,7 @@ static void ui2a(unsigned int num, struct param *p)
static void i2a(int num, struct param *p)
{
if (num < 0)
if(num < 0)
{
num = -num;
p->sign = '-';
@ -204,11 +198,11 @@ static void i2a(int num, struct param *p)
static int a2d(char ch)
{
if (IS_DIGIT(ch))
if(IS_DIGIT(ch))
return ch - '0';
else if (ch >= 'a' && ch <= 'f')
else if(ch >= 'a' && ch <= 'f')
return ch - 'a' + 10;
else if (ch >= 'A' && ch <= 'F')
else if(ch >= 'A' && ch <= 'F')
return ch - 'A' + 10;
else
return -1;
@ -219,9 +213,9 @@ static char a2u(char ch, const char **src, int base, unsigned int *nump)
const char *p = *src;
unsigned int num = 0;
int digit;
while ((digit = a2d(ch)) >= 0)
while((digit = a2d(ch)) >= 0)
{
if (digit > base)
if(digit > base)
break;
num = num * base + digit;
ch = *p++;
@ -242,54 +236,53 @@ static void putchw(void *putp, putcf putf, struct param *p)
/* Number of filling characters */
width -= bf_len;
prec -= bf_len;
if (p->sign)
if(p->sign)
width--;
if (p->alt && p->base == 16)
if(p->alt && p->base == 16)
width -= 2;
else if (p->alt && p->base == 8)
else if(p->alt && p->base == 8)
width--;
if (prec > 0)
if(prec > 0)
width -= prec;
/* Fill with space to align to the right, before alternate or sign */
if (!p->lz && !p->align_left)
if(!p->lz && !p->align_left)
{
while (width-- > 0)
while(width-- > 0)
putf(putp, ' ');
}
/* print sign */
if (p->sign)
if(p->sign)
putf(putp, p->sign);
/* Alternate */
if (p->alt && p->base == 16)
if(p->alt && p->base == 16)
{
putf(putp, '0');
putf(putp, (p->uc ? 'X' : 'x'));
}
else if (p->alt && p->base == 8)
} else if(p->alt && p->base == 8)
{
putf(putp, '0');
}
/* Fill with zeros, after alternate or sign */
while (prec-- > 0)
while(prec-- > 0)
putf(putp, '0');
if (p->lz)
if(p->lz)
{
while (width-- > 0)
while(width-- > 0)
putf(putp, '0');
}
/* Put actual buffer */
while ((bf_len-- > 0) && (ch = *bf++))
while((bf_len-- > 0) && (ch = *bf++))
putf(putp, ch);
/* Fill with space to align to the left, after string */
if (!p->lz && p->align_left)
if(!p->lz && p->align_left)
{
while (width-- > 0)
while(width-- > 0)
putf(putp, ' ');
}
}
@ -300,13 +293,12 @@ void tfp_format(void *putp, putcf putf, const char *fmt, va_list va)
char bf[BF_MAX];
char ch;
while ((ch = *(fmt++)))
while((ch = *(fmt++)))
{
if (ch != '%')
if(ch != '%')
{
putf(putp, ch);
}
else
} else
{
#if defined(PRINTF_LONG_SUPPORT)
char lng = 0; /* 1 for long, 2 for long long */
@ -323,9 +315,9 @@ void tfp_format(void *putp, putcf putf, const char *fmt, va_list va)
p.bf_len = 0;
/* Flags */
while ((ch = *(fmt++)))
while((ch = *(fmt++)))
{
switch (ch)
switch(ch)
{
case '-':
p.align_left = 1;
@ -342,21 +334,20 @@ void tfp_format(void *putp, putcf putf, const char *fmt, va_list va)
break;
}
if (p.align_left)
if(p.align_left)
p.lz = 0;
/* Width */
if (ch == '*')
if(ch == '*')
{
ch = *(fmt++);
p.width = va_arg(va, int);
if (p.width < 0)
if(p.width < 0)
{
p.align_left = 1;
p.width = -p.width;
}
}
else if (IS_DIGIT(ch))
} else if(IS_DIGIT(ch))
{
unsigned int width;
ch = a2u(ch, &fmt, 10, &(width));
@ -364,59 +355,56 @@ void tfp_format(void *putp, putcf putf, const char *fmt, va_list va)
}
/* Precision */
if (ch == '.')
if(ch == '.')
{
ch = *(fmt++);
if (ch == '*')
if(ch == '*')
{
int prec;
ch = *(fmt++);
prec = va_arg(va, int);
if (prec < 0)
if(prec < 0)
/* act as if precision was
* omitted */
p.prec = -1;
else
p.prec = prec;
}
else if (IS_DIGIT(ch))
} else if(IS_DIGIT(ch))
{
unsigned int prec;
ch = a2u(ch, &fmt, 10, &(prec));
p.prec = prec;
}
else
} else
{
p.prec = 0;
}
}
if (p.prec >= 0)
if(p.prec >= 0)
/* precision causes zero pad to be ignored */
p.lz = 0;
#if defined(PRINTF_SIZE_T_SUPPORT)
#if defined(PRINTF_LONG_SUPPORT)
if (ch == 'z')
if(ch == 'z')
{
ch = *(fmt++);
if (sizeof(size_t) == sizeof(unsigned long int))
if(sizeof(size_t) == sizeof(unsigned long int))
lng = 1;
#if defined(PRINTF_LONG_LONG_SUPPORT)
else if (sizeof(size_t) == sizeof(unsigned long long int))
else if(sizeof(size_t) == sizeof(unsigned long long int))
lng = 2;
#endif
}
else
} else
#endif
#endif
#if defined(PRINTF_LONG_SUPPORT)
if (ch == 'l')
if(ch == 'l')
{
ch = *(fmt++);
lng = 1;
#if defined(PRINTF_LONG_LONG_SUPPORT)
if (ch == 'l')
if(ch == 'l')
{
ch = *(fmt++);
lng = 2;
@ -424,39 +412,39 @@ void tfp_format(void *putp, putcf putf, const char *fmt, va_list va)
#endif
}
#endif
switch (ch)
switch(ch)
{
case 0:
goto abort;
case 'u':
p.base = 10;
if (p.prec < 0)
if(p.prec < 0)
p.prec = 1;
#if defined(PRINTF_LONG_SUPPORT)
#if defined(PRINTF_LONG_LONG_SUPPORT)
if (2 == lng)
if(2 == lng)
ulli2a(va_arg(va, unsigned long long int), &p);
else
#endif
if (1 == lng)
if(1 == lng)
uli2a(va_arg(va, unsigned long int), &p);
else
#endif
ui2a(va_arg(va, unsigned int), &p);
putchw(putp, putf, &p);
break;
case 'd': /* No break */
case 'd': /* No break */
case 'i':
p.base = 10;
if (p.prec < 0)
if(p.prec < 0)
p.prec = 1;
#if defined(PRINTF_LONG_SUPPORT)
#if defined(PRINTF_LONG_LONG_SUPPORT)
if (2 == lng)
if(2 == lng)
lli2a(va_arg(va, long long int), &p);
else
#endif
if (1 == lng)
if(1 == lng)
li2a(va_arg(va, long int), &p);
else
#endif
@ -475,19 +463,19 @@ void tfp_format(void *putp, putcf putf, const char *fmt, va_list va)
#endif
#endif
/* No break */
case 'x': /* No break */
case 'x': /* No break */
case 'X':
p.base = 16;
p.uc = (ch == 'X') ? 1 : 0;
if (p.prec < 0)
if(p.prec < 0)
p.prec = 1;
#if defined(PRINTF_LONG_SUPPORT)
#if defined(PRINTF_LONG_LONG_SUPPORT)
if (2 == lng)
if(2 == lng)
ulli2a(va_arg(va, unsigned long long int), &p);
else
#endif
if (1 == lng)
if(1 == lng)
uli2a(va_arg(va, unsigned long int), &p);
else
#endif
@ -496,7 +484,7 @@ void tfp_format(void *putp, putcf putf, const char *fmt, va_list va)
break;
case 'o':
p.base = 8;
if (p.prec < 0)
if(p.prec < 0)
p.prec = 1;
ui2a(va_arg(va, unsigned int), &p);
putchw(putp, putf, &p);
@ -508,9 +496,9 @@ void tfp_format(void *putp, putcf putf, const char *fmt, va_list va)
{
unsigned int prec = p.prec;
char *b;
p.bf = va_arg(va, char*);
p.bf = va_arg(va, char *);
b = p.bf;
while ((prec-- != 0) && *b++)
while((prec-- != 0) && *b++)
{
p.bf_len++;
}
@ -558,8 +546,8 @@ struct _vsnprintf_putcf_data
static void _vsnprintf_putcf(void *p, char c)
{
struct _vsnprintf_putcf_data *data = (struct _vsnprintf_putcf_data*)p;
if (data->num_chars < data->dest_capacity)
struct _vsnprintf_putcf_data *data = (struct _vsnprintf_putcf_data *)p;
if(data->num_chars < data->dest_capacity)
data->dest[data->num_chars] = c;
data->num_chars++;
}
@ -568,7 +556,7 @@ int tfp_vsnprintf(char *str, size_t size, const char *format, va_list ap)
{
struct _vsnprintf_putcf_data data;
if (size < 1)
if(size < 1)
return 0;
data.dest = str;
@ -576,7 +564,7 @@ int tfp_vsnprintf(char *str, size_t size, const char *format, va_list ap)
data.num_chars = 0;
tfp_format(&data, _vsnprintf_putcf, format, ap);
if (data.num_chars < data.dest_capacity)
if(data.num_chars < data.dest_capacity)
data.dest[data.num_chars] = '\0';
else
data.dest[data.dest_capacity] = '\0';
@ -603,7 +591,7 @@ struct _vsprintf_putcf_data
static void _vsprintf_putcf(void *p, char c)
{
struct _vsprintf_putcf_data *data = (struct _vsprintf_putcf_data*)p;
struct _vsprintf_putcf_data *data = (struct _vsprintf_putcf_data *)p;
data->dest[data->num_chars++] = c;
}
@ -650,4 +638,3 @@ int printk(const char *format, ...)
return 0;
}

3
lib/bsp/sleep.c
View File

@ -19,7 +19,7 @@ int usleep(uint64_t usec)
{
uint64_t cycle = read_cycle();
uint64_t nop_all = usec * sysctl_clock_get_freq(SYSCTL_CLOCK_CPU) / 1000000UL;
while (1)
while(1)
{
if(read_cycle() - cycle >= nop_all)
break;
@ -36,4 +36,3 @@ unsigned int sleep(unsigned int seconds)
{
return (unsigned int)msleep(seconds * 1000);
}

356
lib/bsp/syscalls.c
View File

@ -15,27 +15,27 @@
/* Enable kernel-mode log API */
#include <sys/stat.h>
#include <sys/time.h>
#include <sys/unistd.h>
#include <machine/syscall.h>
#include <stdbool.h>
#include <errno.h>
#include <limits.h>
#include <machine/syscall.h>
#include <stdarg.h>
#include <stdbool.h>
#include <stdint.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include "syscalls.h"
#include <sys/stat.h>
#include <sys/time.h>
#include <sys/unistd.h>
#include "atomic.h"
#include "clint.h"
#include "dump.h"
#include "fpioa.h"
#include "interrupt.h"
#include "syscalls.h"
#include "sysctl.h"
#include "util.h"
#include "syslog.h"
#include "dump.h"
#include "util.h"
/**
* @note System call list
@ -113,8 +113,8 @@ void sys_register_getchar(sys_getchar_t getchar)
void sys_stdin_flush(void)
{
if (sys_getchar)
while (sys_getchar() != EOF)
if(sys_getchar)
while(sys_getchar() != EOF)
continue;
}
@ -124,7 +124,7 @@ void __attribute__((noreturn)) sys_exit(int code)
unsigned long core_id = current_coreid();
/* First print some diagnostic information. */
LOGW(TAG, "sys_exit called by core %ld with 0x%lx\r\n", core_id, (uint64_t)code);
while (1)
while(1)
continue;
}
@ -135,7 +135,7 @@ static int sys_nosys(long a0, long a1, long a2, long a3, long a4, long a5, unsig
UNUSED(a5);
LOGE(TAG, "Unsupported syscall %ld: a0=%lx, a1=%lx, a2=%lx!\r\n", n, a0, a1, a2);
while (1)
while(1)
continue;
return -ENOSYS;
}
@ -174,24 +174,22 @@ static size_t sys_brk(size_t pos)
* Otherwise throw out of memory error, return -1.
*/
if (pos)
if(pos)
{
/* Call again */
if ((uintptr_t)pos > (uintptr_t)&_heap_end[0])
if((uintptr_t)pos > (uintptr_t)&_heap_end[0])
{
/* Memory out, return -ENOMEM */
LOGE(TAG, "Out of memory\r\n");
res = -ENOMEM;
}
else
} else
{
/* Adjust brk pointer. */
_heap_cur = (char *)(uintptr_t)pos;
/* Return current address. */
res = (uintptr_t)_heap_cur;
}
}
else
} else
{
/* First call, return initial address */
res = (uintptr_t)&_heap_start[0];
@ -217,18 +215,18 @@ static ssize_t sys_write(int file, const void *ptr, size_t len)
/* Get data pointer */
register char *data = (char *)ptr;
if (STDOUT_FILENO == file || STDERR_FILENO == file)
if(STDOUT_FILENO == file || STDERR_FILENO == file)
{
/* Write data */
while (length-- > 0 && data != NULL) {
if (sys_putchar)
while(length-- > 0 && data != NULL)
{
if(sys_putchar)
sys_putchar(*(data++));
}
/* Return the actual size written */
res = len;
}
else
} else
{
/* Not support yet */
res = -ENOSYS;
@ -257,37 +255,40 @@ static ssize_t sys_read(int file, void *ptr, size_t len)
/* Actual size to read */
register size_t actual_length = 0;
if (STDIN_FILENO == file)
if(STDIN_FILENO == file)
{
/* Read data */
actual_length = 0;
while (length-- > 0 && data != NULL) {
if (sys_getchar) {
while(length-- > 0 && data != NULL)
{
if(sys_getchar)
{
int getchar_result = sys_getchar();
/* Get char until not EOF */
while (getchar_result == EOF)
while(getchar_result == EOF)
getchar_result = sys_getchar();
if (getchar_result != EOF) {
if(getchar_result != EOF)
{
/* Not EOF, read data to buffer */
*(data++) = (char)getchar_result;
actual_length++;
/* Echo back this char to user */
if (sys_putchar)
if(sys_putchar)
sys_putchar((char)getchar_result);
/* User press RETURN, break. This is the last step in stdin */
if ((char)getchar_result == '\r')
if((char)getchar_result == '\r')
break;
if ((char)getchar_result == '\n')
if((char)getchar_result == '\n')
break;
} else {
} else
{
/* EOF, do nothing */
}
}
}
/* Return the actual size read */
res = actual_length;
}
else
} else
{
/* Not support yet */
res = -ENOSYS;
@ -315,7 +316,7 @@ static int sys_fstat(int file, struct stat *st)
UNUSED(file);
if (st != NULL)
if(st != NULL)
memset(st, 0, sizeof(struct stat));
/* Return the result */
res = -ENOSYS;
@ -364,11 +365,11 @@ static int sys_gettimeofday(struct timeval *tp, void *tzp)
*/
UNUSED(tzp);
if (tp != NULL)
if(tp != NULL)
{
uint64_t clint_usec = clint->mtime / (sysctl_clock_get_freq(SYSCTL_CLOCK_CPU) / CLINT_CLOCK_DIV / 1000000UL);
tp->tv_sec = clint_usec / 1000000UL;
tp->tv_sec = clint_usec / 1000000UL;
tp->tv_usec = clint_usec % 1000000UL;
}
/* Return the result */
@ -394,73 +395,113 @@ handle_ecall(uintptr_t cause, uintptr_t epc, uintptr_t regs[32], uintptr_t fregs
SYS_ID_MAX
};
static uintptr_t (* const syscall_table[])(long a0, long a1, long a2, long a3, long a4, long a5, unsigned long n) =
{
[SYS_ID_NOSYS] = (void *)sys_nosys,
[SYS_ID_SUCCESS] = (void *)sys_success,
[SYS_ID_EXIT] = (void *)sys_exit,
[SYS_ID_BRK] = (void *)sys_brk,
[SYS_ID_WRITE] = (void *)sys_write,
[SYS_ID_READ] = (void *)sys_read,
[SYS_ID_FSTAT] = (void *)sys_fstat,
[SYS_ID_CLOSE] = (void *)sys_close,
[SYS_ID_GETTIMEOFDAY] = (void *)sys_gettimeofday,
};
static uintptr_t (*const syscall_table[])(long a0, long a1, long a2, long a3, long a4, long a5, unsigned long n) =
{
[SYS_ID_NOSYS] = (void *)sys_nosys,
[SYS_ID_SUCCESS] = (void *)sys_success,
[SYS_ID_EXIT] = (void *)sys_exit,
[SYS_ID_BRK] = (void *)sys_brk,
[SYS_ID_WRITE] = (void *)sys_write,
[SYS_ID_READ] = (void *)sys_read,
[SYS_ID_FSTAT] = (void *)sys_fstat,
[SYS_ID_CLOSE] = (void *)sys_close,
[SYS_ID_GETTIMEOFDAY] = (void *)sys_gettimeofday,
};
#if defined(__GNUC__)
#pragma GCC diagnostic ignored "-Woverride-init"
#endif
static const uint8_t syscall_id_table[0x100] =
{
[0x00 ... 0xFF] = SYS_ID_NOSYS,
[0xFF & SYS_exit] = SYS_ID_EXIT,
[0xFF & SYS_exit_group] = SYS_ID_EXIT,
[0xFF & SYS_getpid] = SYS_ID_NOSYS,
[0xFF & SYS_kill] = SYS_ID_NOSYS,
[0xFF & SYS_read] = SYS_ID_READ,
[0xFF & SYS_write] = SYS_ID_WRITE,
[0xFF & SYS_open] = SYS_ID_NOSYS,
[0xFF & SYS_openat] = SYS_ID_NOSYS,
[0xFF & SYS_close] = SYS_ID_CLOSE,
[0xFF & SYS_lseek] = SYS_ID_NOSYS,
[0xFF & SYS_brk] = SYS_ID_BRK,
[0xFF & SYS_link] = SYS_ID_NOSYS,
[0xFF & SYS_unlink] = SYS_ID_NOSYS,
[0xFF & SYS_mkdir] = SYS_ID_NOSYS,
[0xFF & SYS_chdir] = SYS_ID_NOSYS,
[0xFF & SYS_getcwd] = SYS_ID_NOSYS,
[0xFF & SYS_stat] = SYS_ID_NOSYS,
[0xFF & SYS_fstat] = SYS_ID_FSTAT,
[0xFF & SYS_lstat] = SYS_ID_NOSYS,
[0xFF & SYS_fstatat] = SYS_ID_NOSYS,
[0xFF & SYS_access] = SYS_ID_NOSYS,
[0xFF & SYS_faccessat] = SYS_ID_NOSYS,
[0xFF & SYS_pread] = SYS_ID_NOSYS,
[0xFF & SYS_pwrite] = SYS_ID_NOSYS,
[0xFF & SYS_uname] = SYS_ID_NOSYS,
[0xFF & SYS_getuid] = SYS_ID_NOSYS,
[0xFF & SYS_geteuid] = SYS_ID_NOSYS,
[0xFF & SYS_getgid] = SYS_ID_NOSYS,
[0xFF & SYS_getegid] = SYS_ID_NOSYS,
[0xFF & SYS_mmap] = SYS_ID_NOSYS,
[0xFF & SYS_munmap] = SYS_ID_NOSYS,
[0xFF & SYS_mremap] = SYS_ID_NOSYS,
[0xFF & SYS_time] = SYS_ID_NOSYS,
[0xFF & SYS_getmainvars] = SYS_ID_NOSYS,
[0xFF & SYS_rt_sigaction] = SYS_ID_NOSYS,
[0xFF & SYS_writev] = SYS_ID_NOSYS,
[0xFF & SYS_gettimeofday] = SYS_ID_GETTIMEOFDAY,
[0xFF & SYS_times] = SYS_ID_NOSYS,
[0xFF & SYS_fcntl] = SYS_ID_NOSYS,
[0xFF & SYS_getdents] = SYS_ID_NOSYS,
[0xFF & SYS_dup] = SYS_ID_NOSYS,
};
{
[0x00 ... 0xFF] = SYS_ID_NOSYS,
[0xFF &
SYS_exit] = SYS_ID_EXIT,
[0xFF &
SYS_exit_group] = SYS_ID_EXIT,
[0xFF &
SYS_getpid] = SYS_ID_NOSYS,
[0xFF &
SYS_kill] = SYS_ID_NOSYS,
[0xFF &
SYS_read] = SYS_ID_READ,
[0xFF &
SYS_write] = SYS_ID_WRITE,
[0xFF &
SYS_open] = SYS_ID_NOSYS,
[0xFF &
SYS_openat] = SYS_ID_NOSYS,
[0xFF &
SYS_close] = SYS_ID_CLOSE,
[0xFF &
SYS_lseek] = SYS_ID_NOSYS,
[0xFF &
SYS_brk] = SYS_ID_BRK,
[0xFF &
SYS_link] = SYS_ID_NOSYS,
[0xFF &
SYS_unlink] = SYS_ID_NOSYS,
[0xFF &
SYS_mkdir] = SYS_ID_NOSYS,
[0xFF &
SYS_chdir] = SYS_ID_NOSYS,
[0xFF &
SYS_getcwd] = SYS_ID_NOSYS,
[0xFF &
SYS_stat] = SYS_ID_NOSYS,
[0xFF &
SYS_fstat] = SYS_ID_FSTAT,
[0xFF &
SYS_lstat] = SYS_ID_NOSYS,
[0xFF &
SYS_fstatat] = SYS_ID_NOSYS,
[0xFF &
SYS_access] = SYS_ID_NOSYS,
[0xFF &
SYS_faccessat] = SYS_ID_NOSYS,
[0xFF &
SYS_pread] = SYS_ID_NOSYS,
[0xFF &
SYS_pwrite] = SYS_ID_NOSYS,
[0xFF &
SYS_uname] = SYS_ID_NOSYS,
[0xFF &
SYS_getuid] = SYS_ID_NOSYS,
[0xFF &
SYS_geteuid] = SYS_ID_NOSYS,
[0xFF &
SYS_getgid] = SYS_ID_NOSYS,
[0xFF &
SYS_getegid] = SYS_ID_NOSYS,
[0xFF &
SYS_mmap] = SYS_ID_NOSYS,
[0xFF &
SYS_munmap] = SYS_ID_NOSYS,
[0xFF &
SYS_mremap] = SYS_ID_NOSYS,
[0xFF &
SYS_time] = SYS_ID_NOSYS,
[0xFF &
SYS_getmainvars] = SYS_ID_NOSYS,
[0xFF &
SYS_rt_sigaction] = SYS_ID_NOSYS,
[0xFF &
SYS_writev] = SYS_ID_NOSYS,
[0xFF &
SYS_gettimeofday] = SYS_ID_GETTIMEOFDAY,
[0xFF &
SYS_times] = SYS_ID_NOSYS,
[0xFF &
SYS_fcntl] = SYS_ID_NOSYS,
[0xFF &
SYS_getdents] = SYS_ID_NOSYS,
[0xFF &
SYS_dup] = SYS_ID_NOSYS,
};
#if defined(__GNUC__)
#pragma GCC diagnostic warning "-Woverride-init"
#endif
regs[10] = syscall_table[syscall_id_table[0xFF & regs[17]]]
(
regs[10] = syscall_table[syscall_id_table[0xFF & regs[17]]](
regs[10], /* a0 */
regs[11], /* a1 */
regs[12], /* a2 */
@ -523,36 +564,35 @@ handle_misaligned_load(uintptr_t cause, uintptr_t epc, uintptr_t regs[32], uintp
/* notice this function only support 16bit or 32bit instruction */
bool compressed = (*(unsigned short *)epc & 3) != 3;
bool fpu = 0; /* load to fpu ? */
uintptr_t addr = 0; /* src addr */
uint8_t src = 0; /* src register */
uint8_t dst = 0; /* dst register */
uint8_t len = 0; /* data length */
int offset = 0; /* addr offset to addr in reg */
bool unsigned_ = 0; /* unsigned */
uint64_t data_load = 0;/* real data load */
bool fpu = 0; /* load to fpu ? */
uintptr_t addr = 0; /* src addr */
uint8_t src = 0; /* src register */
uint8_t dst = 0; /* dst register */
uint8_t len = 0; /* data length */
int offset = 0; /* addr offset to addr in reg */
bool unsigned_ = 0; /* unsigned */
uint64_t data_load = 0; /* real data load */
if (compressed)
if(compressed)
{
/* compressed instruction should not get this fault. */
goto on_error;
}
else
} else
{
uint32_t instruct = *(uint32_t *)epc;
uint8_t opcode = instruct&0x7F;
uint8_t opcode = instruct & 0x7F;
dst = (instruct >> 7)&0x1F;
len = (instruct >> 12)&3;
unsigned_ = (instruct >> 14)&1;
src = (instruct >> 15)&0x1F;
dst = (instruct >> 7) & 0x1F;
len = (instruct >> 12) & 3;
unsigned_ = (instruct >> 14) & 1;
src = (instruct >> 15) & 0x1F;
offset = (instruct >> 20);
len = 1 << len;
switch (opcode)
switch(opcode)
{
case 3:/* load */
case 3: /* load */
break;
case 7:/* fpu load */
case 7: /* fpu load */
fpu = 1;
break;
default:
@ -560,19 +600,18 @@ handle_misaligned_load(uintptr_t cause, uintptr_t epc, uintptr_t regs[32], uintp
}
}
if (offset >> 11)
if(offset >> 11)
offset = -((offset & 0x3FF) + 1);
addr = (uint64_t)((uint64_t)regs[src] + offset);
for (int i = 0; i < len; ++i)
data_load |= ((uint64_t)*((uint8_t *)addr + i)) << (8 * i);
for(int i = 0; i < len; ++i)
data_load |= ((uint64_t) * ((uint8_t *)addr + i)) << (8 * i);
if (!unsigned_ & !fpu)
if(!unsigned_ & !fpu)
{
/* adjust sign */
switch (len)
switch(len)
{
case 1:
data_load = (uint64_t)(int64_t)((int8_t)data_load);
@ -588,7 +627,7 @@ handle_misaligned_load(uintptr_t cause, uintptr_t epc, uintptr_t regs[32], uintp
}
}
if (fpu)
if(fpu)
fregs[dst] = data_load;
else
regs[dst] = data_load;
@ -616,34 +655,33 @@ handle_misaligned_store(uintptr_t cause, uintptr_t epc, uintptr_t regs[32], uint
/* notice this function only support 16bit or 32bit instruction */
bool compressed = (*(unsigned short *)epc & 3) != 3;
bool fpu = 0; /* store to fpu*/
uintptr_t addr = 0; /* src addr*/
uint8_t src = 0; /* src register*/
uint8_t dst = 0; /* dst register*/
uint8_t len = 0; /* data length*/
int offset = 0; /* addr offset to addr in reg*/
uint64_t data_store = 0;/* real data store*/
bool fpu = 0; /* store to fpu*/
uintptr_t addr = 0; /* src addr*/
uint8_t src = 0; /* src register*/
uint8_t dst = 0; /* dst register*/
uint8_t len = 0; /* data length*/
int offset = 0; /* addr offset to addr in reg*/
uint64_t data_store = 0; /* real data store*/
if (compressed)
if(compressed)
{
/* compressed instruction should not get this fault. */
goto on_error;
}
else
} else
{
uint32_t instruct = *(uint32_t *)epc;
uint8_t opcode = instruct&0x7F;
uint8_t opcode = instruct & 0x7F;
len = (instruct >> 12)&7;
dst = (instruct >> 15)&0x1F;
src = (instruct >> 20)&0x1F;
offset = ((instruct >> 7)&0x1F) | ((instruct >> 20)&0xFE0);
len = (instruct >> 12) & 7;
dst = (instruct >> 15) & 0x1F;
src = (instruct >> 20) & 0x1F;
offset = ((instruct >> 7) & 0x1F) | ((instruct >> 20) & 0xFE0);
len = 1 << len;
switch (opcode)
switch(opcode)
{
case 0x23:/* store */
case 0x23: /* store */
break;
case 0x27:/* fpu store */
case 0x27: /* fpu store */
fpu = 1;
break;
default:
@ -651,19 +689,18 @@ handle_misaligned_store(uintptr_t cause, uintptr_t epc, uintptr_t regs[32], uint
}
}
if (offset >> 11)
if(offset >> 11)
offset = -((offset & 0x3FF) + 1);
addr = (uint64_t)((uint64_t)regs[dst] + offset);
if (fpu)
if(fpu)
data_store = fregs[src];
else
data_store = regs[src];
for (int i = 0; i < len; ++i)
*((uint8_t *)addr + i) = (data_store >> (i*8)) & 0xFF;
for(int i = 0; i < len; ++i)
*((uint8_t *)addr + i) = (data_store >> (i * 8)) & 0xFF;
LOGV(TAG, "misaligned store recovered at %08lx. len:%02d,addr:%08lx,reg:%02d,data:%016lx,float:%1d", (uint64_t)epc, len, (uint64_t)addr, src, data_store, fpu);
@ -685,21 +722,21 @@ handle_fault_store(uintptr_t cause, uintptr_t epc, uintptr_t regs[32], uintptr_t
uintptr_t handle_syscall(uintptr_t cause, uintptr_t epc, uintptr_t regs[32], uintptr_t fregs[32])
{
static uintptr_t (* const cause_table[])(uintptr_t cause, uintptr_t epc, uintptr_t regs[32], uintptr_t fregs[32]) =
{
[CAUSE_MISALIGNED_FETCH] = handle_misaligned_fetch,
[CAUSE_FAULT_FETCH] = handle_fault_fetch,
[CAUSE_ILLEGAL_INSTRUCTION] = handle_illegal_instruction,
[CAUSE_BREAKPOINT] = handle_breakpoint,
[CAUSE_MISALIGNED_LOAD] = handle_misaligned_load,
[CAUSE_FAULT_LOAD] = handle_fault_load,
[CAUSE_MISALIGNED_STORE] = handle_misaligned_store,
[CAUSE_FAULT_STORE] = handle_fault_store,
[CAUSE_USER_ECALL] = handle_ecall_u,
[CAUSE_SUPERVISOR_ECALL] = handle_ecall_h,
[CAUSE_HYPERVISOR_ECALL] = handle_ecall_s,
[CAUSE_MACHINE_ECALL] = handle_ecall_m,
};
static uintptr_t (*const cause_table[])(uintptr_t cause, uintptr_t epc, uintptr_t regs[32], uintptr_t fregs[32]) =
{
[CAUSE_MISALIGNED_FETCH] = handle_misaligned_fetch,
[CAUSE_FAULT_FETCH] = handle_fault_fetch,
[CAUSE_ILLEGAL_INSTRUCTION] = handle_illegal_instruction,
[CAUSE_BREAKPOINT] = handle_breakpoint,
[CAUSE_MISALIGNED_LOAD] = handle_misaligned_load,
[CAUSE_FAULT_LOAD] = handle_fault_load,
[CAUSE_MISALIGNED_STORE] = handle_misaligned_store,
[CAUSE_FAULT_STORE] = handle_fault_store,
[CAUSE_USER_ECALL] = handle_ecall_u,
[CAUSE_SUPERVISOR_ECALL] = handle_ecall_h,
[CAUSE_HYPERVISOR_ECALL] = handle_ecall_s,
[CAUSE_MACHINE_ECALL] = handle_ecall_m,
};
return cause_table[cause](cause, epc, regs, fregs);
}
@ -708,4 +745,3 @@ size_t get_free_heap_size(void)
{
return (size_t)(&_heap_end[0] - _heap_cur);
}

330
lib/drivers/aes.c
View File

@ -14,8 +14,8 @@
*/
#include <stdlib.h>
#include <string.h>
#include "sysctl.h"
#include "aes.h"
#include "sysctl.h"
#include "utils.h"
volatile aes_t *const aes = (volatile aes_t *)AES_BASE_ADDR;
@ -76,17 +76,16 @@ static void gcm_clear_chk_tag(void)
static uint32_t gcm_check_tag(uint32_t *gcm_tag)
{
while (!gcm_get_tag_in_flag())
while(!gcm_get_tag_in_flag())
;
gcm_write_tag(gcm_tag);
while (!gcm_get_tag_chk())
while(!gcm_get_tag_chk())
;
if (gcm_get_tag_chk() == 0x2)
if(gcm_get_tag_chk() == 0x2)
{
gcm_clear_chk_tag();
return 1;
}
else
} else
{
gcm_clear_chk_tag();
return 0;
@ -125,29 +124,28 @@ void gcm_get_tag(uint8_t *gcm_tag)
gcm_check_tag((uint32_t *)gcm_tag);
}
void aes_init(uint8_t *input_key, size_t input_key_len, uint8_t *iv,size_t iv_len, uint8_t *gcm_aad,
aes_cipher_mode_t cipher_mode, aes_encrypt_sel_t encrypt_sel, size_t gcm_aad_len, size_t input_data_len)
void aes_init(uint8_t *input_key, size_t input_key_len, uint8_t *iv, size_t iv_len, uint8_t *gcm_aad,
aes_cipher_mode_t cipher_mode, aes_encrypt_sel_t encrypt_sel, size_t gcm_aad_len, size_t input_data_len)
{
size_t remainder, uint32_num, uint8_num, i;
uint32_t uint32_data;
uint8_t uint8_data[4] = {0};
size_t padding_len = input_data_len;
aes_clk_init();
if ((cipher_mode == AES_ECB) || (cipher_mode == AES_CBC))
if((cipher_mode == AES_ECB) || (cipher_mode == AES_CBC))
padding_len = ((input_data_len + 15) / 16) * 16;
aes->aes_endian |= 1;
uint32_num = input_key_len / 4;
for (i = 0; i < uint32_num; i++)
for(i = 0; i < uint32_num; i++)
{
if (i < 4)
if(i < 4)
aes->aes_key[i] = *((uint32_t *)(&input_key[input_key_len - (4 * i) - 4]));
else
aes->aes_key_ext[i - 4] = *((uint32_t *)(&input_key[input_key_len - (4 * i) - 4]));
}
uint32_num = iv_len / 4;
for (i = 0; i < uint32_num; i++)
for(i = 0; i < uint32_num; i++)
aes->aes_iv[i] = *((uint32_t *)(&iv[iv_len - (4 * i) - 4]));
aes->mode_ctl.kmode = input_key_len / 8 - 2; /* b'00:AES_128 b'01:AES_192 b'10:AES_256 b'11:RESERVED */
@ -157,39 +155,39 @@ void aes_init(uint8_t *input_key, size_t input_key_len, uint8_t *iv,size_t iv_le
aes->gb_pc_num = padding_len - 1;
aes->gb_aes_en |= 1;
if (cipher_mode == AES_GCM)
if(cipher_mode == AES_GCM)
{
uint32_num = gcm_aad_len / 4;
for (i = 0; i < uint32_num; i++)
for(i = 0; i < uint32_num; i++)
{
uint32_data = *((uint32_t *)(&gcm_aad[i * 4]));
while (!aes_get_data_in_flag())
while(!aes_get_data_in_flag())
;
aes_write_aad(uint32_data);
}
uint8_num = 4 * uint32_num;
remainder = gcm_aad_len % 4;
if (remainder)
if(remainder)
{
switch (remainder)
switch(remainder)
{
case 1:
uint8_data[0] = gcm_aad[uint8_num];
break;
case 2:
uint8_data[0] = gcm_aad[uint8_num];
uint8_data[1] = gcm_aad[uint8_num + 1];
break;
case 3:
uint8_data[0] = gcm_aad[uint8_num];
uint8_data[1] = gcm_aad[uint8_num + 1];
uint8_data[2] = gcm_aad[uint8_num + 2];
break;
default:
break;
case 1:
uint8_data[0] = gcm_aad[uint8_num];
break;
case 2:
uint8_data[0] = gcm_aad[uint8_num];
uint8_data[1] = gcm_aad[uint8_num + 1];
break;
case 3:
uint8_data[0] = gcm_aad[uint8_num];
uint8_data[1] = gcm_aad[uint8_num + 1];
uint8_data[2] = gcm_aad[uint8_num + 2];
break;
default:
break;
}
uint32_data = *((uint32_t *)(&uint8_data[0]));
while (!aes_get_data_in_flag())
while(!aes_get_data_in_flag())
;
aes_write_aad(uint32_data);
}
@ -204,18 +202,18 @@ static void aes_input_bytes(const uint8_t *input_data, size_t input_data_len, ae
padding_len = ((input_data_len + 15) / 16) * 16;
uint32_num = input_data_len / 4;
for (i = 0; i < uint32_num; i++)
for(i = 0; i < uint32_num; i++)
{
uint32_data = *((uint32_t *)(&input_data[i * 4]));
while (!aes_get_data_in_flag())
while(!aes_get_data_in_flag())
;
aes_write_text(uint32_data);
}
uint8_num = 4 * uint32_num;
remainder = input_data_len % 4;
if (remainder)
if(remainder)
{
switch (remainder)
switch(remainder)
{
case 1:
uint8_data[0] = input_data[uint8_num];
@ -233,16 +231,16 @@ static void aes_input_bytes(const uint8_t *input_data, size_t input_data_len, ae
break;
}
uint32_data = *((uint32_t *)(&uint8_data[0]));
while (!aes_get_data_in_flag())
while(!aes_get_data_in_flag())
;
aes_write_text(uint32_data);
}
if ((cipher_mode == AES_ECB) || (cipher_mode == AES_CBC))
if((cipher_mode == AES_ECB) || (cipher_mode == AES_CBC))
{
uint32_num = (padding_len - input_data_len) / 4;
for (i = 0; i < uint32_num; i++)
for(i = 0; i < uint32_num; i++)
{
while (!aes_get_data_in_flag())
while(!aes_get_data_in_flag())
;
aes_write_text(0);
}
@ -258,18 +256,18 @@ static void process_less_80_bytes(uint8_t *input_data, uint8_t *output_data, siz
padding_len = ((input_data_len + 15) / 16) * 16;
uint32_num = input_data_len / 4;
for (i = 0; i < uint32_num; i++)
for(i = 0; i < uint32_num; i++)
{
uint32_data = *((uint32_t *)(&input_data[i * 4]));
while (!aes_get_data_in_flag())
while(!aes_get_data_in_flag())
;
aes_write_text(uint32_data);
}
uint8_num = 4 * uint32_num;
remainder = input_data_len % 4;
if (remainder)
if(remainder)
{
switch (remainder)
switch(remainder)
{
case 1:
uint8_data[0] = input_data[uint8_num];
@ -287,33 +285,33 @@ static void process_less_80_bytes(uint8_t *input_data, uint8_t *output_data, siz
break;
}
uint32_data = *((uint32_t *)(&uint8_data[0]));
while (!aes_get_data_in_flag())
while(!aes_get_data_in_flag())
;
aes_write_text(uint32_data);
}
if ((cipher_mode == AES_ECB) || (cipher_mode == AES_CBC))
if((cipher_mode == AES_ECB) || (cipher_mode == AES_CBC))
{
uint32_num = (padding_len - input_data_len) / 4;
for (i = 0; i < uint32_num; i++)
for(i = 0; i < uint32_num; i++)
{
while (!aes_get_data_in_flag())
while(!aes_get_data_in_flag())
;
aes_write_text(0);
}
uint32_num = padding_len / 4;
}
for (i = 0; i < uint32_num; i++)
for(i = 0; i < uint32_num; i++)
{
while (!aes_get_data_out_flag())
while(!aes_get_data_out_flag())
;
*((uint32_t *)(&output_data[i * 4])) = aes_read_out_data();
}
if ((cipher_mode == AES_GCM) && (remainder))
if((cipher_mode == AES_GCM) && (remainder))
{
while (!aes_get_data_out_flag())
while(!aes_get_data_out_flag())
;
*((uint32_t *)(&uint8_data[0])) = aes_read_out_data();
switch (remainder)
switch(remainder)
{
case 1:
output_data[uint32_num * 4] = uint8_data[0];
@ -338,13 +336,13 @@ void aes_process(uint8_t *input_data, uint8_t *output_data, size_t input_data_le
size_t temp_len = 0;
uint32_t i = 0;
if (input_data_len >= 80)
if(input_data_len >= 80)
{
for (i = 0; i < (input_data_len / 80); i++)
for(i = 0; i < (input_data_len / 80); i++)
process_less_80_bytes(&input_data[i * 80], &output_data[i * 80], 80, cipher_mode);
}
temp_len = input_data_len % 80;
if (temp_len)
if(temp_len)
process_less_80_bytes(&input_data[i * 80], &output_data[i * 80], temp_len, cipher_mode);
}
@ -429,7 +427,7 @@ void aes_cbc256_hard_encrypt(cbc_context_t *context, uint8_t *input_data, size_t
void aes_gcm128_hard_decrypt(gcm_context_t *context, uint8_t *input_data, size_t input_len, uint8_t *output_data, uint8_t *gcm_tag)
{
aes_init(context->input_key, AES_128, context->iv, IV_LEN_96, context->gcm_aad,
AES_GCM, AES_HARD_DECRYPTION, context->gcm_aad_len, input_len);
AES_GCM, AES_HARD_DECRYPTION, context->gcm_aad_len, input_len);
aes_process(input_data, output_data, input_len, AES_GCM);
gcm_get_tag(gcm_tag);
}
@ -437,7 +435,7 @@ void aes_gcm128_hard_decrypt(gcm_context_t *context, uint8_t *input_data, size_t
void aes_gcm128_hard_encrypt(gcm_context_t *context, uint8_t *input_data, size_t input_len, uint8_t *output_data, uint8_t *gcm_tag)
{
aes_init(context->input_key, AES_128, context->iv, IV_LEN_96, context->gcm_aad,
AES_GCM, AES_HARD_ENCRYPTION, context->gcm_aad_len, input_len);
AES_GCM, AES_HARD_ENCRYPTION, context->gcm_aad_len, input_len);
aes_process(input_data, output_data, input_len, AES_GCM);
gcm_get_tag(gcm_tag);
}
@ -445,7 +443,7 @@ void aes_gcm128_hard_encrypt(gcm_context_t *context, uint8_t *input_data, size_t
void aes_gcm192_hard_decrypt(gcm_context_t *context, uint8_t *input_data, size_t input_len, uint8_t *output_data, uint8_t *gcm_tag)
{
aes_init(context->input_key, AES_192, context->iv, IV_LEN_96, context->gcm_aad,
AES_GCM, AES_HARD_DECRYPTION, context->gcm_aad_len, input_len);
AES_GCM, AES_HARD_DECRYPTION, context->gcm_aad_len, input_len);
aes_process(input_data, output_data, input_len, AES_GCM);
gcm_get_tag(gcm_tag);
}
@ -453,7 +451,7 @@ void aes_gcm192_hard_decrypt(gcm_context_t *context, uint8_t *input_data, size_t
void aes_gcm192_hard_encrypt(gcm_context_t *context, uint8_t *input_data, size_t input_len, uint8_t *output_data, uint8_t *gcm_tag)
{
aes_init(context->input_key, AES_192, context->iv, IV_LEN_96, context->gcm_aad,
AES_GCM, AES_HARD_ENCRYPTION, context->gcm_aad_len, input_len);
AES_GCM, AES_HARD_ENCRYPTION, context->gcm_aad_len, input_len);
aes_process(input_data, output_data, input_len, AES_GCM);
gcm_get_tag(gcm_tag);
}
@ -461,7 +459,7 @@ void aes_gcm192_hard_encrypt(gcm_context_t *context, uint8_t *input_data, size_t
void aes_gcm256_hard_decrypt(gcm_context_t *context, uint8_t *input_data, size_t input_len, uint8_t *output_data, uint8_t *gcm_tag)
{
aes_init(context->input_key, AES_256, context->iv, IV_LEN_96, context->gcm_aad,
AES_GCM, AES_HARD_DECRYPTION, context->gcm_aad_len, input_len);
AES_GCM, AES_HARD_DECRYPTION, context->gcm_aad_len, input_len);
aes_process(input_data, output_data, input_len, AES_GCM);
gcm_get_tag(gcm_tag);
}
@ -469,16 +467,16 @@ void aes_gcm256_hard_decrypt(gcm_context_t *context, uint8_t *input_data, size_t
void aes_gcm256_hard_encrypt(gcm_context_t *context, uint8_t *input_data, size_t input_len, uint8_t *output_data, uint8_t *gcm_tag)
{
aes_init(context->input_key, AES_256, context->iv, IV_LEN_96, context->gcm_aad,
AES_GCM, AES_HARD_ENCRYPTION, context->gcm_aad_len, input_len);
AES_GCM, AES_HARD_ENCRYPTION, context->gcm_aad_len, input_len);
aes_process(input_data, output_data, input_len, AES_GCM);
gcm_get_tag(gcm_tag);
}
void aes_ecb128_hard_decrypt_dma(dmac_channel_number_t dma_receive_channel_num,
uint8_t *input_key,
uint8_t *input_data,
size_t input_len,
uint8_t *output_data)
uint8_t *input_key,
uint8_t *input_data,
size_t input_len,
uint8_t *output_data)
{
size_t padding_len = ((input_len + 15) / 16) * 16;
aes_init(input_key, AES_128, NULL, 0L, NULL, AES_ECB, AES_HARD_DECRYPTION, 0L, input_len);
@ -486,18 +484,17 @@ void aes_ecb128_hard_decrypt_dma(dmac_channel_number_t dma_receive_channel_num,
sysctl_dma_select(dma_receive_channel_num, SYSCTL_DMA_SELECT_AES_REQ);
aes->dma_sel = 1;
dmac_set_single_mode(dma_receive_channel_num, (void *)(&aes->aes_out_data), output_data, DMAC_ADDR_NOCHANGE, DMAC_ADDR_INCREMENT,
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, padding_len >> 2);
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, padding_len >> 2);
aes_input_bytes(input_data, input_len, AES_ECB);
dmac_wait_done(dma_receive_channel_num);
}
void aes_ecb128_hard_encrypt_dma(dmac_channel_number_t dma_receive_channel_num,
uint8_t *input_key,
uint8_t *input_data,
size_t input_len,
uint8_t *output_data)
uint8_t *input_key,
uint8_t *input_data,
size_t input_len,
uint8_t *output_data)
{
aes_init(input_key, AES_128, NULL, 0L, NULL, AES_ECB, AES_HARD_ENCRYPTION, 0L, input_len);
size_t padding_len = ((input_len + 15) / 16) * 16;
@ -505,16 +502,16 @@ void aes_ecb128_hard_encrypt_dma(dmac_channel_number_t dma_receive_channel_num,
sysctl_dma_select(dma_receive_channel_num, SYSCTL_DMA_SELECT_AES_REQ);
aes->dma_sel = 1;
dmac_set_single_mode(dma_receive_channel_num, (void *)(&aes->aes_out_data), output_data, DMAC_ADDR_NOCHANGE, DMAC_ADDR_INCREMENT,
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, padding_len >> 2);
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, padding_len >> 2);
aes_input_bytes(input_data, input_len, AES_ECB);
dmac_wait_done(dma_receive_channel_num);
}
void aes_ecb192_hard_decrypt_dma(dmac_channel_number_t dma_receive_channel_num,
uint8_t *input_key,
uint8_t *input_data,
size_t input_len,
uint8_t *output_data)
uint8_t *input_key,
uint8_t *input_data,
size_t input_len,
uint8_t *output_data)
{
size_t padding_len = ((input_len + 15) / 16) * 16;
aes_init(input_key, AES_192, NULL, 0L, NULL, AES_ECB, AES_HARD_DECRYPTION, 0L, input_len);
@ -522,16 +519,16 @@ void aes_ecb192_hard_decrypt_dma(dmac_channel_number_t dma_receive_channel_num,
sysctl_dma_select(dma_receive_channel_num, SYSCTL_DMA_SELECT_AES_REQ);
aes->dma_sel = 1;
dmac_set_single_mode(dma_receive_channel_num, (void *)(&aes->aes_out_data), output_data, DMAC_ADDR_NOCHANGE, DMAC_ADDR_INCREMENT,
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, padding_len >> 2);
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, padding_len >> 2);
aes_input_bytes(input_data, input_len, AES_ECB);
dmac_wait_done(dma_receive_channel_num);
}
void aes_ecb192_hard_encrypt_dma(dmac_channel_number_t dma_receive_channel_num,
uint8_t *input_key,
uint8_t *input_data,
size_t input_len,
uint8_t *output_data)
uint8_t *input_key,
uint8_t *input_data,
size_t input_len,
uint8_t *output_data)
{
aes_init(input_key, AES_192, NULL, 0L, NULL, AES_ECB, AES_HARD_ENCRYPTION, 0L, input_len);
size_t padding_len = ((input_len + 15) / 16) * 16;
@ -539,16 +536,16 @@ void aes_ecb192_hard_encrypt_dma(dmac_channel_number_t dma_receive_channel_num,
sysctl_dma_select(dma_receive_channel_num, SYSCTL_DMA_SELECT_AES_REQ);
aes->dma_sel = 1;
dmac_set_single_mode(dma_receive_channel_num, (void *)(&aes->aes_out_data), output_data, DMAC_ADDR_NOCHANGE, DMAC_ADDR_INCREMENT,
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, padding_len >> 2);
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, padding_len >> 2);
aes_input_bytes(input_data, input_len, AES_ECB);
dmac_wait_done(dma_receive_channel_num);
}
void aes_ecb256_hard_decrypt_dma(dmac_channel_number_t dma_receive_channel_num,
uint8_t *input_key,
uint8_t *input_data,
size_t input_len,
uint8_t *output_data)
uint8_t *input_key,
uint8_t *input_data,
size_t input_len,
uint8_t *output_data)
{
size_t padding_len = ((input_len + 15) / 16) * 16;
aes_init(input_key, AES_256, NULL, 0L, NULL, AES_ECB, AES_HARD_DECRYPTION, 0L, input_len);
@ -556,16 +553,16 @@ void aes_ecb256_hard_decrypt_dma(dmac_channel_number_t dma_receive_channel_num,
sysctl_dma_select(dma_receive_channel_num, SYSCTL_DMA_SELECT_AES_REQ);
aes->dma_sel = 1;
dmac_set_single_mode(dma_receive_channel_num, (void *)(&aes->aes_out_data), output_data, DMAC_ADDR_NOCHANGE, DMAC_ADDR_INCREMENT,
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, padding_len >> 2);
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, padding_len >> 2);
aes_input_bytes(input_data, input_len, AES_ECB);
dmac_wait_done(dma_receive_channel_num);
}
void aes_ecb256_hard_encrypt_dma(dmac_channel_number_t dma_receive_channel_num,
uint8_t *input_key,
uint8_t *input_data,
size_t input_len,
uint8_t *output_data)
uint8_t *input_key,
uint8_t *input_data,
size_t input_len,
uint8_t *output_data)
{
aes_init(input_key, AES_256, NULL, 0L, NULL, AES_ECB, AES_HARD_ENCRYPTION, 0L, input_len);
size_t padding_len = ((input_len + 15) / 16) * 16;
@ -573,17 +570,17 @@ void aes_ecb256_hard_encrypt_dma(dmac_channel_number_t dma_receive_channel_num,
sysctl_dma_select(dma_receive_channel_num, SYSCTL_DMA_SELECT_AES_REQ);
aes->dma_sel = 1;
dmac_set_single_mode(dma_receive_channel_num, (void *)(&aes->aes_out_data), output_data, DMAC_ADDR_NOCHANGE, DMAC_ADDR_INCREMENT,
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, padding_len >> 2);
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, padding_len >> 2);
aes_input_bytes(input_data, input_len, AES_ECB);
dmac_wait_done(dma_receive_channel_num);
}
void aes_cbc128_hard_decrypt_dma(dmac_channel_number_t dma_receive_channel_num,
cbc_context_t *context,
uint8_t *input_data,
size_t input_len,
uint8_t *output_data)
cbc_context_t *context,
uint8_t *input_data,
size_t input_len,
uint8_t *output_data)
{
size_t padding_len = ((input_len + 15) / 16) * 16;
aes_init(context->input_key, AES_128, context->iv, IV_LEN_128, NULL, AES_CBC, AES_HARD_DECRYPTION, 0L, input_len);
@ -591,16 +588,16 @@ void aes_cbc128_hard_decrypt_dma(dmac_channel_number_t dma_receive_channel_num,
sysctl_dma_select(dma_receive_channel_num, SYSCTL_DMA_SELECT_AES_REQ);
aes->dma_sel = 1;
dmac_set_single_mode(dma_receive_channel_num, (void *)(&aes->aes_out_data), output_data, DMAC_ADDR_NOCHANGE, DMAC_ADDR_INCREMENT,
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, padding_len >> 2);
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, padding_len >> 2);
aes_input_bytes(input_data, input_len, AES_CBC);
dmac_wait_done(dma_receive_channel_num);
}
void aes_cbc128_hard_encrypt_dma(dmac_channel_number_t dma_receive_channel_num,
cbc_context_t *context,
uint8_t *input_data,
size_t input_len,
uint8_t *output_data)
cbc_context_t *context,
uint8_t *input_data,
size_t input_len,
uint8_t *output_data)
{
aes_init(context->input_key, AES_128, context->iv, IV_LEN_128, NULL, AES_CBC, AES_HARD_ENCRYPTION, 0L, input_len);
size_t padding_len = ((input_len + 15) / 16) * 16;
@ -608,16 +605,16 @@ void aes_cbc128_hard_encrypt_dma(dmac_channel_number_t dma_receive_channel_num,
sysctl_dma_select(dma_receive_channel_num, SYSCTL_DMA_SELECT_AES_REQ);
aes->dma_sel = 1;
dmac_set_single_mode(dma_receive_channel_num, (void *)(&aes->aes_out_data), output_data, DMAC_ADDR_NOCHANGE, DMAC_ADDR_INCREMENT,
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, padding_len >> 2);
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, padding_len >> 2);
aes_input_bytes(input_data, input_len, AES_CBC);
dmac_wait_done(dma_receive_channel_num);
}
void aes_cbc192_hard_decrypt_dma(dmac_channel_number_t dma_receive_channel_num,
cbc_context_t *context,
uint8_t *input_data,
size_t input_len,
uint8_t *output_data)
cbc_context_t *context,
uint8_t *input_data,
size_t input_len,
uint8_t *output_data)
{
size_t padding_len = ((input_len + 15) / 16) * 16;
aes_init(context->input_key, AES_192, context->iv, IV_LEN_128, NULL, AES_CBC, AES_HARD_DECRYPTION, 0L, input_len);
@ -625,16 +622,16 @@ void aes_cbc192_hard_decrypt_dma(dmac_channel_number_t dma_receive_channel_num,
sysctl_dma_select(dma_receive_channel_num, SYSCTL_DMA_SELECT_AES_REQ);
aes->dma_sel = 1;
dmac_set_single_mode(dma_receive_channel_num, (void *)(&aes->aes_out_data), output_data, DMAC_ADDR_NOCHANGE, DMAC_ADDR_INCREMENT,
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, padding_len >> 2);
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, padding_len >> 2);
aes_input_bytes(input_data, input_len, AES_CBC);
dmac_wait_done(dma_receive_channel_num);
}
void aes_cbc192_hard_encrypt_dma(dmac_channel_number_t dma_receive_channel_num,
cbc_context_t *context,
uint8_t *input_data,
size_t input_len,
uint8_t *output_data)
cbc_context_t *context,
uint8_t *input_data,
size_t input_len,
uint8_t *output_data)
{
aes_init(context->input_key, AES_192, context->iv, IV_LEN_128, NULL, AES_CBC, AES_HARD_ENCRYPTION, 0L, input_len);
size_t padding_len = ((input_len + 15) / 16) * 16;
@ -642,16 +639,16 @@ void aes_cbc192_hard_encrypt_dma(dmac_channel_number_t dma_receive_channel_num,
sysctl_dma_select(dma_receive_channel_num, SYSCTL_DMA_SELECT_AES_REQ);
aes->dma_sel = 1;
dmac_set_single_mode(dma_receive_channel_num, (void *)(&aes->aes_out_data), output_data, DMAC_ADDR_NOCHANGE, DMAC_ADDR_INCREMENT,
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, padding_len >> 2);
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, padding_len >> 2);
aes_input_bytes(input_data, input_len, AES_CBC);
dmac_wait_done(dma_receive_channel_num);
}
void aes_cbc256_hard_decrypt_dma(dmac_channel_number_t dma_receive_channel_num,
cbc_context_t *context,
uint8_t *input_data,
size_t input_len,
uint8_t *output_data)
cbc_context_t *context,
uint8_t *input_data,
size_t input_len,
uint8_t *output_data)
{
size_t padding_len = ((input_len + 15) / 16) * 16;
aes_init(context->input_key, AES_256, context->iv, IV_LEN_128, NULL, AES_CBC, AES_HARD_DECRYPTION, 0L, input_len);
@ -659,16 +656,16 @@ void aes_cbc256_hard_decrypt_dma(dmac_channel_number_t dma_receive_channel_num,
sysctl_dma_select(dma_receive_channel_num, SYSCTL_DMA_SELECT_AES_REQ);
aes->dma_sel = 1;
dmac_set_single_mode(dma_receive_channel_num, (void *)(&aes->aes_out_data), output_data, DMAC_ADDR_NOCHANGE, DMAC_ADDR_INCREMENT,
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, padding_len >> 2);
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, padding_len >> 2);
aes_input_bytes(input_data, input_len, AES_CBC);
dmac_wait_done(dma_receive_channel_num);
}
void aes_cbc256_hard_encrypt_dma(dmac_channel_number_t dma_receive_channel_num,
cbc_context_t *context,
uint8_t *input_data,
size_t input_len,
uint8_t *output_data)
cbc_context_t *context,
uint8_t *input_data,
size_t input_len,
uint8_t *output_data)
{
aes_init(context->input_key, AES_256, context->iv, IV_LEN_128, NULL, AES_CBC, AES_HARD_ENCRYPTION, 0L, input_len);
size_t padding_len = ((input_len + 15) / 16) * 16;
@ -676,25 +673,25 @@ void aes_cbc256_hard_encrypt_dma(dmac_channel_number_t dma_receive_channel_num,
sysctl_dma_select(dma_receive_channel_num, SYSCTL_DMA_SELECT_AES_REQ);
aes->dma_sel = 1;
dmac_set_single_mode(dma_receive_channel_num, (void *)(&aes->aes_out_data), output_data, DMAC_ADDR_NOCHANGE, DMAC_ADDR_INCREMENT,
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, padding_len >> 2);
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, padding_len >> 2);
aes_input_bytes(input_data, input_len, AES_CBC);
dmac_wait_done(dma_receive_channel_num);
}
void aes_gcm128_hard_decrypt_dma(dmac_channel_number_t dma_receive_channel_num,
gcm_context_t *context,
uint8_t *input_data,
size_t input_len,
uint8_t *output_data,
uint8_t *gcm_tag)
gcm_context_t *context,
uint8_t *input_data,
size_t input_len,
uint8_t *output_data,
uint8_t *gcm_tag)
{
aes_init(context->input_key, AES_128, context->iv, IV_LEN_96, context->gcm_aad,
AES_GCM, AES_HARD_DECRYPTION, context->gcm_aad_len, input_len);
AES_GCM, AES_HARD_DECRYPTION, context->gcm_aad_len, input_len);
sysctl_dma_select(dma_receive_channel_num, SYSCTL_DMA_SELECT_AES_REQ);
aes->dma_sel = 1;
dmac_set_single_mode(dma_receive_channel_num, (void *)(&aes->aes_out_data), output_data, DMAC_ADDR_NOCHANGE, DMAC_ADDR_INCREMENT,
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, (input_len + 3) >> 2);
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, (input_len + 3) >> 2);
aes_input_bytes(input_data, input_len, AES_GCM);
dmac_wait_done(dma_receive_channel_num);
@ -702,19 +699,19 @@ void aes_gcm128_hard_decrypt_dma(dmac_channel_number_t dma_receive_channel_num,
}
void aes_gcm128_hard_encrypt_dma(dmac_channel_number_t dma_receive_channel_num,
gcm_context_t *context,
uint8_t *input_data,
size_t input_len,
uint8_t *output_data,
uint8_t *gcm_tag)
gcm_context_t *context,
uint8_t *input_data,
size_t input_len,
uint8_t *output_data,
uint8_t *gcm_tag)
{
aes_init(context->input_key, AES_128, context->iv, IV_LEN_96, context->gcm_aad,
AES_GCM, AES_HARD_ENCRYPTION, context->gcm_aad_len, input_len);
AES_GCM, AES_HARD_ENCRYPTION, context->gcm_aad_len, input_len);
sysctl_dma_select(dma_receive_channel_num, SYSCTL_DMA_SELECT_AES_REQ);
aes->dma_sel = 1;
dmac_set_single_mode(dma_receive_channel_num, (void *)(&aes->aes_out_data), output_data, DMAC_ADDR_NOCHANGE, DMAC_ADDR_INCREMENT,
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, (input_len + 3) >> 2);
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, (input_len + 3) >> 2);
aes_input_bytes(input_data, input_len, AES_GCM);
dmac_wait_done(dma_receive_channel_num);
@ -722,19 +719,19 @@ void aes_gcm128_hard_encrypt_dma(dmac_channel_number_t dma_receive_channel_num,
}
void aes_gcm192_hard_decrypt_dma(dmac_channel_number_t dma_receive_channel_num,
gcm_context_t *context,
uint8_t *input_data,
size_t input_len,
uint8_t *output_data,
uint8_t *gcm_tag)
gcm_context_t *context,
uint8_t *input_data,
size_t input_len,
uint8_t *output_data,
uint8_t *gcm_tag)
{
aes_init(context->input_key, AES_192, context->iv, IV_LEN_96, context->gcm_aad,
AES_GCM, AES_HARD_DECRYPTION, context->gcm_aad_len, input_len);
AES_GCM, AES_HARD_DECRYPTION, context->gcm_aad_len, input_len);
sysctl_dma_select(dma_receive_channel_num, SYSCTL_DMA_SELECT_AES_REQ);
aes->dma_sel = 1;
dmac_set_single_mode(dma_receive_channel_num, (void *)(&aes->aes_out_data), output_data, DMAC_ADDR_NOCHANGE, DMAC_ADDR_INCREMENT,
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, (input_len + 3) >> 2);
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, (input_len + 3) >> 2);
aes_input_bytes(input_data, input_len, AES_GCM);
dmac_wait_done(dma_receive_channel_num);
@ -742,19 +739,19 @@ void aes_gcm192_hard_decrypt_dma(dmac_channel_number_t dma_receive_channel_num,
}
void aes_gcm192_hard_encrypt_dma(dmac_channel_number_t dma_receive_channel_num,
gcm_context_t *context,
uint8_t *input_data,
size_t input_len,
uint8_t *output_data,
uint8_t *gcm_tag)
gcm_context_t *context,
uint8_t *input_data,
size_t input_len,
uint8_t *output_data,
uint8_t *gcm_tag)
{
aes_init(context->input_key, AES_192, context->iv, IV_LEN_96, context->gcm_aad,
AES_GCM, AES_HARD_ENCRYPTION, context->gcm_aad_len, input_len);
AES_GCM, AES_HARD_ENCRYPTION, context->gcm_aad_len, input_len);
sysctl_dma_select(dma_receive_channel_num, SYSCTL_DMA_SELECT_AES_REQ);
aes->dma_sel = 1;
dmac_set_single_mode(dma_receive_channel_num, (void *)(&aes->aes_out_data), output_data, DMAC_ADDR_NOCHANGE, DMAC_ADDR_INCREMENT,
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, (input_len + 3) >> 2);
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, (input_len + 3) >> 2);
aes_input_bytes(input_data, input_len, AES_GCM);
dmac_wait_done(dma_receive_channel_num);
@ -762,19 +759,19 @@ void aes_gcm192_hard_encrypt_dma(dmac_channel_number_t dma_receive_channel_num,
}
void aes_gcm256_hard_decrypt_dma(dmac_channel_number_t dma_receive_channel_num,
gcm_context_t *context,
uint8_t *input_data,
size_t input_len,
uint8_t *output_data,
uint8_t *gcm_tag)
gcm_context_t *context,
uint8_t *input_data,
size_t input_len,
uint8_t *output_data,
uint8_t *gcm_tag)
{
aes_init(context->input_key, AES_256, context->iv, IV_LEN_96, context->gcm_aad,
AES_GCM, AES_HARD_DECRYPTION, context->gcm_aad_len, input_len);
AES_GCM, AES_HARD_DECRYPTION, context->gcm_aad_len, input_len);
sysctl_dma_select(dma_receive_channel_num, SYSCTL_DMA_SELECT_AES_REQ);
aes->dma_sel = 1;
dmac_set_single_mode(dma_receive_channel_num, (void *)(&aes->aes_out_data), output_data, DMAC_ADDR_NOCHANGE, DMAC_ADDR_INCREMENT,
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, (input_len + 3) >> 2);
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, (input_len + 3) >> 2);
aes_input_bytes(input_data, input_len, AES_GCM);
dmac_wait_done(dma_receive_channel_num);
@ -782,22 +779,21 @@ void aes_gcm256_hard_decrypt_dma(dmac_channel_number_t dma_receive_channel_num,
}
void aes_gcm256_hard_encrypt_dma(dmac_channel_number_t dma_receive_channel_num,
gcm_context_t *context,
uint8_t *input_data,
size_t input_len,
uint8_t *output_data,
uint8_t *gcm_tag)
gcm_context_t *context,
uint8_t *input_data,
size_t input_len,
uint8_t *output_data,
uint8_t *gcm_tag)
{
aes_init(context->input_key, AES_256, context->iv, IV_LEN_96, context->gcm_aad,
AES_GCM, AES_HARD_ENCRYPTION, context->gcm_aad_len, input_len);
AES_GCM, AES_HARD_ENCRYPTION, context->gcm_aad_len, input_len);
sysctl_dma_select(dma_receive_channel_num, SYSCTL_DMA_SELECT_AES_REQ);
aes->dma_sel = 1;
dmac_set_single_mode(dma_receive_channel_num, (void *)(&aes->aes_out_data), output_data, DMAC_ADDR_NOCHANGE, DMAC_ADDR_INCREMENT,
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, (input_len + 3) >> 2);
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, (input_len + 3) >> 2);
aes_input_bytes(input_data, input_len, AES_GCM);
dmac_wait_done(dma_receive_channel_num);
gcm_get_tag(gcm_tag);
}

115
lib/drivers/apu.c
View File

@ -12,14 +12,14 @@
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include <math.h>
#include <stddef.h>
#include <stdint.h>
#include <math.h>
#include "apu.h"
#include "syscalls.h"
#include "sysctl.h"
#include "apu.h"
#define BEAFORMING_BASE_ADDR (0x50250200)
#define BEAFORMING_BASE_ADDR (0x50250200)
#ifndef M_PI
#define M_PI 3.14159265358979323846264338327950288
#endif
@ -126,20 +126,16 @@ void apu_set_src_mode(uint8_t src_mode)
*/
void apu_set_direction_delay(uint8_t dir_num, uint8_t *dir_bidx)
{
apu->bf_dir_bidx[dir_num][0] =(apu_dir_bidx_t)
{
apu->bf_dir_bidx[dir_num][0] = (apu_dir_bidx_t){
.dir_rd_idx0 = dir_bidx[0],
.dir_rd_idx1 = dir_bidx[1],
.dir_rd_idx2 = dir_bidx[2],
.dir_rd_idx3 = dir_bidx[3]
};
apu->bf_dir_bidx[dir_num][1] =(apu_dir_bidx_t)
{
.dir_rd_idx3 = dir_bidx[3]};
apu->bf_dir_bidx[dir_num][1] = (apu_dir_bidx_t){
.dir_rd_idx0 = dir_bidx[4],
.dir_rd_idx1 = dir_bidx[5],
.dir_rd_idx2 = dir_bidx[6],
.dir_rd_idx3 = dir_bidx[7]
};
.dir_rd_idx3 = dir_bidx[7]};
}
/*
@ -148,12 +144,12 @@ void apu_set_direction_delay(uint8_t dir_num, uint8_t *dir_bidx)
void apu_set_delay(float radius, uint8_t mic_num_a_circle, uint8_t center)
{
uint8_t offsets[16][8];
int i,j;
int i, j;
float seta[8], delay[8], hudu_jiao;
float cm_tick = (float)SOUND_SPEED * 100 / I2S_FS;/*distance per tick (cm)*/
float cm_tick = (float)SOUND_SPEED * 100 / I2S_FS; /*distance per tick (cm)*/
float min;
for (i = 0; i < mic_num_a_circle; ++i)
for(i = 0; i < mic_num_a_circle; ++i)
{
seta[i] = 360 * i / mic_num_a_circle;
hudu_jiao = 2 * M_PI * seta[i] / 360;
@ -162,17 +158,16 @@ void apu_set_delay(float radius, uint8_t mic_num_a_circle, uint8_t center)
if(center)
delay[mic_num_a_circle] = radius / cm_tick;
for (i = 0; i < mic_num_a_circle + center; ++i)
for(i = 0; i < mic_num_a_circle + center; ++i)
{
offsets[0][i] = (int)(delay[i] + 0.5);
}
for(; i < 8; i++)
offsets[0][i] = 0;
for (j = 1; j < DIRECTION_RES; ++j)
for(j = 1; j < DIRECTION_RES; ++j)
{
for (i = 0; i < mic_num_a_circle; ++i)
for(i = 0; i < mic_num_a_circle; ++i)
{
seta[i] -= 360 / DIRECTION_RES;
hudu_jiao = 2 * M_PI * seta[i] / 360;
@ -182,27 +177,27 @@ void apu_set_delay(float radius, uint8_t mic_num_a_circle, uint8_t center)
delay[mic_num_a_circle] = radius / cm_tick;
min = 2 * radius;
for (i = 0; i < mic_num_a_circle; ++i)
for(i = 0; i < mic_num_a_circle; ++i)
{
if(delay[i] < min)
min = delay[i];
}
if(min)
{
for (i = 0; i < mic_num_a_circle + center; ++i)
for(i = 0; i < mic_num_a_circle + center; ++i)
{
delay[i] = delay[i] - min;
}
}
for (i = 0; i < mic_num_a_circle + center; ++i)
for(i = 0; i < mic_num_a_circle + center; ++i)
{
offsets[j][i] = (int)(delay[i] + 0.5);
}
for(; i < 8; i++)
offsets[0][i] = 0;
}
for (size_t i = 0; i < DIRECTION_RES; i++)
for(size_t i = 0; i < DIRECTION_RES; i++)
{
apu_set_direction_delay(i, offsets[i]);
}
@ -289,12 +284,12 @@ void apu_dir_set_prev_fir(uint16_t *fir_coef)
{
uint8_t i = 0;
for (i = 0; i < 9; i++) {
for(i = 0; i < 9; i++)
{
apu->bf_pre_fir0_coef[i] =
(apu_fir_coef_t){
.fir_tap0 = fir_coef[i * 2],
.fir_tap1 = i == 8 ? 0 : fir_coef[i * 2 + 1]
};
(apu_fir_coef_t){
.fir_tap0 = fir_coef[i * 2],
.fir_tap1 = i == 8 ? 0 : fir_coef[i * 2 + 1]};
}
}
@ -302,12 +297,12 @@ void apu_dir_set_post_fir(uint16_t *fir_coef)
{
uint8_t i = 0;
for (i = 0; i < 9; i++) {
for(i = 0; i < 9; i++)
{
apu->bf_post_fir0_coef[i] =
(apu_fir_coef_t){
.fir_tap0 = fir_coef[i * 2],
.fir_tap1 = i == 8 ? 0 : fir_coef[i * 2 + 1]
};
(apu_fir_coef_t){
.fir_tap0 = fir_coef[i * 2],
.fir_tap1 = i == 8 ? 0 : fir_coef[i * 2 + 1]};
}
}
@ -315,12 +310,12 @@ void apu_voc_set_prev_fir(uint16_t *fir_coef)
{
uint8_t i = 0;
for (i = 0; i < 9; i++) {
for(i = 0; i < 9; i++)
{
apu->bf_pre_fir1_coef[i] =
(apu_fir_coef_t){
.fir_tap0 = fir_coef[i * 2],
.fir_tap1 = i == 8 ? 0 : fir_coef[i * 2 + 1]
};
(apu_fir_coef_t){
.fir_tap0 = fir_coef[i * 2],
.fir_tap1 = i == 8 ? 0 : fir_coef[i * 2 + 1]};
}
}
@ -328,22 +323,21 @@ void apu_voc_set_post_fir(uint16_t *fir_coef)
{
uint8_t i = 0;
for (i = 0; i < 9; i++) {
for(i = 0; i < 9; i++)
{
apu->bf_post_fir1_coef[i] =
(apu_fir_coef_t){
.fir_tap0 = fir_coef[i * 2],
.fir_tap1 = i == 8 ? 0 : fir_coef[i * 2 + 1]
};
(apu_fir_coef_t){
.fir_tap0 = fir_coef[i * 2],
.fir_tap1 = i == 8 ? 0 : fir_coef[i * 2 + 1]};
}
}
void apu_set_fft_shift_factor(uint8_t enable_flag, uint16_t shift_factor)
{
apu->bf_fft_cfg_reg =
(apu_fft_cfg_t){
.fft_enable = enable_flag,
.fft_shift_factor = shift_factor
};
(apu_fft_cfg_t){
.fft_enable = enable_flag,
.fft_shift_factor = shift_factor};
apu_ch_cfg_t ch_cfg = apu->bf_ch_cfg_reg;
@ -396,32 +390,29 @@ void apu_set_down_size(uint8_t dir_dwn_size, uint8_t voc_dwn_size)
void apu_set_interrupt_mask(uint8_t dir_int_mask, uint8_t voc_int_mask)
{
apu->bf_int_mask_reg =
(apu_int_mask_t){
.dir_data_rdy_msk = dir_int_mask,
.voc_buf_rdy_msk = voc_int_mask
};
(apu_int_mask_t){
.dir_data_rdy_msk = dir_int_mask,
.voc_buf_rdy_msk = voc_int_mask};
}
void apu_dir_clear_int_state(void)
{
apu->bf_int_stat_reg =
(apu_int_stat_t){
.dir_search_data_rdy = 1
};
(apu_int_stat_t){
.dir_search_data_rdy = 1};
}
void apu_voc_clear_int_state(void)
{
apu->bf_int_stat_reg =
(apu_int_stat_t){
.voc_buf_data_rdy = 1
};
(apu_int_stat_t){
.voc_buf_data_rdy = 1};
}
/* reset saturation_counter */
void apu_voc_reset_saturation_counter(void)
{
apu->saturation_counter = 1<<31;
apu->saturation_counter = 1 << 31;
}
/*get saturation counter*/
@ -434,7 +425,7 @@ uint32_t apu_voc_get_saturation_counter(void)
/*set saturation limit*/
void apu_voc_set_saturation_limit(uint16_t upper, uint16_t bottom)
{
apu->saturation_limits = (uint32_t)bottom<<16 | upper;
apu->saturation_limits = (uint32_t)bottom << 16 | upper;
}
/*get saturation limit*/
@ -447,7 +438,8 @@ uint32_t apu_voc_get_saturation_limit(void)
static void print_fir(const char *member_name, volatile apu_fir_coef_t *pfir)
{
printf(" for(int i = 0; i < 9; i++){\n");
for (int i = 0; i < 9; i++) {
for(int i = 0; i < 9; i++)
{
apu_fir_coef_t fir = pfir[i];
printf(" apu->%s[%d] = (apu_fir_coef_t){\n", member_name, i);
@ -478,7 +470,8 @@ void apu_print_setting(void)
printf(" };\n");
printf(" for(int i = 0; i < 16; i++){\n");
for (int i = 0; i < 16; i++) {
for(int i = 0; i < 16; i++)
{
apu_dir_bidx_t bidx0 = apu->bf_dir_bidx[i][0];
apu_dir_bidx_t bidx1 = apu->bf_dir_bidx[i][1];
@ -502,7 +495,6 @@ void apu_print_setting(void)
print_fir("bf_pre_fir1_coef", apu->bf_pre_fir1_coef);
print_fir("bf_post_fir1_coef", apu->bf_post_fir1_coef);
apu_dwsz_cfg_t bf_dwsz_cfg_reg = apu->bf_dwsz_cfg_reg;
printf(" apu->bf_dwsz_cfg_reg = (apu_dwsz_cfg_t){\n");
@ -526,4 +518,3 @@ void apu_print_setting(void)
printf("}\n");
}

30
lib/drivers/clint.c
View File

@ -14,11 +14,11 @@
*/
#include <stddef.h>
#include <stdint.h>
#include "encoding.h"
#include "clint.h"
#include "encoding.h"
#include "sysctl.h"
volatile clint_t* const clint = (volatile clint_t*)CLINT_BASE_ADDR;
volatile clint_t *const clint = (volatile clint_t *)CLINT_BASE_ADDR;
static clint_timer_instance_t clint_timer_instance[CLINT_NUM_CORES];
static clint_ipi_instance_t clint_ipi_instance[CLINT_NUM_CORES];
@ -68,16 +68,16 @@ int clint_timer_start(uint64_t interval, int single_shot)
/* Read core id */
unsigned long core_id = current_coreid();
/* Set timer interval */
if (clint_timer_set_interval(interval) != 0)
if(clint_timer_set_interval(interval) != 0)
return -1;
/* Set timer single shot */
if (clint_timer_set_single_shot(single_shot) != 0)
if(clint_timer_set_single_shot(single_shot) != 0)
return -1;
/* Check settings to prevent interval is 0 */
if (clint_timer_instance[core_id].interval == 0)
if(clint_timer_instance[core_id].interval == 0)
return -1;
/* Check settings to prevent cycles is 0 */
if (clint_timer_instance[core_id].cycles == 0)
if(clint_timer_instance[core_id].cycles == 0)
return -1;
/* Add cycle interval to mtimecmp */
uint64_t now = clint->mtime;
@ -103,7 +103,7 @@ int clint_timer_set_interval(uint64_t interval)
/* Read core id */
unsigned long core_id = current_coreid();
/* Check parameter */
if (interval == 0)
if(interval == 0)
return -1;
/* Assign user interval with Millisecond(ms) */
@ -182,7 +182,7 @@ int clint_ipi_disable(void)
int clint_ipi_send(size_t core_id)
{
if (core_id >= CLINT_NUM_CORES)
if(core_id >= CLINT_NUM_CORES)
return -1;
clint->msip[core_id].msip = 1;
return 0;
@ -190,9 +190,9 @@ int clint_ipi_send(size_t core_id)
int clint_ipi_clear(size_t core_id)
{
if (core_id >= CLINT_NUM_CORES)
if(core_id >= CLINT_NUM_CORES)
return -1;
if (clint->msip[core_id].msip)
if(clint->msip[core_id].msip)
{
clint->msip[core_id].msip = 0;
return 1;
@ -225,19 +225,18 @@ uintptr_t handle_irq_m_timer(uintptr_t cause, uintptr_t epc)
clear_csr(mie, MIP_MTIP | MIP_MSIP);
set_csr(mstatus, MSTATUS_MIE);
if (clint_timer_instance[core_id].callback != NULL)
if(clint_timer_instance[core_id].callback != NULL)
clint_timer_instance[core_id].callback(
clint_timer_instance[core_id].ctx);
clear_csr(mstatus, MSTATUS_MIE);
set_csr(mstatus, MSTATUS_MPIE | MSTATUS_MPP);
write_csr(mie, ie_flag);
/* If not single shot and cycle interval is not 0, repeat this timer */
if (!clint_timer_instance[core_id].single_shot && clint_timer_instance[core_id].cycles != 0)
if(!clint_timer_instance[core_id].single_shot && clint_timer_instance[core_id].cycles != 0)
{
/* Set mtimecmp by core id */
clint->mtimecmp[core_id] += clint_timer_instance[core_id].cycles;
}
else
} else
clear_csr(mie, MIP_MTIP);
return epc;
}
@ -251,11 +250,10 @@ uintptr_t handle_irq_m_soft(uintptr_t cause, uintptr_t epc)
set_csr(mstatus, MSTATUS_MIE);
/* Clear ipi flag */
clint_ipi_clear(core_id);
if (clint_ipi_instance[core_id].callback != NULL)
if(clint_ipi_instance[core_id].callback != NULL)
clint_ipi_instance[core_id].callback(clint_ipi_instance[core_id].ctx);
clear_csr(mstatus, MSTATUS_MIE);
set_csr(mstatus, MSTATUS_MPIE | MSTATUS_MPP);
set_csr(mie, MIP_MSIP);
return epc;
}

311
lib/drivers/dmac.c
View File

@ -12,15 +12,15 @@
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include <stdint.h>
#include <stddef.h>
#include <stdint.h>
#include <stdio.h>
#include "dmac.h"
#include "sysctl.h"
#include "fpioa.h"
#include "utils.h"
#include "plic.h"
#include "stdlib.h"
#include "sysctl.h"
#include "utils.h"
volatile dmac_t *const dmac = (dmac_t *)DMAC_BASE_ADDR;
@ -35,7 +35,8 @@ dmac_context_t dmac_context[6];
static int is_memory(uintptr_t address)
{
enum {
enum
{
mem_len = 6 * 1024 * 1024,
mem_no_cache_len = 8 * 1024 * 1024,
};
@ -59,7 +60,7 @@ uint64_t dmac_read_channel_id(dmac_channel_number_t channel_num)
static void dmac_enable(void)
{
dmac_cfg_u_t dmac_cfg;
dmac_cfg_u_t dmac_cfg;
dmac_cfg.data = readq(&dmac->cfg);
dmac_cfg.cfg.dmac_en = 1;
@ -69,7 +70,7 @@ static void dmac_enable(void)
void dmac_disable(void)
{
dmac_cfg_u_t dmac_cfg;
dmac_cfg_u_t dmac_cfg;
dmac_cfg.data = readq(&dmac->cfg);
dmac_cfg.cfg.dmac_en = 0;
@ -79,7 +80,7 @@ void dmac_disable(void)
void src_transaction_complete_int_enable(dmac_channel_number_t channel_num)
{
dmac_ch_intstatus_enable_u_t ch_intstat;
dmac_ch_intstatus_enable_u_t ch_intstat;
ch_intstat.data = readq(&dmac->channel[channel_num].intstatus_en);
ch_intstat.ch_intstatus_enable.enable_src_transcomp_intstat = 1;
@ -93,33 +94,34 @@ void dmac_channel_enable(dmac_channel_number_t channel_num)
chen.data = readq(&dmac->chen);
switch (channel_num) {
case DMAC_CHANNEL0:
chen.dmac_chen.ch1_en = 1;
chen.dmac_chen.ch1_en_we = 1;
break;
case DMAC_CHANNEL1:
chen.dmac_chen.ch2_en = 1;
chen.dmac_chen.ch2_en_we = 1;
break;
case DMAC_CHANNEL2:
chen.dmac_chen.ch3_en = 1;
chen.dmac_chen.ch3_en_we = 1;
break;
case DMAC_CHANNEL3:
chen.dmac_chen.ch4_en = 1;
chen.dmac_chen.ch4_en_we = 1;
break;
case DMAC_CHANNEL4:
chen.dmac_chen.ch5_en = 1;
chen.dmac_chen.ch5_en_we = 1;
break;
case DMAC_CHANNEL5:
chen.dmac_chen.ch6_en = 1;
chen.dmac_chen.ch6_en_we = 1;
break;
default:
break;
switch(channel_num)
{
case DMAC_CHANNEL0:
chen.dmac_chen.ch1_en = 1;
chen.dmac_chen.ch1_en_we = 1;
break;
case DMAC_CHANNEL1:
chen.dmac_chen.ch2_en = 1;
chen.dmac_chen.ch2_en_we = 1;
break;
case DMAC_CHANNEL2:
chen.dmac_chen.ch3_en = 1;
chen.dmac_chen.ch3_en_we = 1;
break;
case DMAC_CHANNEL3:
chen.dmac_chen.ch4_en = 1;
chen.dmac_chen.ch4_en_we = 1;
break;
case DMAC_CHANNEL4:
chen.dmac_chen.ch5_en = 1;
chen.dmac_chen.ch5_en_we = 1;
break;
case DMAC_CHANNEL5:
chen.dmac_chen.ch6_en = 1;
chen.dmac_chen.ch6_en_we = 1;
break;
default:
break;
}
writeq(chen.data, &dmac->chen);
@ -131,34 +133,34 @@ void dmac_channel_disable(dmac_channel_number_t channel_num)
chen.data = readq(&dmac->chen);
switch (channel_num)
switch(channel_num)
{
case DMAC_CHANNEL0:
chen.dmac_chen.ch1_en = 0;
chen.dmac_chen.ch1_en_we = 1;
break;
case DMAC_CHANNEL1:
chen.dmac_chen.ch2_en = 0;
chen.dmac_chen.ch2_en_we = 1;
break;
case DMAC_CHANNEL2:
chen.dmac_chen.ch3_en = 0;
chen.dmac_chen.ch3_en_we = 1;
break;
case DMAC_CHANNEL3:
chen.dmac_chen.ch4_en = 0;
chen.dmac_chen.ch4_en_we = 1;
break;
case DMAC_CHANNEL4:
chen.dmac_chen.ch5_en = 0;
chen.dmac_chen.ch5_en_we = 1;
break;
case DMAC_CHANNEL5:
chen.dmac_chen.ch6_en = 0;
chen.dmac_chen.ch6_en_we = 1;
break;
default:
break;
case DMAC_CHANNEL0:
chen.dmac_chen.ch1_en = 0;
chen.dmac_chen.ch1_en_we = 1;
break;
case DMAC_CHANNEL1:
chen.dmac_chen.ch2_en = 0;
chen.dmac_chen.ch2_en_we = 1;
break;
case DMAC_CHANNEL2:
chen.dmac_chen.ch3_en = 0;
chen.dmac_chen.ch3_en_we = 1;
break;
case DMAC_CHANNEL3:
chen.dmac_chen.ch4_en = 0;
chen.dmac_chen.ch4_en_we = 1;
break;
case DMAC_CHANNEL4:
chen.dmac_chen.ch5_en = 0;
chen.dmac_chen.ch5_en_we = 1;
break;
case DMAC_CHANNEL5:
chen.dmac_chen.ch6_en = 0;
chen.dmac_chen.ch6_en_we = 1;
break;
default:
break;
}
writeq(chen.data, &dmac->chen);
@ -170,33 +172,34 @@ int32_t dmac_check_channel_busy(dmac_channel_number_t channel_num)
dmac_chen_u_t chen_u;
chen_u.data = readq(&dmac->chen);
switch (channel_num) {
case DMAC_CHANNEL0:
if (chen_u.dmac_chen.ch1_en == 1)
ret = 1;
break;
case DMAC_CHANNEL1:
if (chen_u.dmac_chen.ch2_en == 1)
ret = 1;
break;
case DMAC_CHANNEL2:
if (chen_u.dmac_chen.ch3_en == 1)
ret = 1;
break;
case DMAC_CHANNEL3:
if (chen_u.dmac_chen.ch4_en == 1)
ret = 1;
break;
case DMAC_CHANNEL4:
if (chen_u.dmac_chen.ch5_en == 1)
ret = 1;
break;
case DMAC_CHANNEL5:
if (chen_u.dmac_chen.ch6_en == 1)
ret = 1;
break;
default:
break;
switch(channel_num)
{
case DMAC_CHANNEL0:
if(chen_u.dmac_chen.ch1_en == 1)
ret = 1;
break;
case DMAC_CHANNEL1:
if(chen_u.dmac_chen.ch2_en == 1)
ret = 1;
break;
case DMAC_CHANNEL2:
if(chen_u.dmac_chen.ch3_en == 1)
ret = 1;
break;
case DMAC_CHANNEL3:
if(chen_u.dmac_chen.ch4_en == 1)
ret = 1;
break;
case DMAC_CHANNEL4:
if(chen_u.dmac_chen.ch5_en == 1)
ret = 1;
break;
case DMAC_CHANNEL5:
if(chen_u.dmac_chen.ch6_en == 1)
ret = 1;
break;
default:
break;
}
writeq(chen_u.data, &dmac->chen);
@ -205,7 +208,7 @@ int32_t dmac_check_channel_busy(dmac_channel_number_t channel_num)
}
int32_t dmac_set_list_master_select(dmac_channel_number_t channel_num,
dmac_src_dst_select_t sd_sel, dmac_master_number_t mst_num)
dmac_src_dst_select_t sd_sel, dmac_master_number_t mst_num)
{
int32_t ret = 0;
uint64_t tmp = 0;
@ -213,11 +216,12 @@ int32_t dmac_set_list_master_select(dmac_channel_number_t channel_num,
ctl.data = readq(&dmac->channel[channel_num].ctl);
ret = dmac_check_channel_busy(channel_num);
if (ret == 0) {
if (sd_sel == DMAC_SRC || sd_sel == DMAC_SRC_DST)
if(ret == 0)
{
if(sd_sel == DMAC_SRC || sd_sel == DMAC_SRC_DST)
ctl.ch_ctl.sms = mst_num;
if (sd_sel == DMAC_DST || sd_sel == DMAC_SRC_DST)
if(sd_sel == DMAC_DST || sd_sel == DMAC_SRC_DST)
ctl.ch_ctl.dms = mst_num;
tmp |= *(uint64_t *)&dmac->channel[channel_num].ctl;
writeq(ctl.data, &dmac->channel[channel_num].ctl);
@ -271,19 +275,19 @@ static void dmac_chanel_interrupt_clear(dmac_channel_number_t channel_num)
}
int dmac_set_channel_config(dmac_channel_number_t channel_num,
dmac_channel_config_t *cfg_param)
dmac_channel_config_t *cfg_param)
{
dmac_ch_ctl_u_t ctl;
dmac_ch_ctl_u_t ctl;
dmac_ch_cfg_u_t cfg;
dmac_ch_llp_u_t ch_llp;
if (cfg_param->ctl_sms > DMAC_MASTER2)
if(cfg_param->ctl_sms > DMAC_MASTER2)
return -1;
if (cfg_param->ctl_dms > DMAC_MASTER2)
if(cfg_param->ctl_dms > DMAC_MASTER2)
return -1;
if (cfg_param->ctl_src_msize > DMAC_MSIZE_256)
if(cfg_param->ctl_src_msize > DMAC_MSIZE_256)
return -1;
if (cfg_param->ctl_drc_msize > DMAC_MSIZE_256)
if(cfg_param->ctl_drc_msize > DMAC_MSIZE_256)
return -1;
/**
@ -295,7 +299,7 @@ int dmac_set_channel_config(dmac_channel_number_t channel_num,
cfg.ch_cfg.hs_sel_src = cfg_param->cfg_hs_sel_src;
cfg.ch_cfg.hs_sel_dst = cfg_param->cfg_hs_sel_dst;
cfg.ch_cfg.src_hwhs_pol = cfg_param->cfg_src_hs_pol;
cfg.ch_cfg.dst_hwhs_pol = cfg_param->cfg_dst_hs_pol;
cfg.ch_cfg.dst_hwhs_pol = cfg_param->cfg_dst_hs_pol;
cfg.ch_cfg.src_per = cfg_param->cfg_src_per;
cfg.ch_cfg.dst_per = cfg_param->cfg_dst_per;
cfg.ch_cfg.ch_prior = cfg_param->cfg_ch_prior;
@ -314,7 +318,7 @@ int dmac_set_channel_config(dmac_channel_number_t channel_num,
ctl.ch_ctl.dinc = cfg_param->ctl_dinc;
/* address incrememt */
ctl.ch_ctl.src_tr_width = cfg_param->ctl_src_tr_width;
ctl.ch_ctl.dst_tr_width = cfg_param->ctl_dst_tr_width;
ctl.ch_ctl.dst_tr_width = cfg_param->ctl_dst_tr_width;
/* transfer width */
ctl.ch_ctl.src_msize = cfg_param->ctl_src_msize;
ctl.ch_ctl.dst_msize = cfg_param->ctl_drc_msize;
@ -341,22 +345,22 @@ int dmac_set_channel_config(dmac_channel_number_t channel_num,
}
int dmac_set_channel_param(dmac_channel_number_t channel_num,
const void *src, void *dest, dmac_address_increment_t src_inc, dmac_address_increment_t dest_inc,
dmac_burst_trans_length_t dmac_burst_size,
dmac_transfer_width_t dmac_trans_width,
uint32_t blockSize)
const void *src, void *dest, dmac_address_increment_t src_inc, dmac_address_increment_t dest_inc,
dmac_burst_trans_length_t dmac_burst_size,
dmac_transfer_width_t dmac_trans_width,
uint32_t blockSize)
{
dmac_ch_ctl_u_t ctl;
dmac_ch_ctl_u_t ctl;
dmac_ch_cfg_u_t cfg_u;
int mem_type_src = is_memory((uintptr_t)src), mem_type_dest = is_memory((uintptr_t)dest);
dmac_transfer_flow_t flow_control;
if (mem_type_src == 0 && mem_type_dest == 0)
if(mem_type_src == 0 && mem_type_dest == 0)
{
flow_control = DMAC_PRF2PRF_DMA;
}else if (mem_type_src == 1 && mem_type_dest == 0)
} else if(mem_type_src == 1 && mem_type_dest == 0)
flow_control = DMAC_MEM2PRF_DMA;
else if (mem_type_src == 0 && mem_type_dest == 1)
else if(mem_type_src == 0 && mem_type_dest == 1)
flow_control = DMAC_PRF2MEM_DMA;
else
flow_control = DMAC_MEM2MEM_DMA;
@ -388,7 +392,7 @@ int dmac_set_channel_param(dmac_channel_number_t channel_num,
ctl.ch_ctl.dinc = dest_inc;
/* address incrememt */
ctl.ch_ctl.src_tr_width = dmac_trans_width;
ctl.ch_ctl.dst_tr_width = dmac_trans_width;
ctl.ch_ctl.dst_tr_width = dmac_trans_width;
/* transfer width */
ctl.ch_ctl.src_msize = dmac_burst_size;
ctl.ch_ctl.dst_msize = dmac_burst_size;
@ -402,16 +406,16 @@ int dmac_set_channel_param(dmac_channel_number_t channel_num,
}
int dmac_get_channel_config(dmac_channel_number_t channel_num,
dmac_channel_config_t *cfg_param)
dmac_channel_config_t *cfg_param)
{
dmac_ch_ctl_u_t ctl;
dmac_ch_ctl_u_t ctl;
dmac_ch_cfg_u_t cfg;
dmac_ch_llp_u_t ch_llp;
if (cfg_param == 0)
if(cfg_param == 0)
return -1;
if (channel_num < DMAC_CHANNEL0 ||
channel_num > DMAC_CHANNEL3)
if(channel_num < DMAC_CHANNEL0 ||
channel_num > DMAC_CHANNEL3)
return -1;
ctl.data = readq(&dmac->channel[channel_num].ctl);
@ -430,7 +434,7 @@ int dmac_get_channel_config(dmac_channel_number_t channel_num,
cfg_param->cfg_hs_sel_src = cfg.ch_cfg.hs_sel_src;
cfg_param->cfg_hs_sel_dst = cfg.ch_cfg.hs_sel_dst;
cfg_param->cfg_src_hs_pol = cfg.ch_cfg.src_hwhs_pol;
cfg_param->cfg_dst_hs_pol = cfg.ch_cfg.dst_hwhs_pol;
cfg_param->cfg_dst_hs_pol = cfg.ch_cfg.dst_hwhs_pol;
cfg_param->cfg_src_per = cfg.ch_cfg.src_per;
cfg_param->cfg_dst_per = cfg.ch_cfg.dst_per;
cfg_param->cfg_ch_prior = cfg.ch_cfg.ch_prior;
@ -450,14 +454,14 @@ int dmac_get_channel_config(dmac_channel_number_t channel_num,
}
void dmac_set_address(dmac_channel_number_t channel_num, uint64_t src_addr,
uint64_t dst_addr)
uint64_t dst_addr)
{
writeq(src_addr, &dmac->channel[channel_num].sar);
writeq(dst_addr, &dmac->channel[channel_num].dar);
}
void dmac_set_block_ts(dmac_channel_number_t channel_num,
uint32_t block_size)
uint32_t block_size)
{
uint32_t block_ts;
@ -466,10 +470,10 @@ void dmac_set_block_ts(dmac_channel_number_t channel_num,
}
void dmac_source_control(dmac_channel_number_t channel_num,
dmac_master_number_t master_select,
dmac_address_increment_t address_mode,
dmac_transfer_width_t tr_width,
dmac_burst_trans_length_t burst_length)
dmac_master_number_t master_select,
dmac_address_increment_t address_mode,
dmac_transfer_width_t tr_width,
dmac_burst_trans_length_t burst_length)
{
dmac_ch_ctl_u_t ctl_u;
@ -483,10 +487,10 @@ void dmac_source_control(dmac_channel_number_t channel_num,
}
void dmac_master_control(dmac_channel_number_t channel_num,
dmac_master_number_t master_select,
dmac_address_increment_t address_mode,
dmac_transfer_width_t tr_width,
dmac_burst_trans_length_t burst_length)
dmac_master_number_t master_select,
dmac_address_increment_t address_mode,
dmac_transfer_width_t tr_width,
dmac_burst_trans_length_t burst_length)
{
dmac_ch_ctl_u_t ctl_u;
@ -500,8 +504,8 @@ void dmac_master_control(dmac_channel_number_t channel_num,
}
void dmac_set_source_transfer_control(dmac_channel_number_t channel_num,
dmac_multiblk_transfer_type_t transfer_type,
dmac_sw_hw_hs_select_t handshak_select)
dmac_multiblk_transfer_type_t transfer_type,
dmac_sw_hw_hs_select_t handshak_select)
{
dmac_ch_cfg_u_t cfg_u;
@ -513,8 +517,8 @@ void dmac_set_source_transfer_control(dmac_channel_number_t channel_num,
}
void dmac_set_destination_transfer_control(dmac_channel_number_t channel_num,
dmac_multiblk_transfer_type_t transfer_type,
dmac_sw_hw_hs_select_t handshak_select)
dmac_multiblk_transfer_type_t transfer_type,
dmac_sw_hw_hs_select_t handshak_select)
{
dmac_ch_cfg_u_t cfg_u;
@ -526,7 +530,7 @@ void dmac_set_destination_transfer_control(dmac_channel_number_t channel_num,
}
void dmac_set_flow_control(dmac_channel_number_t channel_num,
dmac_transfer_flow_t flow_control)
dmac_transfer_flow_t flow_control)
{
dmac_ch_cfg_u_t cfg_u;
@ -537,7 +541,7 @@ void dmac_set_flow_control(dmac_channel_number_t channel_num,
}
void dmac_set_linked_list_addr_point(dmac_channel_number_t channel_num,
uint64_t *addr)
uint64_t *addr)
{
dmac_ch_llp_u_t llp_u;
@ -559,7 +563,7 @@ void dmac_init(void)
dmac_reset.data = readq(&dmac->reset);
dmac_reset.reset.rst = 1;
writeq(dmac_reset.data, &dmac->reset);
while (dmac_reset.reset.rst)
while(dmac_reset.reset.rst)
dmac_reset.data = readq(&dmac->reset);
/*reset dmac */
@ -579,7 +583,7 @@ void dmac_init(void)
writeq(dmac_cfg.data, &dmac->cfg);
/* disable dmac and disable interrupt */
while (readq(&dmac->cfg))
while(readq(&dmac->cfg))
;
tmp = readq(&dmac->chen);
tmp &= ~0xf;
@ -589,7 +593,7 @@ void dmac_init(void)
}
static void list_add(struct list_head_t *new, struct list_head_t *prev,
struct list_head_t *next)
struct list_head_t *next)
{
next->prev = new;
new->next = next;
@ -609,12 +613,12 @@ void INIT_LIST_HEAD(struct list_head_t *list)
}
void dmac_link_list_item(dmac_channel_number_t channel_num,
uint8_t LLI_row_num, int8_t LLI_last_row,
dmac_lli_item_t *lli_item,
dmac_channel_config_t *cfg_param)
uint8_t LLI_row_num, int8_t LLI_last_row,
dmac_lli_item_t *lli_item,
dmac_channel_config_t *cfg_param)
{
dmac_ch_ctl_u_t ctl;
dmac_ch_llp_u_t llp_u;
dmac_ch_llp_u_t llp_u;
lli_item[LLI_row_num].sar = cfg_param->sar;
lli_item[LLI_row_num].dar = cfg_param->dar;
@ -631,10 +635,12 @@ void dmac_link_list_item(dmac_channel_number_t channel_num,
ctl.ch_ctl.src_stat_en = cfg_param->ctl_src_stat_en;
ctl.ch_ctl.dst_stat_en = cfg_param->ctl_dst_stat_en;
if (LLI_last_row != LAST_ROW) {
if(LLI_last_row != LAST_ROW)
{
ctl.ch_ctl.shadowreg_or_lli_valid = 1;
ctl.ch_ctl.shadowreg_or_lli_last = 0;
} else {
} else
{
ctl.ch_ctl.shadowreg_or_lli_valid = 1;
ctl.ch_ctl.shadowreg_or_lli_last = 1;
}
@ -647,7 +653,7 @@ void dmac_link_list_item(dmac_channel_number_t channel_num,
llp_u.data = readq(&dmac->channel[channel_num].llp);
if (LLI_last_row != LAST_ROW)
if(LLI_last_row != LAST_ROW)
llp_u.llp.loc = ((uint64_t)&lli_item[LLI_row_num + 1]) >> 6;
else
llp_u.llp.loc = 0;
@ -656,13 +662,14 @@ void dmac_link_list_item(dmac_channel_number_t channel_num,
}
void dmac_update_shandow_register(dmac_channel_number_t channel_num,
int8_t last_block, dmac_channel_config_t *cfg_param)
int8_t last_block, dmac_channel_config_t *cfg_param)
{
dmac_ch_ctl_u_t ctl_u;
do {
do
{
ctl_u.data = readq(&dmac->channel[channel_num].ctl);
} while (ctl_u.ch_ctl.shadowreg_or_lli_valid);
} while(ctl_u.ch_ctl.shadowreg_or_lli_valid);
writeq(cfg_param->sar, &dmac->channel[channel_num].sar);
writeq(cfg_param->dar, &dmac->channel[channel_num].dar);
@ -678,11 +685,12 @@ void dmac_update_shandow_register(dmac_channel_number_t channel_num,
ctl_u.ch_ctl.dst_msize = cfg_param->ctl_drc_msize;
ctl_u.ch_ctl.src_stat_en = cfg_param->ctl_src_stat_en;
ctl_u.ch_ctl.dst_stat_en = cfg_param->ctl_dst_stat_en;
if (last_block != LAST_ROW)
if(last_block != LAST_ROW)
{
ctl_u.ch_ctl.shadowreg_or_lli_valid = 1;
ctl_u.ch_ctl.shadowreg_or_lli_last = 0;
} else {
} else
{
ctl_u.ch_ctl.shadowreg_or_lli_valid = 1;
ctl_u.ch_ctl.shadowreg_or_lli_last = 1;
}
@ -706,7 +714,8 @@ void dmac_set_single_mode(dmac_channel_number_t channel_num,
dmac_address_increment_t dest_inc,
dmac_burst_trans_length_t dmac_burst_size,
dmac_transfer_width_t dmac_trans_width,
size_t block_size) {
size_t block_size)
{
dmac_chanel_interrupt_clear(channel_num);
dmac_channel_disable(channel_num);
dmac_wait_idle(channel_num);
@ -741,7 +750,8 @@ int dmac_is_idle(dmac_channel_number_t channel_num)
void dmac_wait_idle(dmac_channel_number_t channel_num)
{
while(!dmac_is_idle(channel_num));
while(!dmac_is_idle(channel_num))
;
dmac_chanel_interrupt_clear(channel_num); /* clear interrupt */
}
@ -767,7 +777,7 @@ static int dmac_irq_callback(void *ctx)
return 0;
}
void dmac_irq_register(dmac_channel_number_t channel_num , plic_irq_callback_t dmac_callback, void *ctx, uint32_t priority)
void dmac_irq_register(dmac_channel_number_t channel_num, plic_irq_callback_t dmac_callback, void *ctx, uint32_t priority)
{
dmac_context[channel_num].dmac_channel = channel_num;
dmac_context[channel_num].callback = dmac_callback;
@ -778,7 +788,7 @@ void dmac_irq_register(dmac_channel_number_t channel_num , plic_irq_callback_t d
plic_irq_enable(IRQN_DMA0_INTERRUPT + channel_num);
}
void __attribute__((weak, alias("dmac_irq_register"))) dmac_set_irq(dmac_channel_number_t channel_num , plic_irq_callback_t dmac_callback, void *ctx, uint32_t priority);
void __attribute__((weak, alias("dmac_irq_register"))) dmac_set_irq(dmac_channel_number_t channel_num, plic_irq_callback_t dmac_callback, void *ctx, uint32_t priority);
void dmac_irq_unregister(dmac_channel_number_t channel_num)
{
@ -789,4 +799,3 @@ void dmac_irq_unregister(dmac_channel_number_t channel_num)
}
void __attribute__((weak, alias("dmac_irq_unregister"))) dmac_free_irq(dmac_channel_number_t channel_num);

54
lib/drivers/dvp.c
View File

@ -12,24 +12,24 @@
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include <math.h>
#include <stddef.h>
#include <stdint.h>
#include "dvp.h"
#include "utils.h"
#include "fpioa.h"
#include "sysctl.h"
#include <math.h>
#include "utils.h"
volatile dvp_t* const dvp = (volatile dvp_t*)DVP_BASE_ADDR;
volatile dvp_t *const dvp = (volatile dvp_t *)DVP_BASE_ADDR;
static uint8_t g_sccb_reg_len = 8;
static void mdelay(uint32_t ms)
{
uint32_t i;
while (ms && ms--)
while(ms && ms--)
{
for (i = 0; i < 25000; i++)
for(i = 0; i < 25000; i++)
__asm__ __volatile__("nop");
}
}
@ -61,10 +61,10 @@ uint32_t dvp_sccb_set_clk_rate(uint32_t clk_rate)
static void dvp_sccb_start_transfer(void)
{
while (dvp->sts & DVP_STS_SCCB_EN)
while(dvp->sts & DVP_STS_SCCB_EN)
;
dvp->sts = DVP_STS_SCCB_EN | DVP_STS_SCCB_EN_WE;
while (dvp->sts & DVP_STS_SCCB_EN)
while(dvp->sts & DVP_STS_SCCB_EN)
;
}
@ -78,11 +78,10 @@ void dvp_sccb_send_data(uint8_t dev_addr, uint16_t reg_addr, uint8_t reg_data)
dvp->sccb_cfg = tmp;
if (g_sccb_reg_len == 8)
if(g_sccb_reg_len == 8)
{
dvp->sccb_ctl = DVP_SCCB_WRITE_DATA_ENABLE | DVP_SCCB_DEVICE_ADDRESS(dev_addr) | DVP_SCCB_REG_ADDRESS(reg_addr) | DVP_SCCB_WDATA_BYTE0(reg_data);
}
else
} else
{
dvp->sccb_ctl = DVP_SCCB_WRITE_DATA_ENABLE | DVP_SCCB_DEVICE_ADDRESS(dev_addr) | DVP_SCCB_REG_ADDRESS(reg_addr >> 8) | DVP_SCCB_WDATA_BYTE0(reg_addr & 0xff) | DVP_SCCB_WDATA_BYTE1(reg_data);
}
@ -95,18 +94,17 @@ uint8_t dvp_sccb_receive_data(uint8_t dev_addr, uint16_t reg_addr)
tmp = dvp->sccb_cfg & (~DVP_SCCB_BYTE_NUM_MASK);
if (g_sccb_reg_len == 8)
if(g_sccb_reg_len == 8)
tmp |= DVP_SCCB_BYTE_NUM_2;
else
tmp |= DVP_SCCB_BYTE_NUM_3;
dvp->sccb_cfg = tmp;
if (g_sccb_reg_len == 8)
if(g_sccb_reg_len == 8)
{
dvp->sccb_ctl = DVP_SCCB_WRITE_DATA_ENABLE | DVP_SCCB_DEVICE_ADDRESS(dev_addr) | DVP_SCCB_REG_ADDRESS(reg_addr);
}
else
} else
{
dvp->sccb_ctl = DVP_SCCB_WRITE_DATA_ENABLE | DVP_SCCB_DEVICE_ADDRESS(dev_addr) | DVP_SCCB_REG_ADDRESS(reg_addr >> 8) | DVP_SCCB_WDATA_BYTE0(reg_addr & 0xff);
}
@ -116,7 +114,7 @@ uint8_t dvp_sccb_receive_data(uint8_t dev_addr, uint16_t reg_addr)
dvp_sccb_start_transfer();
return (uint8_t) DVP_SCCB_RDATA_BYTE(dvp->sccb_cfg);
return (uint8_t)DVP_SCCB_RDATA_BYTE(dvp->sccb_cfg);
}
static void dvp_reset(void)
@ -193,7 +191,7 @@ void dvp_set_image_size(uint32_t width, uint32_t height)
tmp |= DVP_CFG_LINE_NUM(height);
if (dvp->dvp_cfg & DVP_CFG_BURST_SIZE_4BEATS)
if(dvp->dvp_cfg & DVP_CFG_BURST_SIZE_4BEATS)
tmp |= DVP_CFG_HREF_BURST_NUM(width / 8 / 4);
else
tmp |= DVP_CFG_HREF_BURST_NUM(width / 8 / 1);
@ -215,7 +213,7 @@ void dvp_set_display_addr(uint32_t addr)
void dvp_start_frame(void)
{
while (!(dvp->sts & DVP_STS_FRAME_START))
while(!(dvp->sts & DVP_STS_FRAME_START))
;
dvp->sts = (DVP_STS_FRAME_START | DVP_STS_FRAME_START_WE);
}
@ -227,26 +225,26 @@ void dvp_start_convert(void)
void dvp_finish_convert(void)
{
while (!(dvp->sts & DVP_STS_FRAME_FINISH))
while(!(dvp->sts & DVP_STS_FRAME_FINISH))
;
dvp->sts = DVP_STS_FRAME_FINISH | DVP_STS_FRAME_FINISH_WE;
}
void dvp_get_image(void)
{
while (!(dvp->sts & DVP_STS_FRAME_START))
while(!(dvp->sts & DVP_STS_FRAME_START))
;
dvp->sts = DVP_STS_FRAME_START | DVP_STS_FRAME_START_WE;
while (!(dvp->sts & DVP_STS_FRAME_START))
while(!(dvp->sts & DVP_STS_FRAME_START))
;
dvp->sts = DVP_STS_FRAME_FINISH | DVP_STS_FRAME_FINISH_WE | DVP_STS_FRAME_START | DVP_STS_FRAME_START_WE | DVP_STS_DVP_EN | DVP_STS_DVP_EN_WE;
while (!(dvp->sts & DVP_STS_FRAME_FINISH))
while(!(dvp->sts & DVP_STS_FRAME_FINISH))
;
}
void dvp_config_interrupt(uint32_t interrupt, uint8_t enable)
{
if (enable)
if(enable)
dvp->dvp_cfg |= interrupt;
else
dvp->dvp_cfg &= (~interrupt);
@ -254,7 +252,7 @@ void dvp_config_interrupt(uint32_t interrupt, uint8_t enable)
int dvp_get_interrupt(uint32_t interrupt)
{
if (dvp->sts & interrupt)
if(dvp->sts & interrupt)
return 1;
return 0;
}
@ -279,19 +277,17 @@ void dvp_set_output_enable(dvp_output_mode_t index, int enable)
{
configASSERT(index < 2);
if (index == 0)
if(index == 0)
{
if (enable)
if(enable)
dvp->dvp_cfg |= DVP_CFG_AI_OUTPUT_ENABLE;
else
dvp->dvp_cfg &= ~DVP_CFG_AI_OUTPUT_ENABLE;
}
else
} else
{
if (enable)
if(enable)
dvp->dvp_cfg |= DVP_CFG_DISPLAY_OUTPUT_ENABLE;
else
dvp->dvp_cfg &= ~DVP_CFG_DISPLAY_OUTPUT_ENABLE;
}
}

12
lib/drivers/fft.c
View File

@ -14,9 +14,9 @@
*/
#include <stddef.h>
#include "dmac.h"
#include "utils.h"
#include "sysctl.h"
#include "fft.h"
#include "sysctl.h"
#include "utils.h"
static volatile fft_t *const fft = (volatile fft_t *)FFT_BASE_ADDR;
@ -32,7 +32,7 @@ static void fft_init(uint8_t point, uint8_t mode, uint16_t shift, uint8_t is_dma
}
void fft_complex_uint16_dma(dmac_channel_number_t dma_send_channel_num, dmac_channel_number_t dma_receive_channel_num,
uint16_t shift, fft_direction_t direction, const uint64_t *input, size_t point_num, uint64_t *output)
uint16_t shift, fft_direction_t direction, const uint64_t *input, size_t point_num, uint64_t *output)
{
fft_point_t point = FFT_512;
switch(point_num)
@ -59,10 +59,8 @@ void fft_complex_uint16_dma(dmac_channel_number_t dma_send_channel_num, dmac_cha
sysctl_dma_select(dma_receive_channel_num, SYSCTL_DMA_SELECT_FFT_RX_REQ);
sysctl_dma_select(dma_send_channel_num, SYSCTL_DMA_SELECT_FFT_TX_REQ);
dmac_set_single_mode(dma_receive_channel_num, (void *)(&fft->fft_output_fifo), output, DMAC_ADDR_NOCHANGE, DMAC_ADDR_INCREMENT,
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_64, point_num>>1);
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_64, point_num >> 1);
dmac_set_single_mode(dma_send_channel_num, input, (void *)(&fft->fft_input_fifo), DMAC_ADDR_INCREMENT, DMAC_ADDR_NOCHANGE,
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_64, point_num>>1);
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_64, point_num >> 1);
dmac_wait_done(dma_receive_channel_num);
}

9799
lib/drivers/fpioa.c
View File

File diff suppressed because it is too large Load Diff

45
lib/drivers/gpio.c
View File

@ -12,13 +12,13 @@
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "gpio.h"
#include "utils.h"
#include "fpioa.h"
#include "gpio.h"
#include "sysctl.h"
#include "utils.h"
#define GPIO_MAX_PINNO 8
volatile gpio_t* const gpio = (volatile gpio_t*)GPIO_BASE_ADDR;
volatile gpio_t *const gpio = (volatile gpio_t *)GPIO_BASE_ADDR;
int gpio_init(void)
{
@ -34,26 +34,26 @@ void gpio_set_drive_mode(uint8_t pin, gpio_drive_mode_t mode)
fpioa_pull_t pull;
uint32_t dir;
switch (mode)
switch(mode)
{
case GPIO_DM_INPUT:
pull = FPIOA_PULL_NONE;
dir = 0;
break;
case GPIO_DM_INPUT_PULL_DOWN:
pull = FPIOA_PULL_DOWN;
dir = 0;
break;
case GPIO_DM_INPUT_PULL_UP:
pull = FPIOA_PULL_UP;
dir = 0;
break;
case GPIO_DM_OUTPUT:
pull = FPIOA_PULL_DOWN;
dir = 1;
break;
default:
configASSERT(!"GPIO drive mode is not supported.") break;
case GPIO_DM_INPUT:
pull = FPIOA_PULL_NONE;
dir = 0;
break;
case GPIO_DM_INPUT_PULL_DOWN:
pull = FPIOA_PULL_DOWN;
dir = 0;
break;
case GPIO_DM_INPUT_PULL_UP:
pull = FPIOA_PULL_UP;
dir = 0;
break;
case GPIO_DM_OUTPUT:
pull = FPIOA_PULL_DOWN;
dir = 1;
break;
default:
configASSERT(!"GPIO drive mode is not supported.") break;
}
fpioa_set_io_pull(io_number, pull);
@ -76,4 +76,3 @@ void gpio_set_pin(uint8_t pin, gpio_pin_value_t value)
configASSERT(dir == 1);
set_gpio_bit(reg, pin, value);
}

59
lib/drivers/gpiohs.c
View File

@ -12,13 +12,13 @@
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "gpiohs.h"
#include "utils.h"
#include "fpioa.h"
#include "gpiohs.h"
#include "sysctl.h"
#include "utils.h"
#define GPIOHS_MAX_PINNO 32
volatile gpiohs_t* const gpiohs = (volatile gpiohs_t*)GPIOHS_BASE_ADDR;
volatile gpiohs_t *const gpiohs = (volatile gpiohs_t *)GPIOHS_BASE_ADDR;
typedef struct _gpiohs_pin_instance
{
@ -40,26 +40,26 @@ void gpiohs_set_drive_mode(uint8_t pin, gpio_drive_mode_t mode)
fpioa_pull_t pull;
uint32_t dir;
switch (mode)
switch(mode)
{
case GPIO_DM_INPUT:
pull = FPIOA_PULL_NONE;
dir = 0;
break;
case GPIO_DM_INPUT_PULL_DOWN:
pull = FPIOA_PULL_DOWN;
dir = 0;
break;
case GPIO_DM_INPUT_PULL_UP:
pull = FPIOA_PULL_UP;
dir = 0;
break;
case GPIO_DM_OUTPUT:
pull = FPIOA_PULL_DOWN;
dir = 1;
break;
default:
configASSERT(!"GPIO drive mode is not supported.") break;
case GPIO_DM_INPUT:
pull = FPIOA_PULL_NONE;
dir = 0;
break;
case GPIO_DM_INPUT_PULL_DOWN:
pull = FPIOA_PULL_DOWN;
dir = 0;
break;
case GPIO_DM_INPUT_PULL_UP:
pull = FPIOA_PULL_UP;
dir = 0;
break;
case GPIO_DM_OUTPUT:
pull = FPIOA_PULL_DOWN;
dir = 1;
break;
default:
configASSERT(!"GPIO drive mode is not supported.") break;
}
fpioa_set_io_pull(io_number, pull);
@ -98,8 +98,7 @@ void gpiohs_set_pin_edge(uint8_t pin, gpio_pin_edge_t edge)
if(edge & GPIO_PE_FALLING)
{
set_gpio_bit(gpiohs->fall_ie.u32, pin, 1);
}
else
} else
{
set_gpio_bit(gpiohs->fall_ie.u32, pin, 0);
}
@ -107,8 +106,7 @@ void gpiohs_set_pin_edge(uint8_t pin, gpio_pin_edge_t edge)
if(edge & GPIO_PE_RISING)
{
set_gpio_bit(gpiohs->rise_ie.u32, pin, 1);
}
else
} else
{
set_gpio_bit(gpiohs->rise_ie.u32, pin, 0);
}
@ -116,8 +114,7 @@ void gpiohs_set_pin_edge(uint8_t pin, gpio_pin_edge_t edge)
if(edge & GPIO_PE_LOW)
{
set_gpio_bit(gpiohs->low_ie.u32, pin, 1);
}
else
} else
{
set_gpio_bit(gpiohs->low_ie.u32, pin, 0);
}
@ -125,8 +122,7 @@ void gpiohs_set_pin_edge(uint8_t pin, gpio_pin_edge_t edge)
if(edge & GPIO_PE_HIGH)
{
set_gpio_bit(gpiohs->high_ie.u32, pin, 1);
}
else
} else
{
set_gpio_bit(gpiohs->high_ie.u32, pin, 0);
}
@ -167,7 +163,7 @@ int gpiohs_pin_onchange_isr(void *userdata)
set_gpio_bit(gpiohs->high_ie.u32, pin, 1);
}
if (ctx->callback)
if(ctx->callback)
ctx->callback();
if(ctx->gpiohs_callback)
ctx->gpiohs_callback(ctx->context);
@ -215,4 +211,3 @@ void gpiohs_irq_disable(size_t pin)
{
plic_irq_disable(IRQN_GPIOHS0_INTERRUPT + pin);
}

98
lib/drivers/i2c.c
View File

@ -13,14 +13,14 @@
* limitations under the License.
*/
#include <stddef.h>
#include "i2c.h"
#include "utils.h"
#include "bsp.h"
#include "fpioa.h"
#include "i2c.h"
#include "platform.h"
#include "stdlib.h"
#include "string.h"
#include "sysctl.h"
#include "bsp.h"
#include "utils.h"
typedef struct _i2c_slave_instance
{
@ -41,12 +41,11 @@ typedef struct _i2c_instance
static i2c_instance_t g_i2c_instance[3];
volatile i2c_t* const i2c[3] =
{
(volatile i2c_t*)I2C0_BASE_ADDR,
(volatile i2c_t*)I2C1_BASE_ADDR,
(volatile i2c_t*)I2C2_BASE_ADDR
};
volatile i2c_t *const i2c[3] =
{
(volatile i2c_t *)I2C0_BASE_ADDR,
(volatile i2c_t *)I2C1_BASE_ADDR,
(volatile i2c_t *)I2C2_BASE_ADDR};
static void i2c_clk_init(i2c_device_number_t i2c_num)
{
@ -90,21 +89,21 @@ static int i2c_slave_irq(void *userdata)
i2c_slave_instance_t *instance = (i2c_slave_instance_t *)userdata;
volatile i2c_t *i2c_adapter = i2c[instance->i2c_num];
uint32_t status = i2c_adapter->intr_stat;
if (status & I2C_INTR_STAT_START_DET)
if(status & I2C_INTR_STAT_START_DET)
{
instance->slave_handler->on_event(I2C_EV_START);
readl(&i2c_adapter->clr_start_det);
}
if (status & I2C_INTR_STAT_STOP_DET)
if(status & I2C_INTR_STAT_STOP_DET)
{
instance->slave_handler->on_event(I2C_EV_STOP);
readl(&i2c_adapter->clr_stop_det);
}
if (status & I2C_INTR_STAT_RX_FULL)
if(status & I2C_INTR_STAT_RX_FULL)
{
instance->slave_handler->on_receive(i2c_adapter->data_cmd);
}
if (status & I2C_INTR_STAT_RD_REQ)
if(status & I2C_INTR_STAT_RD_REQ)
{
i2c_adapter->data_cmd = instance->slave_handler->on_transmit();
readl(&i2c_adapter->clr_rd_req);
@ -113,7 +112,7 @@ static int i2c_slave_irq(void *userdata)
}
void i2c_init_as_slave(i2c_device_number_t i2c_num, uint32_t slave_address, uint32_t address_width,
const i2c_slave_handler_t *handler)
const i2c_slave_handler_t *handler)
{
configASSERT(address_width == 7 || address_width == 10);
volatile i2c_t *i2c_adapter = i2c[i2c_num];
@ -140,23 +139,23 @@ void i2c_init_as_slave(i2c_device_number_t i2c_num, uint32_t slave_address, uint
int i2c_send_data(i2c_device_number_t i2c_num, const uint8_t *send_buf, size_t send_buf_len)
{
configASSERT(i2c_num < I2C_MAX_NUM);
volatile i2c_t* i2c_adapter = i2c[i2c_num];
volatile i2c_t *i2c_adapter = i2c[i2c_num];
size_t fifo_len, index;
i2c_adapter->clr_tx_abrt = i2c_adapter->clr_tx_abrt;
while (send_buf_len)
while(send_buf_len)
{
fifo_len = 8 - i2c_adapter->txflr;
fifo_len = send_buf_len < fifo_len ? send_buf_len : fifo_len;
for (index = 0; index < fifo_len; index++)
for(index = 0; index < fifo_len; index++)
i2c_adapter->data_cmd = I2C_DATA_CMD_DATA(*send_buf++);
if (i2c_adapter->tx_abrt_source != 0)
if(i2c_adapter->tx_abrt_source != 0)
return 1;
send_buf_len -= fifo_len;
}
while ((i2c_adapter->status & I2C_STATUS_ACTIVITY) || !(i2c_adapter->status & I2C_STATUS_TFE))
while((i2c_adapter->status & I2C_STATUS_ACTIVITY) || !(i2c_adapter->status & I2C_STATUS_TFE))
;
if (i2c_adapter->tx_abrt_source != 0)
if(i2c_adapter->tx_abrt_source != 0)
return 1;
return 0;
@ -166,25 +165,25 @@ void i2c_send_data_dma(dmac_channel_number_t dma_channel_num, i2c_device_number_
size_t send_buf_len)
{
configASSERT(i2c_num < I2C_MAX_NUM);
volatile i2c_t* i2c_adapter = i2c[i2c_num];
volatile i2c_t *i2c_adapter = i2c[i2c_num];
i2c_adapter->clr_tx_abrt = i2c_adapter->clr_tx_abrt;
uint32_t *buf = malloc(send_buf_len * sizeof(uint32_t));
int i;
for (i = 0; i < send_buf_len; i++)
for(i = 0; i < send_buf_len; i++)
{
buf[i] = send_buf[i];
}
sysctl_dma_select((sysctl_dma_channel_t)dma_channel_num, SYSCTL_DMA_SELECT_I2C0_TX_REQ + i2c_num * 2);
dmac_set_single_mode(dma_channel_num, buf, (void *)(&i2c_adapter->data_cmd), DMAC_ADDR_INCREMENT, DMAC_ADDR_NOCHANGE,
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, send_buf_len);
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, send_buf_len);
dmac_wait_done(dma_channel_num);
free((void *)buf);
while ((i2c_adapter->status & I2C_STATUS_ACTIVITY) || !(i2c_adapter->status & I2C_STATUS_TFE))
while((i2c_adapter->status & I2C_STATUS_ACTIVITY) || !(i2c_adapter->status & I2C_STATUS_TFE))
{
if (i2c_adapter->tx_abrt_source != 0)
if(i2c_adapter->tx_abrt_source != 0)
return;
}
}
@ -196,31 +195,31 @@ int i2c_recv_data(i2c_device_number_t i2c_num, const uint8_t *send_buf, size_t s
size_t fifo_len, index;
size_t rx_len = receive_buf_len;
volatile i2c_t* i2c_adapter = i2c[i2c_num];
volatile i2c_t *i2c_adapter = i2c[i2c_num];
while (send_buf_len)
while(send_buf_len)
{
fifo_len = 8 - i2c_adapter->txflr;
fifo_len = send_buf_len < fifo_len ? send_buf_len : fifo_len;
for (index = 0; index < fifo_len; index++)
for(index = 0; index < fifo_len; index++)
i2c_adapter->data_cmd = I2C_DATA_CMD_DATA(*send_buf++);
if (i2c_adapter->tx_abrt_source != 0)
if(i2c_adapter->tx_abrt_source != 0)
return 1;
send_buf_len -= fifo_len;
}
while (receive_buf_len || rx_len)
while(receive_buf_len || rx_len)
{
fifo_len = i2c_adapter->rxflr;
fifo_len = rx_len < fifo_len ? rx_len : fifo_len;
for (index = 0; index < fifo_len; index++)
for(index = 0; index < fifo_len; index++)
*receive_buf++ = (uint8_t)i2c_adapter->data_cmd;
rx_len -= fifo_len;
fifo_len = 8 - i2c_adapter->txflr;
fifo_len = receive_buf_len < fifo_len ? receive_buf_len : fifo_len;
for (index = 0; index < fifo_len; index++)
for(index = 0; index < fifo_len; index++)
i2c_adapter->data_cmd = I2C_DATA_CMD_CMD;
if (i2c_adapter->tx_abrt_source != 0)
if(i2c_adapter->tx_abrt_source != 0)
return 1;
receive_buf_len -= fifo_len;
}
@ -233,28 +232,28 @@ void i2c_recv_data_dma(dmac_channel_number_t dma_send_channel_num, dmac_channel_
{
configASSERT(i2c_num < I2C_MAX_NUM);
volatile i2c_t* i2c_adapter = i2c[i2c_num];
volatile i2c_t *i2c_adapter = i2c[i2c_num];
uint32_t *write_cmd = malloc(sizeof(uint32_t) * (send_buf_len + receive_buf_len));
size_t i;
for(i = 0; i < send_buf_len; i++)
write_cmd[i] = *send_buf++;
for (i = 0; i < receive_buf_len; i++)
for(i = 0; i < receive_buf_len; i++)
write_cmd[i + send_buf_len] = I2C_DATA_CMD_CMD;
sysctl_dma_select((sysctl_dma_channel_t)dma_send_channel_num, SYSCTL_DMA_SELECT_I2C0_TX_REQ + i2c_num * 2);
sysctl_dma_select((sysctl_dma_channel_t)dma_receive_channel_num, SYSCTL_DMA_SELECT_I2C0_RX_REQ + i2c_num * 2);
dmac_set_single_mode(dma_receive_channel_num, (void *)(&i2c_adapter->data_cmd), write_cmd, DMAC_ADDR_NOCHANGE,
DMAC_ADDR_INCREMENT,DMAC_MSIZE_1, DMAC_TRANS_WIDTH_32, receive_buf_len);
DMAC_ADDR_INCREMENT, DMAC_MSIZE_1, DMAC_TRANS_WIDTH_32, receive_buf_len);
dmac_set_single_mode(dma_send_channel_num, write_cmd, (void *)(&i2c_adapter->data_cmd), DMAC_ADDR_INCREMENT,
DMAC_ADDR_NOCHANGE,DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, receive_buf_len + send_buf_len);
DMAC_ADDR_NOCHANGE, DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, receive_buf_len + send_buf_len);
dmac_wait_done(dma_send_channel_num);
dmac_wait_done(dma_receive_channel_num);
for (i = 0; i < receive_buf_len; i++)
for(i = 0; i < receive_buf_len; i++)
{
receive_buf[i] = (uint8_t)write_cmd[i];
}
@ -265,13 +264,13 @@ void i2c_recv_data_dma(dmac_channel_number_t dma_send_channel_num, dmac_channel_
static int i2c_dma_irq(void *ctx)
{
i2c_instance_t *v_instance = (i2c_instance_t *)ctx;
volatile i2c_t* i2c_adapter = i2c[v_instance->i2c_num];
volatile i2c_t *i2c_adapter = i2c[v_instance->i2c_num];
dmac_irq_unregister(v_instance->dmac_channel);
if(v_instance->transfer_mode == I2C_SEND)
{
while ((i2c_adapter->status & I2C_STATUS_ACTIVITY) || !(i2c_adapter->status & I2C_STATUS_TFE))
while((i2c_adapter->status & I2C_STATUS_ACTIVITY) || !(i2c_adapter->status & I2C_STATUS_TFE))
{
if (i2c_adapter->tx_abrt_source != 0)
if(i2c_adapter->tx_abrt_source != 0)
{
spinlock_unlock(&v_instance->lock);
return -1;
@ -298,7 +297,7 @@ void i2c_handle_data_dma(i2c_device_number_t i2c_num, i2c_data_t data, plic_inte
g_i2c_instance[i2c_num].i2c_int_instance.ctx = cb->ctx;
}
volatile i2c_t* i2c_adapter = i2c[i2c_num];
volatile i2c_t *i2c_adapter = i2c[i2c_num];
if(data.transfer_mode == I2C_SEND)
{
configASSERT(data.tx_buf && data.tx_len);
@ -312,18 +311,17 @@ void i2c_handle_data_dma(i2c_device_number_t i2c_num, i2c_data_t data, plic_inte
}
sysctl_dma_select((sysctl_dma_channel_t)data.tx_channel, SYSCTL_DMA_SELECT_I2C0_TX_REQ + i2c_num * 2);
dmac_set_single_mode(data.tx_channel, data.tx_buf, (void *)(&i2c_adapter->data_cmd), DMAC_ADDR_INCREMENT, DMAC_ADDR_NOCHANGE,
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, data.tx_len);
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, data.tx_len);
if(!cb)
{
dmac_wait_done(data.tx_channel);
while ((i2c_adapter->status & I2C_STATUS_ACTIVITY) || !(i2c_adapter->status & I2C_STATUS_TFE))
while((i2c_adapter->status & I2C_STATUS_ACTIVITY) || !(i2c_adapter->status & I2C_STATUS_TFE))
{
if (i2c_adapter->tx_abrt_source != 0)
if(i2c_adapter->tx_abrt_source != 0)
configASSERT(!"source abort");
}
}
}
else
} else
{
configASSERT(data.rx_buf && data.rx_len);
if(data.tx_len)
@ -336,19 +334,19 @@ void i2c_handle_data_dma(i2c_device_number_t i2c_num, i2c_data_t data, plic_inte
}
sysctl_dma_select((sysctl_dma_channel_t)data.rx_channel, SYSCTL_DMA_SELECT_I2C0_RX_REQ + i2c_num * 2);
dmac_set_single_mode(data.rx_channel, (void *)(&i2c_adapter->data_cmd), data.rx_buf, DMAC_ADDR_NOCHANGE,
DMAC_ADDR_INCREMENT,DMAC_MSIZE_1, DMAC_TRANS_WIDTH_32, data.rx_len);
DMAC_ADDR_INCREMENT, DMAC_MSIZE_1, DMAC_TRANS_WIDTH_32, data.rx_len);
sysctl_dma_select((sysctl_dma_channel_t)data.tx_channel, SYSCTL_DMA_SELECT_I2C0_TX_REQ + i2c_num * 2);
if(data.tx_len)
{
configASSERT(data.tx_buf);
dmac_set_single_mode(data.tx_channel, data.tx_buf, (void *)(&i2c_adapter->data_cmd), DMAC_ADDR_INCREMENT,
DMAC_ADDR_NOCHANGE,DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, data.tx_len);
DMAC_ADDR_NOCHANGE, DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, data.tx_len);
dmac_wait_done(data.tx_channel);
}
static uint32_t s_read_cmd = I2C_DATA_CMD_CMD;
dmac_set_single_mode(data.tx_channel, &s_read_cmd, (void *)(&i2c_adapter->data_cmd), DMAC_ADDR_NOCHANGE,
DMAC_ADDR_NOCHANGE,DMAC_MSIZE_1, DMAC_TRANS_WIDTH_32, data.rx_len);
DMAC_ADDR_NOCHANGE, DMAC_MSIZE_1, DMAC_TRANS_WIDTH_32, data.rx_len);
if(!cb)
{

217
lib/drivers/i2s.c
View File

@ -12,20 +12,19 @@
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include <math.h>
#include <stdint.h>
#include <stdio.h>
#include <math.h>
#include "i2s.h"
#include "sysctl.h"
#include "stdlib.h"
#include "sysctl.h"
#include "utils.h"
volatile i2s_t *const i2s[3] =
{
(volatile i2s_t *)I2S0_BASE_ADDR,
(volatile i2s_t *)I2S1_BASE_ADDR,
(volatile i2s_t *)I2S2_BASE_ADDR
};
{
(volatile i2s_t *)I2S0_BASE_ADDR,
(volatile i2s_t *)I2S1_BASE_ADDR,
(volatile i2s_t *)I2S2_BASE_ADDR};
typedef struct _i2s_instance
{
@ -39,11 +38,11 @@ static i2s_instance_t g_i2s_send_instance[3];
static i2s_instance_t g_i2s_recv_instance[3];
static int i2s_recv_channel_enable(i2s_device_number_t device_num,
i2s_channel_num_t channel_num, uint32_t enable)
i2s_channel_num_t channel_num, uint32_t enable)
{
rer_t u_rer;
if (channel_num < I2S_CHANNEL_0 || channel_num > I2S_CHANNEL_3)
if(channel_num < I2S_CHANNEL_0 || channel_num > I2S_CHANNEL_3)
return -1;
u_rer.reg_data = readl(&i2s[device_num]->channel[channel_num].rer);
u_rer.rer.rxchenx = enable;
@ -52,11 +51,11 @@ static int i2s_recv_channel_enable(i2s_device_number_t device_num,
}
static int i2s_transmit_channel_enable(i2s_device_number_t device_num,
i2s_channel_num_t channel_num, uint32_t enable)
i2s_channel_num_t channel_num, uint32_t enable)
{
ter_t u_ter;
if (channel_num < I2S_CHANNEL_0 || channel_num > I2S_CHANNEL_3)
if(channel_num < I2S_CHANNEL_0 || channel_num > I2S_CHANNEL_3)
return -1;
u_ter.reg_data = readl(&i2s[device_num]->channel[channel_num].ter);
@ -105,14 +104,13 @@ static void i2s_disable_block(i2s_device_number_t device_num, i2s_transmit_t rxt
irer_t u_irer;
iter_t u_iter;
if (rxtx_mode == I2S_RECEIVER)
if(rxtx_mode == I2S_RECEIVER)
{
u_irer.reg_data = readl(&i2s[device_num]->irer);
u_irer.irer.rxen = 0;
writel(u_irer.reg_data, &i2s[device_num]->irer);
/* Receiver block disable */
}
else
} else
{
u_iter.reg_data = readl(&i2s[device_num]->iter);
u_iter.iter.txen = 0;
@ -122,14 +120,14 @@ static void i2s_disable_block(i2s_device_number_t device_num, i2s_transmit_t rxt
}
static int i2s_set_rx_word_length(i2s_device_number_t device_num,
i2s_word_length_t word_length,
i2s_channel_num_t channel_num)
i2s_word_length_t word_length,
i2s_channel_num_t channel_num)
{
rcr_tcr_t u_rcr;
if (word_length > RESOLUTION_32_BIT || word_length < IGNORE_WORD_LENGTH)
if(word_length > RESOLUTION_32_BIT || word_length < IGNORE_WORD_LENGTH)
return -1;
if (channel_num < I2S_CHANNEL_0 || channel_num > I2S_CHANNEL_3)
if(channel_num < I2S_CHANNEL_0 || channel_num > I2S_CHANNEL_3)
return -1;
u_rcr.reg_data = readl(&i2s[device_num]->channel[channel_num].rcr);
@ -139,14 +137,14 @@ static int i2s_set_rx_word_length(i2s_device_number_t device_num,
}
static int i2s_set_tx_word_length(i2s_device_number_t device_num,
i2s_word_length_t word_length,
i2s_channel_num_t channel_num)
i2s_word_length_t word_length,
i2s_channel_num_t channel_num)
{
rcr_tcr_t u_tcr;
if (word_length > RESOLUTION_32_BIT || word_length < IGNORE_WORD_LENGTH)
if(word_length > RESOLUTION_32_BIT || word_length < IGNORE_WORD_LENGTH)
return -1;
if (channel_num < I2S_CHANNEL_0 || channel_num > I2S_CHANNEL_3)
if(channel_num < I2S_CHANNEL_0 || channel_num > I2S_CHANNEL_3)
return -1;
u_tcr.reg_data = readl(&i2s[device_num]->channel[channel_num].tcr);
@ -156,14 +154,14 @@ static int i2s_set_tx_word_length(i2s_device_number_t device_num,
}
static void i2s_master_configure(i2s_device_number_t device_num,
i2s_word_select_cycles_t word_select_size,
i2s_sclk_gating_cycles_t gating_cycles,
i2s_work_mode_t word_mode)
i2s_word_select_cycles_t word_select_size,
i2s_sclk_gating_cycles_t gating_cycles,
i2s_work_mode_t word_mode)
{
configASSERT(!(word_select_size < SCLK_CYCLES_16 ||
word_select_size > SCLK_CYCLES_32));
word_select_size > SCLK_CYCLES_32));
configASSERT(!(gating_cycles < NO_CLOCK_GATING ||
gating_cycles > CLOCK_CYCLES_24));
gating_cycles > CLOCK_CYCLES_24));
ccr_t u_ccr;
cer_t u_cer;
@ -178,18 +176,17 @@ static void i2s_master_configure(i2s_device_number_t device_num,
u_cer.cer.clken = 1;
writel(u_cer.reg_data, &i2s[device_num]->cer);
/* Clock generation enable */
}
static int i2s_set_rx_threshold(i2s_device_number_t device_num,
i2s_fifo_threshold_t threshold,
i2s_channel_num_t channel_num)
i2s_fifo_threshold_t threshold,
i2s_channel_num_t channel_num)
{
rfcr_t u_rfcr;
if (threshold < TRIGGER_LEVEL_1 || threshold > TRIGGER_LEVEL_16)
if(threshold < TRIGGER_LEVEL_1 || threshold > TRIGGER_LEVEL_16)
return -1;
if (channel_num < I2S_CHANNEL_0 || channel_num > I2S_CHANNEL_3)
if(channel_num < I2S_CHANNEL_0 || channel_num > I2S_CHANNEL_3)
return -1;
u_rfcr.reg_data = readl(&i2s[device_num]->channel[channel_num].rfcr);
@ -200,14 +197,14 @@ static int i2s_set_rx_threshold(i2s_device_number_t device_num,
}
static int i2s_set_tx_threshold(i2s_device_number_t device_num,
i2s_fifo_threshold_t threshold,
i2s_channel_num_t channel_num)
i2s_fifo_threshold_t threshold,
i2s_channel_num_t channel_num)
{
tfcr_t u_tfcr;
if (threshold < TRIGGER_LEVEL_1 || threshold > TRIGGER_LEVEL_16)
if(threshold < TRIGGER_LEVEL_1 || threshold > TRIGGER_LEVEL_16)
return -1;
if (channel_num < I2S_CHANNEL_0 || channel_num > I2S_CHANNEL_3)
if(channel_num < I2S_CHANNEL_0 || channel_num > I2S_CHANNEL_3)
return -1;
u_tfcr.reg_data = readl(&i2s[device_num]->channel[channel_num].tfcr);
@ -217,30 +214,30 @@ static int i2s_set_tx_threshold(i2s_device_number_t device_num,
}
static int i2s_set_mask_interrupt(i2s_device_number_t device_num,
i2s_channel_num_t channel_num,
uint32_t rx_available_int, uint32_t rx_overrun_int,
uint32_t tx_empty_int, uint32_t tx_overrun_int)
i2s_channel_num_t channel_num,
uint32_t rx_available_int, uint32_t rx_overrun_int,
uint32_t tx_empty_int, uint32_t tx_overrun_int)
{
imr_t u_imr;
if (channel_num < I2S_CHANNEL_0 || channel_num > I2S_CHANNEL_3)
if(channel_num < I2S_CHANNEL_0 || channel_num > I2S_CHANNEL_3)
return -1;
u_imr.reg_data = readl(&i2s[device_num]->channel[channel_num].imr);
if (rx_available_int == 1)
if(rx_available_int == 1)
u_imr.imr.rxdam = 1;
else
u_imr.imr.rxdam = 0;
if (rx_overrun_int == 1)
if(rx_overrun_int == 1)
u_imr.imr.rxfom = 1;
else
u_imr.imr.rxfom = 0;
if (tx_empty_int == 1)
if(tx_empty_int == 1)
u_imr.imr.txfem = 1;
else
u_imr.imr.txfem = 0;
if (tx_overrun_int == 1)
if(tx_overrun_int == 1)
u_imr.imr.txfom = 1;
else
u_imr.imr.txfom = 0;
@ -252,7 +249,7 @@ static int i2s_transmit_dma_enable(i2s_device_number_t device_num, uint32_t enab
{
ccr_t u_ccr;
if (device_num >= I2S_DEVICE_MAX)
if(device_num >= I2S_DEVICE_MAX)
return -1;
u_ccr.reg_data = readl(&i2s[device_num]->ccr);
@ -266,7 +263,7 @@ static int i2s_receive_dma_enable(i2s_device_number_t device_num, uint32_t enabl
{
ccr_t u_ccr;
if (device_num >= I2S_DEVICE_MAX)
if(device_num >= I2S_DEVICE_MAX)
return -1;
u_ccr.reg_data = readl(&i2s[device_num]->ccr);
@ -280,7 +277,7 @@ int i2s_set_dma_divide_16(i2s_device_number_t device_num, uint32_t enable)
{
ccr_t u_ccr;
if (device_num >= I2S_DEVICE_MAX)
if(device_num >= I2S_DEVICE_MAX)
return -1;
u_ccr.reg_data = readl(&i2s[device_num]->ccr);
@ -292,7 +289,7 @@ int i2s_set_dma_divide_16(i2s_device_number_t device_num, uint32_t enable)
int i2s_get_dma_divide_16(i2s_device_number_t device_num)
{
if (device_num >= I2S_DEVICE_MAX)
if(device_num >= I2S_DEVICE_MAX)
return -1;
ccr_t u_ccr;
u_ccr.reg_data = readl(&i2s[device_num]->ccr);
@ -307,10 +304,10 @@ int i2s_receive_data(i2s_device_number_t device_num, i2s_channel_num_t channel_n
readl(&i2s[device_num]->channel[channel_num].ror);
/*clear over run*/
for (i = 0; i < buf_len;)
for(i = 0; i < buf_len;)
{
u_isr.reg_data = readl(&i2s[device_num]->channel[channel_num].isr);
if (u_isr.isr.rxda == 1)
if(u_isr.isr.rxda == 1)
{
buf[i] = readl(&i2s[device_num]->channel[channel_num].left_rxtx);
buf[i] <<= 32;
@ -326,20 +323,20 @@ void i2s_receive_data_dma(i2s_device_number_t device_num, uint32_t *buf,
dmac_wait_idle(channel_num);
sysctl_dma_select((sysctl_dma_channel_t)channel_num, SYSCTL_DMA_SELECT_I2S0_RX_REQ + device_num * 2);
dmac_set_single_mode(channel_num, (void *)(&i2s[device_num]->rxdma), buf, DMAC_ADDR_NOCHANGE, DMAC_ADDR_INCREMENT,
DMAC_MSIZE_1, DMAC_TRANS_WIDTH_32, buf_len);
DMAC_MSIZE_1, DMAC_TRANS_WIDTH_32, buf_len);
}
int i2s_rx_to_tx(i2s_device_number_t device_src_num, i2s_device_number_t device_dest_num,
size_t buf_len, dmac_channel_number_t channel_num)
size_t buf_len, dmac_channel_number_t channel_num)
{
static uint8_t dmac_recv_flag[6] = {0,0,0,0,0,0};
static uint8_t dmac_recv_flag[6] = {0, 0, 0, 0, 0, 0};
if(dmac_recv_flag[channel_num])
dmac_wait_done(channel_num);
else
dmac_recv_flag[channel_num] = 1;
sysctl_dma_select((sysctl_dma_channel_t)channel_num, SYSCTL_DMA_SELECT_I2S0_RX_REQ + device_src_num * 2);
dmac_set_single_mode(channel_num, (void *)(&i2s[device_src_num]->rxdma), (void *)(&i2s[device_dest_num]->txdma), DMAC_ADDR_NOCHANGE, DMAC_ADDR_NOCHANGE,
DMAC_MSIZE_1, DMAC_TRANS_WIDTH_32, buf_len);
DMAC_MSIZE_1, DMAC_TRANS_WIDTH_32, buf_len);
return 0;
}
@ -351,17 +348,17 @@ int i2s_send_data(i2s_device_number_t device_num, i2s_channel_num_t channel_num,
uint32_t right_buffer = 0;
uint32_t i = 0;
uint32_t j = 0;
if (channel_num < I2S_CHANNEL_0 || channel_num > I2S_CHANNEL_3)
if(channel_num < I2S_CHANNEL_0 || channel_num > I2S_CHANNEL_3)
return -1;
buf_len = buf_len / (single_length / 8) / 2; /* sample num */
readl(&i2s[device_num]->channel[channel_num].tor);
/* read clear overrun flag */
for (j = 0; j < buf_len;)
for(j = 0; j < buf_len;)
{
u_isr.reg_data = readl(&i2s[device_num]->channel[channel_num].isr);
if (u_isr.isr.txfe == 1)
if(u_isr.isr.txfe == 1)
{
switch(single_length)
{
@ -405,33 +402,33 @@ void i2s_send_data_dma(i2s_device_number_t device_num, const void *buf, size_t b
DMAC_ADDR_NOCHANGE, DMAC_MSIZE_1, DMAC_TRANS_WIDTH_32, buf_len);
}
static void i2s_parse_voice(i2s_device_number_t device_num, uint32_t *buf, const uint8_t *pcm, size_t length, size_t bits_per_sample,
uint8_t track_num, size_t *send_len)
static void i2s_parse_voice(i2s_device_number_t device_num, uint32_t *buf, const uint8_t *pcm, size_t length, size_t bits_per_sample,
uint8_t track_num, size_t *send_len)
{
uint32_t i,j=0;
uint32_t i, j = 0;
*send_len = length * 2;
switch(bits_per_sample)
{
case 16:
for(i = 0; i < length; i++)
{
buf[2*i] = ((uint16_t *)pcm)[i];
buf[2*i+1] = 0;
buf[2 * i] = ((uint16_t *)pcm)[i];
buf[2 * i + 1] = 0;
}
break;
case 24:
for(i = 0; i < length; i++)
{
buf[2*i] = 0;
buf[2*i] |= pcm[j++];
buf[2*i] |= pcm[j++] << 8;
buf[2*i] |= pcm[j++] << 16;
buf[2*i+1] = 0;
buf[2 * i] = 0;
buf[2 * i] |= pcm[j++];
buf[2 * i] |= pcm[j++] << 8;
buf[2 * i] |= pcm[j++] << 16;
buf[2 * i + 1] = 0;
if(track_num == 2)
{
buf[2*i+1] |= pcm[j++];
buf[2*i+1] |= pcm[j++] << 8;
buf[2*i+1] |= pcm[j++] << 16;
buf[2 * i + 1] |= pcm[j++];
buf[2 * i + 1] |= pcm[j++] << 8;
buf[2 * i + 1] |= pcm[j++] << 16;
}
}
break;
@ -439,66 +436,63 @@ static void i2s_parse_voice(i2s_device_number_t device_num, uint32_t *buf, const
default:
for(i = 0; i < length; i++)
{
buf[2*i] = ((uint32_t *)pcm)[i];
buf[2*i+1] = 0;
buf[2 * i] = ((uint32_t *)pcm)[i];
buf[2 * i + 1] = 0;
}
break;
}
}
void i2s_play(i2s_device_number_t device_num, dmac_channel_number_t channel_num,
const uint8_t *buf, size_t buf_len, size_t frame, size_t bits_per_sample, uint8_t track_num)
{
const uint8_t *trans_buf;
uint32_t i;
size_t sample_cnt = buf_len / ( bits_per_sample / 8 ) / track_num;
size_t sample_cnt = buf_len / (bits_per_sample / 8) / track_num;
size_t frame_cnt = sample_cnt / frame;
size_t frame_remain = sample_cnt % frame;
i2s_set_dma_divide_16(device_num, 0);
if (bits_per_sample == 16 && track_num == 2)
if(bits_per_sample == 16 && track_num == 2)
{
i2s_set_dma_divide_16(device_num, 1);
for (i = 0; i < frame_cnt; i++)
for(i = 0; i < frame_cnt; i++)
{
trans_buf = buf + i * frame * (bits_per_sample / 8) * track_num;
i2s_send_data_dma(device_num,trans_buf, frame, channel_num);
i2s_send_data_dma(device_num, trans_buf, frame, channel_num);
}
if(frame_remain)
{
trans_buf = buf + frame_cnt * frame * (bits_per_sample / 8) * track_num;
i2s_send_data_dma(device_num, trans_buf, frame_remain, channel_num);
}
}
else if (bits_per_sample == 32 && track_num == 2)
} else if(bits_per_sample == 32 && track_num == 2)
{
for (i = 0; i < frame_cnt; i++)
for(i = 0; i < frame_cnt; i++)
{
trans_buf = buf + i * frame * (bits_per_sample / 8) * track_num;
i2s_send_data_dma(device_num,trans_buf, frame * 2, channel_num);
i2s_send_data_dma(device_num, trans_buf, frame * 2, channel_num);
}
if(frame_remain)
{
trans_buf = buf + frame_cnt * frame * (bits_per_sample / 8) * track_num;
i2s_send_data_dma(device_num, trans_buf, frame_remain * 2, channel_num);
}
}
else
} else
{
uint32_t *buff[2];
buff[0] = malloc(frame * 2 * sizeof(uint32_t) * 2);
buff[1] = buff[0] + frame * 2;
uint8_t flag = 0;
size_t send_len = 0;
for (i = 0; i < frame_cnt; i++)
for(i = 0; i < frame_cnt; i++)
{
trans_buf = buf + i * frame * (bits_per_sample / 8) * track_num;
i2s_parse_voice(device_num, buff[flag], trans_buf, frame, bits_per_sample, track_num, &send_len);
i2s_send_data_dma(device_num,buff[flag], send_len, channel_num);
i2s_send_data_dma(device_num, buff[flag], send_len, channel_num);
flag = !flag;
}
if (frame_remain)
if(frame_remain)
{
trans_buf = buf + frame_cnt * frame * (bits_per_sample / 8) * track_num;
i2s_parse_voice(device_num, buff[flag], trans_buf, frame_remain, bits_per_sample, track_num, &send_len);
@ -517,11 +511,11 @@ static inline void i2s_set_sign_expand_en(i2s_device_number_t device_num, uint32
}
void i2s_rx_channel_config(i2s_device_number_t device_num,
i2s_channel_num_t channel_num,
i2s_word_length_t word_length,
i2s_word_select_cycles_t word_select_size,
i2s_fifo_threshold_t trigger_level,
i2s_work_mode_t word_mode)
i2s_channel_num_t channel_num,
i2s_word_length_t word_length,
i2s_word_select_cycles_t word_select_size,
i2s_fifo_threshold_t trigger_level,
i2s_work_mode_t word_mode)
{
i2s_recv_channel_enable(device_num, channel_num, 0);
/* Receive channel disable */
@ -539,7 +533,7 @@ void i2s_rx_channel_config(i2s_device_number_t device_num,
/* Word buf_len is RESOLUTION_32_BIT */
i2s_master_configure(device_num,
word_select_size, NO_CLOCK_GATING, word_mode);
word_select_size, NO_CLOCK_GATING, word_mode);
/* word select size is 32 bits,no clock gating */
i2s_set_rx_threshold(device_num, trigger_level, channel_num);
@ -552,11 +546,11 @@ void i2s_rx_channel_config(i2s_device_number_t device_num,
}
void i2s_tx_channel_config(i2s_device_number_t device_num,
i2s_channel_num_t channel_num,
i2s_word_length_t word_length,
i2s_word_select_cycles_t word_select_size,
i2s_fifo_threshold_t trigger_level,
i2s_work_mode_t word_mode)
i2s_channel_num_t channel_num,
i2s_word_length_t word_length,
i2s_word_select_cycles_t word_select_size,
i2s_fifo_threshold_t trigger_level,
i2s_work_mode_t word_mode)
{
writel(0, &i2s[device_num]->channel[channel_num].rer);
/* disable rx */
@ -584,41 +578,38 @@ void i2s_tx_channel_config(i2s_device_number_t device_num,
void i2s_init(i2s_device_number_t device_num, i2s_transmit_t rxtx_mode, uint32_t channel_mask)
{
sysctl_clock_enable(SYSCTL_CLOCK_I2S0 + device_num);
sysctl_reset(SYSCTL_RESET_I2S0 + device_num);
sysctl_clock_set_threshold(SYSCTL_THRESHOLD_I2S0 + device_num, 7);
sysctl_reset(SYSCTL_RESET_I2S0 + device_num);
sysctl_clock_set_threshold(SYSCTL_THRESHOLD_I2S0 + device_num, 7);
/*96k:5,44k:12,24k:23,22k:25 16k:35 sampling*/
/*sample rate*32bit*2 =75MHz/((N+1)*2) */
i2s_set_enable(device_num, 1);
i2s_disable_block(device_num, I2S_TRANSMITTER);
i2s_disable_block(device_num, I2S_RECEIVER);
if (rxtx_mode == I2S_TRANSMITTER)
if(rxtx_mode == I2S_TRANSMITTER)
{
for (int i=0; i<4; i++)
for(int i = 0; i < 4; i++)
{
if ((channel_mask & 0x3) == 0x3)
if((channel_mask & 0x3) == 0x3)
{
i2s_set_mask_interrupt(device_num, I2S_CHANNEL_0 + i, 1, 1, 1, 1);
i2s_transimit_enable(device_num, I2S_CHANNEL_0 + i);
}
else
} else
{
i2s_transmit_channel_enable(device_num, I2S_CHANNEL_0 + i, 0);
}
channel_mask >>= 2;
}
i2s_transmit_dma_enable(device_num, 1);
}
else
} else
{
for (int i=0; i<4; i++)
for(int i = 0; i < 4; i++)
{
if ((channel_mask & 0x3) == 0x3)
if((channel_mask & 0x3) == 0x3)
{
i2s_set_mask_interrupt(device_num, I2S_CHANNEL_0 + i, 1, 1, 1, 1);
i2s_receive_enable(device_num, I2S_CHANNEL_0 + i);
}
else
} else
{
i2s_recv_channel_enable(device_num, I2S_CHANNEL_0 + i, 0);
}
@ -680,8 +671,7 @@ void i2s_handle_data_dma(i2s_device_number_t device_num, i2s_data_t data, plic_i
{
dmac_wait_done(data.tx_channel);
}
}
else
} else
{
configASSERT(data.rx_buf && data.rx_len);
if(!data.nowait_dma_idle)
@ -698,11 +688,10 @@ void i2s_handle_data_dma(i2s_device_number_t device_num, i2s_data_t data, plic_i
}
sysctl_dma_select((sysctl_dma_channel_t)data.rx_channel, SYSCTL_DMA_SELECT_I2S0_RX_REQ + device_num * 2);
dmac_set_single_mode(data.rx_channel, (void *)(&i2s[device_num]->rxdma), data.rx_buf, DMAC_ADDR_NOCHANGE, DMAC_ADDR_INCREMENT,
DMAC_MSIZE_1, DMAC_TRANS_WIDTH_32, data.rx_len);
DMAC_MSIZE_1, DMAC_TRANS_WIDTH_32, data.rx_len);
if(!cb && data.wait_dma_done)
{
dmac_wait_done(data.rx_channel);
}
}
}

164
lib/drivers/include/aes.h
View File

@ -14,10 +14,10 @@
*/
#ifndef _DRIVER_AES_H
#define _DRIVER_AES_H
#include <stdlib.h>
#include <stdint.h>
#include "platform.h"
#include <stdlib.h>
#include "dmac.h"
#include "platform.h"
#ifdef __cplusplus
extern "C" {
@ -396,10 +396,10 @@ void aes_gcm256_hard_encrypt(gcm_context_t *context, uint8_t *input_data, size_t
* The buffer size must be larger than the size after padding by 16 byte multiples.
*/
void aes_ecb128_hard_decrypt_dma(dmac_channel_number_t dma_receive_channel_num,
uint8_t *input_key,
uint8_t *input_data,
size_t input_len,
uint8_t *output_data);
uint8_t *input_key,
uint8_t *input_data,
size_t input_len,
uint8_t *output_data);
/**
* @brief AES-ECB-128 encryption by dma
@ -414,10 +414,10 @@ void aes_ecb128_hard_decrypt_dma(dmac_channel_number_t dma_receive_channel_num,
* The buffer size must be larger than the size after padding by 16 byte multiples.
*/
void aes_ecb128_hard_encrypt_dma(dmac_channel_number_t dma_receive_channel_num,
uint8_t *input_key,
uint8_t *input_data,
size_t input_len,
uint8_t *output_data);
uint8_t *input_key,
uint8_t *input_data,
size_t input_len,
uint8_t *output_data);
/**
* @brief AES-ECB-192 decryption by dma
@ -432,10 +432,10 @@ void aes_ecb128_hard_encrypt_dma(dmac_channel_number_t dma_receive_channel_num,
* The buffer size must be larger than the size after padding by 16 byte multiples.
*/
void aes_ecb192_hard_decrypt_dma(dmac_channel_number_t dma_receive_channel_num,
uint8_t *input_key,
uint8_t *input_data,
size_t input_len,
uint8_t *output_data);
uint8_t *input_key,
uint8_t *input_data,
size_t input_len,
uint8_t *output_data);
/**
* @brief AES-ECB-192 encryption by dma
@ -450,10 +450,10 @@ void aes_ecb192_hard_decrypt_dma(dmac_channel_number_t dma_receive_channel_num,
* The buffer size must be larger than the size after padding by 16 byte multiples.
*/
void aes_ecb192_hard_encrypt_dma(dmac_channel_number_t dma_receive_channel_num,
uint8_t *input_key,
uint8_t *input_data,
size_t input_len,
uint8_t *output_data);
uint8_t *input_key,
uint8_t *input_data,
size_t input_len,
uint8_t *output_data);
/**
* @brief AES-ECB-256 decryption by dma
@ -468,10 +468,10 @@ void aes_ecb192_hard_encrypt_dma(dmac_channel_number_t dma_receive_channel_num,
* The buffer size must be larger than the size after padding by 16 byte multiples.
*/
void aes_ecb256_hard_decrypt_dma(dmac_channel_number_t dma_receive_channel_num,
uint8_t *input_key,
uint8_t *input_data,
size_t input_len,
uint8_t *output_data);
uint8_t *input_key,
uint8_t *input_data,
size_t input_len,
uint8_t *output_data);
/**
* @brief AES-ECB-256 encryption by dma
@ -486,10 +486,10 @@ void aes_ecb256_hard_decrypt_dma(dmac_channel_number_t dma_receive_channel_num,
* The buffer size must be larger than the size after padding by 16 byte multiples.
*/
void aes_ecb256_hard_encrypt_dma(dmac_channel_number_t dma_receive_channel_num,
uint8_t *input_key,
uint8_t *input_data,
size_t input_len,
uint8_t *output_data);
uint8_t *input_key,
uint8_t *input_data,
size_t input_len,
uint8_t *output_data);
/**
* @brief AES-CBC-128 decryption
@ -505,10 +505,10 @@ void aes_ecb256_hard_encrypt_dma(dmac_channel_number_t dma_receive_channel_num,
* The buffer size must be larger than the size after padding by 16 byte multiples.
*/
void aes_cbc128_hard_decrypt_dma(dmac_channel_number_t dma_receive_channel_num,
cbc_context_t *context,
uint8_t *input_data,
size_t input_len,
uint8_t *output_data);
cbc_context_t *context,
uint8_t *input_data,
size_t input_len,
uint8_t *output_data);
/**
* @brief AES-CBC-128 encryption
@ -524,10 +524,10 @@ void aes_cbc128_hard_decrypt_dma(dmac_channel_number_t dma_receive_channel_num,
* The buffer size must be larger than the size after padding by 16 byte multiples.
*/
void aes_cbc128_hard_encrypt_dma(dmac_channel_number_t dma_receive_channel_num,
cbc_context_t *context,
uint8_t *input_data,
size_t input_len,
uint8_t *output_data);
cbc_context_t *context,
uint8_t *input_data,
size_t input_len,
uint8_t *output_data);
/**
* @brief AES-CBC-192 decryption
@ -543,10 +543,10 @@ void aes_cbc128_hard_encrypt_dma(dmac_channel_number_t dma_receive_channel_num,
* The buffer size must be larger than the size after padding by 16 byte multiples.
*/
void aes_cbc192_hard_decrypt_dma(dmac_channel_number_t dma_receive_channel_num,
cbc_context_t *context,
uint8_t *input_data,
size_t input_len,
uint8_t *output_data);
cbc_context_t *context,
uint8_t *input_data,
size_t input_len,
uint8_t *output_data);
/**
* @brief AES-CBC-192 encryption
@ -562,10 +562,10 @@ void aes_cbc192_hard_decrypt_dma(dmac_channel_number_t dma_receive_channel_num,
* The buffer size must be larger than the size after padding by 16 byte multiples.
*/
void aes_cbc192_hard_encrypt_dma(dmac_channel_number_t dma_receive_channel_num,
cbc_context_t *context,
uint8_t *input_data,
size_t input_len,
uint8_t *output_data);
cbc_context_t *context,
uint8_t *input_data,
size_t input_len,
uint8_t *output_data);
/**
* @brief AES-CBC-256 decryption
@ -581,10 +581,10 @@ void aes_cbc192_hard_encrypt_dma(dmac_channel_number_t dma_receive_channel_num,
* The buffer size must be larger than the size after padding by 16 byte multiples.
*/
void aes_cbc256_hard_decrypt_dma(dmac_channel_number_t dma_receive_channel_num,
cbc_context_t *context,
uint8_t *input_data,
size_t input_len,
uint8_t *output_data);
cbc_context_t *context,
uint8_t *input_data,
size_t input_len,
uint8_t *output_data);
/**
* @brief AES-CBC-256 encryption
@ -600,10 +600,10 @@ void aes_cbc256_hard_decrypt_dma(dmac_channel_number_t dma_receive_channel_num,
* The buffer size must be larger than the size after padding by 16 byte multiples.
*/
void aes_cbc256_hard_encrypt_dma(dmac_channel_number_t dma_receive_channel_num,
cbc_context_t *context,
uint8_t *input_data,
size_t input_len,
uint8_t *output_data);
cbc_context_t *context,
uint8_t *input_data,
size_t input_len,
uint8_t *output_data);
/**
* @brief AES-GCM-128 decryption
@ -619,11 +619,11 @@ void aes_cbc256_hard_encrypt_dma(dmac_channel_number_t dma_receive_channel_num,
* @param[out] gcm_tag The buffer for holding the tag.The length of the tag must be 4 bytes.
*/
void aes_gcm128_hard_decrypt_dma(dmac_channel_number_t dma_receive_channel_num,
gcm_context_t *context,
uint8_t *input_data,
size_t input_len,
uint8_t *output_data,
uint8_t *gcm_tag);
gcm_context_t *context,
uint8_t *input_data,
size_t input_len,
uint8_t *output_data,
uint8_t *gcm_tag);
/**
* @brief AES-GCM-128 encryption
@ -639,11 +639,11 @@ void aes_gcm128_hard_decrypt_dma(dmac_channel_number_t dma_receive_channel_num,
* @param[out] gcm_tag The buffer for holding the tag.The length of the tag must be 4 bytes.
*/
void aes_gcm128_hard_encrypt_dma(dmac_channel_number_t dma_receive_channel_num,
gcm_context_t *context,
uint8_t *input_data,
size_t input_len,
uint8_t *output_data,
uint8_t *gcm_tag);
gcm_context_t *context,
uint8_t *input_data,
size_t input_len,
uint8_t *output_data,
uint8_t *gcm_tag);
/**
* @brief AES-GCM-192 decryption
@ -659,11 +659,11 @@ void aes_gcm128_hard_encrypt_dma(dmac_channel_number_t dma_receive_channel_num,
* @param[out] gcm_tag The buffer for holding the tag.The length of the tag must be 4 bytes.
*/
void aes_gcm192_hard_decrypt_dma(dmac_channel_number_t dma_receive_channel_num,
gcm_context_t *context,
uint8_t *input_data,
size_t input_len,
uint8_t *output_data,
uint8_t *gcm_tag);
gcm_context_t *context,
uint8_t *input_data,
size_t input_len,
uint8_t *output_data,
uint8_t *gcm_tag);
/**
* @brief AES-GCM-192 encryption
@ -679,11 +679,11 @@ void aes_gcm192_hard_decrypt_dma(dmac_channel_number_t dma_receive_channel_num,
* @param[out] gcm_tag The buffer for holding the tag.The length of the tag must be 4 bytes.
*/
void aes_gcm192_hard_encrypt_dma(dmac_channel_number_t dma_receive_channel_num,
gcm_context_t *context,
uint8_t *input_data,
size_t input_len,
uint8_t *output_data,
uint8_t *gcm_tag);
gcm_context_t *context,
uint8_t *input_data,
size_t input_len,
uint8_t *output_data,
uint8_t *gcm_tag);
/**
* @brief AES-GCM-256 decryption
@ -699,11 +699,11 @@ void aes_gcm192_hard_encrypt_dma(dmac_channel_number_t dma_receive_channel_num,
* @param[out] gcm_tag The buffer for holding the tag.The length of the tag must be 4 bytes.
*/
void aes_gcm256_hard_decrypt_dma(dmac_channel_number_t dma_receive_channel_num,
gcm_context_t *context,
uint8_t *input_data,
size_t input_len,
uint8_t *output_data,
uint8_t *gcm_tag);
gcm_context_t *context,
uint8_t *input_data,
size_t input_len,
uint8_t *output_data,
uint8_t *gcm_tag);
/**
* @brief AES-GCM-256 encryption
@ -719,11 +719,11 @@ void aes_gcm256_hard_decrypt_dma(dmac_channel_number_t dma_receive_channel_num,
* @param[out] gcm_tag The buffer for holding the tag.The length of the tag must be 4 bytes.
*/
void aes_gcm256_hard_encrypt_dma(dmac_channel_number_t dma_receive_channel_num,
gcm_context_t *context,
uint8_t *input_data,
size_t input_len,
uint8_t *output_data,
uint8_t *gcm_tag);
gcm_context_t *context,
uint8_t *input_data,
size_t input_len,
uint8_t *output_data,
uint8_t *gcm_tag);
/**
* @brief This function initializes the AES hard module.
@ -739,8 +739,8 @@ void aes_gcm256_hard_encrypt_dma(dmac_channel_number_t dma_receive_channel_num,
* @param[in] gcm_aad_len The length of the gcm_aad.
* @param[in] input_data_len The length of the input_data.
*/
void aes_init(uint8_t *input_key, size_t input_key_len, uint8_t *iv,size_t iv_len, uint8_t *gcm_aad,
aes_cipher_mode_t cipher_mode, aes_encrypt_sel_t encrypt_sel, size_t gcm_aad_len, size_t input_data_len);
void aes_init(uint8_t *input_key, size_t input_key_len, uint8_t *iv, size_t iv_len, uint8_t *gcm_aad,
aes_cipher_mode_t cipher_mode, aes_encrypt_sel_t encrypt_sel, size_t gcm_aad_len, size_t input_data_len);
/**
* @brief This function feeds an input buffer into an encryption or decryption operation.

30
lib/drivers/include/apu.h
View File

@ -254,45 +254,45 @@ typedef struct _apu_int_mask
typedef struct _apu_reg
{
//0x200
apu_ch_cfg_t bf_ch_cfg_reg;
apu_ch_cfg_t bf_ch_cfg_reg;
//0x204
apu_ctl_t bf_ctl_reg;
apu_ctl_t bf_ctl_reg;
//0x208
apu_dir_bidx_t bf_dir_bidx[16][2];
apu_dir_bidx_t bf_dir_bidx[16][2];
//0x288
apu_fir_coef_t bf_pre_fir0_coef[9];
apu_fir_coef_t bf_pre_fir0_coef[9];
//0x2ac
apu_fir_coef_t bf_post_fir0_coef[9];
apu_fir_coef_t bf_post_fir0_coef[9];
//0x2d0
apu_fir_coef_t bf_pre_fir1_coef[9];
apu_fir_coef_t bf_pre_fir1_coef[9];
//0x2f4
apu_fir_coef_t bf_post_fir1_coef[9];
apu_fir_coef_t bf_post_fir1_coef[9];
//0x318
apu_dwsz_cfg_t bf_dwsz_cfg_reg;
apu_dwsz_cfg_t bf_dwsz_cfg_reg;
//0x31c
apu_fft_cfg_t bf_fft_cfg_reg;
apu_fft_cfg_t bf_fft_cfg_reg;
// 0x320
/**
* This is the read register for system DMA to read data stored in
* sample out buffers (the sample out buffers are used for sound
* direction detect). Each data contains two sound samples.
*/
volatile uint32_t sobuf_dma_rdata;
volatile uint32_t sobuf_dma_rdata;
// 0x324
/**
* This is the read register for system DMA to read data stored in voice
* out buffers (the voice out buffers are used for voice recognition).
* Each data contains two sound samples.
*/
volatile uint32_t vobuf_dma_rdata;
volatile uint32_t vobuf_dma_rdata;
/*0x328*/
apu_int_stat_t bf_int_stat_reg;
apu_int_stat_t bf_int_stat_reg;
/*0x32c*/
apu_int_mask_t bf_int_mask_reg;
apu_int_mask_t bf_int_mask_reg;
/*0x330*/
uint32_t saturation_counter;
uint32_t saturation_counter;
/*0x334*/
uint32_t saturation_limits;
uint32_t saturation_limits;
} __attribute__((packed, aligned(4))) apu_reg_t;
extern volatile apu_reg_t *const apu;

3
lib/drivers/include/clint.h
View File

@ -129,7 +129,7 @@ typedef struct _clint
/**
* @brief Clint object instanse
*/
extern volatile clint_t* const clint;
extern volatile clint_t *const clint;
/**
* @brief Definitions for the timer callbacks
@ -335,4 +335,3 @@ int clint_ipi_unregister(void);
#endif
#endif /* _DRIVER_CLINT_H */

171
lib/drivers/include/dmac.h
View File

@ -15,12 +15,12 @@
#ifndef _DRIVER_DMAC_H
#define _DRIVER_DMAC_H
#include <stddef.h>
#include <stdint.h>
#include "io.h"
#include "platform.h"
#include "stdbool.h"
#include "plic.h"
#include <stddef.h>
#include "stdbool.h"
#ifdef __cplusplus
extern "C" {
@ -56,9 +56,9 @@ typedef enum _state_value
typedef enum _dmac_lock_bus_ch
{
DMAC_LOCK_BUS = 0x1,
DMAC_LOCK_BUS = 0x1,
DMAC_LOCK_CHANNEL = 0x2,
DMAC_LOCK_BUS_CH = 0x3
DMAC_LOCK_BUS_CH = 0x3
} dmac_lock_bus_ch_t;
typedef enum _dmac_sw_hw_hs_select
@ -76,29 +76,29 @@ typedef enum _dmac_scatter_gather_param
typedef enum _dmac_irq
{
/* no interrupts */
DMAC_IRQ_NONE = 0x00,
DMAC_IRQ_NONE = 0x00,
/* transfer complete */
DMAC_IRQ_TFR = 0x01,
DMAC_IRQ_TFR = 0x01,
/* block transfer complete */
DMAC_IRQ_BLOCK = 0x02,
DMAC_IRQ_BLOCK = 0x02,
/* source transaction complete */
DMAC_IRQ_SRCTRAN = 0x04,
/* destination transaction complete */
DMAC_IRQ_DSTTRAN = 0x08,
/* error */
DMAC_IRQ_ERR = 0x10,
DMAC_IRQ_ERR = 0x10,
/* all interrupts */
DMAC_IRQ_ALL = 0x1f
DMAC_IRQ_ALL = 0x1f
} dmac_irq_t;
typedef enum _dmac_software_req
{
/* ReqSrcReq/ReqDstReq */
DMAC_REQUEST = 0x1,
DMAC_REQUEST = 0x1,
/* SglReqSrcReq/SglReqDstReq */
DMAC_SINGLE_REQUEST = 0x2,
/* LstReqSrcReq/LstReqDstReq */
DMAC_LAST_REQUEST = 0x4
DMAC_LAST_REQUEST = 0x4
} dmac_software_req_t;
typedef enum _dmac_master_number
@ -110,31 +110,31 @@ typedef enum _dmac_master_number
typedef enum _dmac_transfer_flow
{
/* mem to mem - DMAC flow ctlr */
DMAC_MEM2MEM_DMA = 0x0,
DMAC_MEM2MEM_DMA = 0x0,
/* mem to prf - DMAC flow ctlr */
DMAC_MEM2PRF_DMA = 0x1,
DMAC_MEM2PRF_DMA = 0x1,
/* prf to mem - DMAC flow ctlr */
DMAC_PRF2MEM_DMA = 0x2,
DMAC_PRF2MEM_DMA = 0x2,
/* prf to prf - DMAC flow ctlr */
DMAC_PRF2PRF_DMA = 0x3,
DMAC_PRF2PRF_DMA = 0x3,
/* prf to mem - periph flow ctlr */
DMAC_PRF2MEM_PRF = 0x4,
DMAC_PRF2MEM_PRF = 0x4,
/* prf to prf - source flow ctlr */
DMAC_PRF2PRF_SRCPRF = 0x5,
/* mem to prf - periph flow ctlr */
DMAC_MEM2PRF_PRF = 0x6,
DMAC_MEM2PRF_PRF = 0x6,
/* prf to prf - dest flow ctlr */
DMAC_PRF2PRF_DSTPRF = 0x7
} dmac_transfer_flow_t;
typedef enum _dmac_burst_trans_length
{
DMAC_MSIZE_1 = 0x0,
DMAC_MSIZE_4 = 0x1,
DMAC_MSIZE_8 = 0x2,
DMAC_MSIZE_16 = 0x3,
DMAC_MSIZE_32 = 0x4,
DMAC_MSIZE_64 = 0x5,
DMAC_MSIZE_1 = 0x0,
DMAC_MSIZE_4 = 0x1,
DMAC_MSIZE_8 = 0x2,
DMAC_MSIZE_16 = 0x3,
DMAC_MSIZE_32 = 0x4,
DMAC_MSIZE_64 = 0x5,
DMAC_MSIZE_128 = 0x6,
DMAC_MSIZE_256 = 0x7
} dmac_burst_trans_length_t;
@ -142,31 +142,31 @@ typedef enum _dmac_burst_trans_length
typedef enum _dmac_address_increment
{
DMAC_ADDR_INCREMENT = 0x0,
DMAC_ADDR_NOCHANGE = 0x1
DMAC_ADDR_NOCHANGE = 0x1
} dmac_address_increment_t;
typedef enum _dmac_transfer_width
{
DMAC_TRANS_WIDTH_8 = 0x0,
DMAC_TRANS_WIDTH_16 = 0x1,
DMAC_TRANS_WIDTH_32 = 0x2,
DMAC_TRANS_WIDTH_64 = 0x3,
DMAC_TRANS_WIDTH_8 = 0x0,
DMAC_TRANS_WIDTH_16 = 0x1,
DMAC_TRANS_WIDTH_32 = 0x2,
DMAC_TRANS_WIDTH_64 = 0x3,
DMAC_TRANS_WIDTH_128 = 0x4,
DMAC_TRANS_WIDTH_256 = 0x5
} dmac_transfer_width_t;
typedef enum _dmac_hs_interface
{
DMAC_HS_IF0 = 0x0,
DMAC_HS_IF1 = 0x1,
DMAC_HS_IF2 = 0x2,
DMAC_HS_IF3 = 0x3,
DMAC_HS_IF4 = 0x4,
DMAC_HS_IF5 = 0x5,
DMAC_HS_IF6 = 0x6,
DMAC_HS_IF7 = 0x7,
DMAC_HS_IF8 = 0x8,
DMAC_HS_IF9 = 0x9,
DMAC_HS_IF0 = 0x0,
DMAC_HS_IF1 = 0x1,
DMAC_HS_IF2 = 0x2,
DMAC_HS_IF3 = 0x3,
DMAC_HS_IF4 = 0x4,
DMAC_HS_IF5 = 0x5,
DMAC_HS_IF6 = 0x6,
DMAC_HS_IF7 = 0x7,
DMAC_HS_IF8 = 0x8,
DMAC_HS_IF9 = 0x9,
DMAC_HS_IF10 = 0xa,
DMAC_HS_IF11 = 0xb,
DMAC_HS_IF12 = 0xc,
@ -177,37 +177,37 @@ typedef enum _dmac_hs_interface
typedef enum _dmac_multiblk_transfer_type
{
CONTIGUOUS = 0,
RELOAD = 1,
CONTIGUOUS = 0,
RELOAD = 1,
SHADOWREGISTER = 2,
LINKEDLIST = 3
LINKEDLIST = 3
} dmac_multiblk_transfer_type_t;
typedef enum _dmac_multiblk_type
{
DMAC_SRC_DST_CONTINUE = 0,
DMAC_SRC_CONTINUE_DST_RELAOD = 2,
DMAC_SRC_CONTINUE_DST_LINKEDLIST = 3,
DMAC_SRC_RELOAD_DST_CONTINUE = 4,
DMAC_SRC_RELOAD_DST_RELOAD = 5,
DMAC_SRC_RELOAD_DST_LINKEDLIST = 6,
DMAC_SRC_LINKEDLIST_DST_CONTINUE = 7,
DMAC_SRC_LINKEDLIST_DST_RELOAD = 8,
DMAC_SRC_DST_CONTINUE = 0,
DMAC_SRC_CONTINUE_DST_RELAOD = 2,
DMAC_SRC_CONTINUE_DST_LINKEDLIST = 3,
DMAC_SRC_RELOAD_DST_CONTINUE = 4,
DMAC_SRC_RELOAD_DST_RELOAD = 5,
DMAC_SRC_RELOAD_DST_LINKEDLIST = 6,
DMAC_SRC_LINKEDLIST_DST_CONTINUE = 7,
DMAC_SRC_LINKEDLIST_DST_RELOAD = 8,
DMAC_SRC_LINKEDLIST_DST_LINKEDLIST = 9,
DMAC_SRC_SHADOWREG_DST_CONTINUE = 10
DMAC_SRC_SHADOWREG_DST_CONTINUE = 10
} dmac_multiblk_type_t;
typedef enum _dmac_transfer_type
{
DMAC_TRANSFER_ROW1 = 0x1,
DMAC_TRANSFER_ROW2 = 0x2,
DMAC_TRANSFER_ROW3 = 0x3,
DMAC_TRANSFER_ROW4 = 0x4,
DMAC_TRANSFER_ROW5 = 0x5,
DMAC_TRANSFER_ROW6 = 0x6,
DMAC_TRANSFER_ROW7 = 0x7,
DMAC_TRANSFER_ROW8 = 0x8,
DMAC_TRANSFER_ROW9 = 0x9,
DMAC_TRANSFER_ROW1 = 0x1,
DMAC_TRANSFER_ROW2 = 0x2,
DMAC_TRANSFER_ROW3 = 0x3,
DMAC_TRANSFER_ROW4 = 0x4,
DMAC_TRANSFER_ROW5 = 0x5,
DMAC_TRANSFER_ROW6 = 0x6,
DMAC_TRANSFER_ROW7 = 0x7,
DMAC_TRANSFER_ROW8 = 0x8,
DMAC_TRANSFER_ROW9 = 0x9,
DMAC_TRANSFER_ROW10 = 0xa
} dmac_transfer_type_t;
@ -215,21 +215,21 @@ typedef enum _dmac_prot_level
{
/* default prot level */
DMAC_NONCACHE_NONBUFF_NONPRIV_OPCODE = 0x0,
DMAC_NONCACHE_NONBUFF_NONPRIV_DATA = 0x1,
DMAC_NONCACHE_NONBUFF_PRIV_OPCODE = 0x2,
DMAC_NONCACHE_NONBUFF_PRIV_DATA = 0x3,
DMAC_NONCACHE_BUFF_NONPRIV_OPCODE = 0x4,
DMAC_NONCACHE_BUFF_NONPRIV_DATA = 0x5,
DMAC_NONCACHE_BUFF_PRIV_OPCODE = 0x6,
DMAC_NONCACHE_BUFF_PRIV_DATA = 0x7,
DMAC_CACHE_NONBUFF_NONPRIV_OPCODE = 0x8,
DMAC_CACHE_NONBUFF_NONPRIV_DATA = 0x9,
DMAC_CACHE_NONBUFF_PRIV_OPCODE = 0xa,
DMAC_CACHE_NONBUFF_PRIV_DATA = 0xb,
DMAC_CACHE_BUFF_NONPRIV_OPCODE = 0xc,
DMAC_CACHE_BUFF_NONPRIV_DATA = 0xd,
DMAC_CACHE_BUFF_PRIV_OPCODE = 0xe,
DMAC_CACHE_BUFF_PRIV_DATA = 0xf
DMAC_NONCACHE_NONBUFF_NONPRIV_DATA = 0x1,
DMAC_NONCACHE_NONBUFF_PRIV_OPCODE = 0x2,
DMAC_NONCACHE_NONBUFF_PRIV_DATA = 0x3,
DMAC_NONCACHE_BUFF_NONPRIV_OPCODE = 0x4,
DMAC_NONCACHE_BUFF_NONPRIV_DATA = 0x5,
DMAC_NONCACHE_BUFF_PRIV_OPCODE = 0x6,
DMAC_NONCACHE_BUFF_PRIV_DATA = 0x7,
DMAC_CACHE_NONBUFF_NONPRIV_OPCODE = 0x8,
DMAC_CACHE_NONBUFF_NONPRIV_DATA = 0x9,
DMAC_CACHE_NONBUFF_PRIV_OPCODE = 0xa,
DMAC_CACHE_NONBUFF_PRIV_DATA = 0xb,
DMAC_CACHE_BUFF_NONPRIV_OPCODE = 0xc,
DMAC_CACHE_BUFF_NONPRIV_DATA = 0xd,
DMAC_CACHE_BUFF_PRIV_OPCODE = 0xe,
DMAC_CACHE_BUFF_PRIV_DATA = 0xf
} dmac_prot_level_t;
typedef enum _dmac_fifo_mode
@ -240,7 +240,7 @@ typedef enum _dmac_fifo_mode
typedef enum _dw_dmac_flow_ctl_mode
{
DMAC_DATA_PREFETCH_ENABLED = 0x0,
DMAC_DATA_PREFETCH_ENABLED = 0x0,
DMAC_DATA_PREFETCH_DISABLED = 0x1
} dw_dmac_flow_ctl_mode_t;
@ -252,9 +252,9 @@ typedef enum _dmac_polarity_level
typedef enum _dmac_lock_level
{
DMAC_LOCK_LEVEL_DMA_TRANSFER = 0x0,
DMAC_LOCK_LEVEL_DMA_TRANSFER = 0x0,
DMAC_LOCK_LEVEL_BLOCK_TRANSFER = 0x1,
DMAC_LOCK_LEVEL_TRANSACTION = 0x2
DMAC_LOCK_LEVEL_TRANSACTION = 0x2
} dmac_lock_level_t;
typedef enum _dmac_channel_priority
@ -277,12 +277,12 @@ typedef enum _dmac_state
typedef enum _dmac_common_int
{
SLVIF_COMMON_DEC_ERR = 0,
SLVIF_COMMON_WR2RO_ERR = 1,
SLVIF_COMMON_RD2WO_ERR = 2,
SLVIF_COMMON_DEC_ERR = 0,
SLVIF_COMMON_WR2RO_ERR = 1,
SLVIF_COMMON_RD2WO_ERR = 2,
SLVIF_COMMON__WRONHOLD_ERR = 3,
SLVIF_UNDEFINED_DEC_ERR = 4,
SLVIF_ALL_INT = 5
SLVIF_UNDEFINED_DEC_ERR = 4,
SLVIF_ALL_INT = 5
} dmac_common_int_t;
typedef struct _dmac_cfg
@ -1372,7 +1372,7 @@ typedef struct _dmac_channel_config
uint8_t cfg_ch_prior;
} dmac_channel_config_t;
#define LIST_ENTRY(ptr, type, member) \
#define LIST_ENTRY(ptr, type, member) \
((type *)((char *)(ptr) - (unsigned long)(&((type *)0)->member)))
struct list_head_t
@ -1472,7 +1472,7 @@ void dmac_wait_idle(dmac_channel_number_t channel_num);
* @param[in] ctx The param of callback
* @param[in] priority Interrupt priority
*/
void dmac_set_irq(dmac_channel_number_t channel_num , plic_irq_callback_t dmac_callback, void *ctx, uint32_t priority);
void dmac_set_irq(dmac_channel_number_t channel_num, plic_irq_callback_t dmac_callback, void *ctx, uint32_t priority);
/**
* @brief Set interrupt param
@ -1482,8 +1482,7 @@ void dmac_set_irq(dmac_channel_number_t channel_num , plic_irq_callback_t dmac_c
* @param[in] ctx The param of callback
* @param[in] priority Interrupt priority
*/
void dmac_irq_register(dmac_channel_number_t channel_num , plic_irq_callback_t dmac_callback, void *ctx, uint32_t priority);
void dmac_irq_register(dmac_channel_number_t channel_num, plic_irq_callback_t dmac_callback, void *ctx, uint32_t priority);
/**
* @brief Unregister dmac interrupt

2
lib/drivers/include/dvp.h
View File

@ -105,7 +105,7 @@ typedef enum _dvp_output_mode
/**
* @brief DVP object instance
*/
extern volatile dvp_t* const dvp;
extern volatile dvp_t *const dvp;
/**
* @brief Initialize DVP

13
lib/drivers/include/fft.h
View File

@ -232,16 +232,15 @@ typedef struct _fft
* @param[out] output The output data
*/
void fft_complex_uint16_dma(dmac_channel_number_t dma_send_channel_num,
dmac_channel_number_t dma_receive_channel_num,
uint16_t shift,
fft_direction_t direction,
const uint64_t *input,
size_t point_num,
uint64_t *output);
dmac_channel_number_t dma_receive_channel_num,
uint16_t shift,
fft_direction_t direction,
const uint64_t *input,
size_t point_num,
uint64_t *output);
#ifdef __cplusplus
}
#endif
#endif /* _DRIVER_FFT_H */

1
lib/drivers/include/fpioa.h
View File

@ -1033,4 +1033,3 @@ int fpioa_set_oe_inv(int number, uint8_t inv_enable);
#endif
#endif /* _DRIVER_FPIOA_H */

3
lib/drivers/include/gpio.h
View File

@ -15,10 +15,10 @@
#ifndef _DRIVER_GPIO_H
#define _DRIVER_GPIO_H
#include "platform.h"
#include <inttypes.h>
#include <stddef.h>
#include "gpio_common.h"
#include "platform.h"
#ifdef __cplusplus
extern "C" {
#endif
@ -165,4 +165,3 @@ void gpio_set_pin(uint8_t pin, gpio_pin_value_t value);
#endif
#endif /* _DRIVER_GPIO_H */

1
lib/drivers/include/gpio_common.h
View File

@ -48,4 +48,3 @@ typedef enum _gpio_pin_value
#endif
#endif /* _GPIO_COMMON_H */

7
lib/drivers/include/gpiohs.h
View File

@ -15,10 +15,10 @@
#ifndef _DRIVER_GPIOHS_H
#define _DRIVER_GPIOHS_H
#include <stdint.h>
#include "platform.h"
#include <stddef.h>
#include <stdint.h>
#include "gpio_common.h"
#include "platform.h"
#include "plic.h"
#ifdef __cplusplus
extern "C" {
@ -240,7 +240,7 @@ void gpiohs_set_pin_edge(uint8_t pin, gpio_pin_edge_t edge);
* @param[in] priority Gpiohs pin interrupt priority
* @param[in] func Gpiohs pin interrupt service routine
*/
void gpiohs_set_irq(uint8_t pin, uint32_t priority, void(*func)());
void gpiohs_set_irq(uint8_t pin, uint32_t priority, void (*func)());
/**
* @brief Set Gpiohs pin interrupt
@ -264,4 +264,3 @@ void gpiohs_irq_unregister(uint8_t pin);
#endif
#endif /* _DRIVER_GPIOHS_H */

10
lib/drivers/include/i2c.h
View File

@ -15,8 +15,8 @@
#ifndef _DRIVER_I2C_H
#define _DRIVER_I2C_H
#include <stdint.h>
#include <stddef.h>
#include <stdint.h>
#include "dmac.h"
#ifdef __cplusplus
@ -349,9 +349,9 @@ typedef enum _i2c_event
typedef struct _i2c_slave_handler
{
void(*on_receive)(uint32_t data);
uint32_t(*on_transmit)();
void(*on_event)(i2c_event_t event);
void (*on_receive)(uint32_t data);
uint32_t (*on_transmit)();
void (*on_event)(i2c_event_t event);
} i2c_slave_handler_t;
typedef enum _i2c_transfer_mode
@ -404,7 +404,7 @@ int i2c_send_data(i2c_device_number_t i2c_num, const uint8_t *send_buf, size_t s
* @param[in] handler Handle of i2c slave interrupt function.
*/
void i2c_init_as_slave(i2c_device_number_t i2c_num, uint32_t slave_address, uint32_t address_width,
const i2c_slave_handler_t *handler);
const i2c_slave_handler_t *handler);
/**
* @brief I2c send data by dma

39
lib/drivers/include/i2s.h
View File

@ -15,21 +15,20 @@
#ifndef _DRIVER_I2S_H
#define _DRIVER_I2S_H
#include <stdint.h>
#include <stddef.h>
#include "platform.h"
#include "io.h"
#include "dmac.h"
#include <stdint.h>
#include "bsp.h"
#include "dmac.h"
#include "io.h"
#include "platform.h"
#ifdef __cplusplus
extern "C" {
#endif
#define I2S0_IN_D0 90
#define I2S0_SCLK 88
#define I2S0_WS 89
#define I2S0_IN_D0 90
#define I2S0_SCLK 88
#define I2S0_WS 89
typedef enum _i2s_device_number
{
@ -136,7 +135,6 @@ typedef enum _fifo_threshold
TRIGGER_LEVEL_16 = 0xf
} i2s_fifo_threshold_t;
typedef struct _i2s_ier
{
/* Bit 0 is ien, 0 for disable i2s and 1 for enable i2s */
@ -336,7 +334,8 @@ typedef struct _i2s_rcr_tcr
uint32_t resv : 29;
} __attribute__((packed, aligned(4))) i2s_rcr_tcr_t;
typedef union _rcr_tcr_u {
typedef union _rcr_tcr_u
{
i2s_rcr_tcr_t rcr_tcr;
uint32_t reg_data;
} rcr_tcr_t;
@ -695,11 +694,11 @@ void i2s_send_data_dma(i2s_device_number_t device_num, const void *buf, size_t b
* @param[in] trigger_level The trigger level
*/
void i2s_rx_channel_config(i2s_device_number_t device_num,
i2s_channel_num_t channel_num,
i2s_word_length_t word_length,
i2s_word_select_cycles_t word_select_size,
i2s_fifo_threshold_t trigger_level,
i2s_work_mode_t word_mode);
i2s_channel_num_t channel_num,
i2s_word_length_t word_length,
i2s_word_select_cycles_t word_select_size,
i2s_fifo_threshold_t trigger_level,
i2s_work_mode_t word_mode);
/**
* @brief I2S transmit channel enable
@ -711,11 +710,11 @@ void i2s_rx_channel_config(i2s_device_number_t device_num,
* @param[in] trigger_level The trigger level
*/
void i2s_tx_channel_config(i2s_device_number_t device_num,
i2s_channel_num_t channel_num,
i2s_word_length_t word_length,
i2s_word_select_cycles_t word_select_size,
i2s_fifo_threshold_t trigger_level,
i2s_work_mode_t word_mode);
i2s_channel_num_t channel_num,
i2s_word_length_t word_length,
i2s_word_select_cycles_t word_select_size,
i2s_fifo_threshold_t trigger_level,
i2s_work_mode_t word_mode);
/**
* @brief Play PCM format audio

24
lib/drivers/include/io.h
View File

@ -26,21 +26,21 @@ extern "C" {
#define readl(addr) (*(volatile uint32_t *)(addr))
#define readq(addr) (*(volatile uint64_t *)(addr))
#define writeb(v, addr) \
{ \
(*(volatile uint8_t *)(addr)) = (v); \
#define writeb(v, addr) \
{ \
(*(volatile uint8_t *)(addr)) = (v); \
}
#define writew(v, addr) \
{ \
(*(volatile uint16_t *)(addr)) = (v); \
#define writew(v, addr) \
{ \
(*(volatile uint16_t *)(addr)) = (v); \
}
#define writel(v, addr) \
{ \
(*(volatile uint32_t *)(addr)) = (v); \
#define writel(v, addr) \
{ \
(*(volatile uint32_t *)(addr)) = (v); \
}
#define writeq(v, addr) \
{ \
(*(volatile uint64_t *)(addr)) = (v); \
#define writeq(v, addr) \
{ \
(*(volatile uint64_t *)(addr)) = (v); \
}
#ifdef __cplusplus

205
lib/drivers/include/kpu.h
View File

@ -15,8 +15,8 @@
#ifndef _KPU_H
#define _KPU_H
#include <stdint.h>
#include <plic.h>
#include <stdint.h>
#include "dmac.h"
#define kpu_matmul_begin kpu_conv2d_output
@ -30,11 +30,11 @@ typedef struct
uint64_t reg;
struct
{
uint64_t int_en:1;
uint64_t ram_flag:1;
uint64_t full_add:1;
uint64_t depth_wise_layer:1;
uint64_t reserved:60;
uint64_t int_en : 1;
uint64_t ram_flag : 1;
uint64_t full_add : 1;
uint64_t depth_wise_layer : 1;
uint64_t reserved : 60;
} data;
} interrupt_enabe;
@ -43,10 +43,10 @@ typedef struct
uint64_t reg;
struct
{
uint64_t image_src_addr:15;
uint64_t reserved0:17;
uint64_t image_dst_addr:15;
uint64_t reserved1:17;
uint64_t image_src_addr : 15;
uint64_t reserved0 : 17;
uint64_t image_dst_addr : 15;
uint64_t reserved1 : 17;
} data;
} image_addr;
@ -55,12 +55,12 @@ typedef struct
uint64_t reg;
struct
{
uint64_t i_ch_num:10;
uint64_t reserved0:22;
uint64_t o_ch_num:10;
uint64_t reserved1:6;
uint64_t o_ch_num_coef:10;
uint64_t reserved2:6;
uint64_t i_ch_num : 10;
uint64_t reserved0 : 22;
uint64_t o_ch_num : 10;
uint64_t reserved1 : 6;
uint64_t o_ch_num_coef : 10;
uint64_t reserved2 : 6;
} data;
} image_channel_num;
@ -69,12 +69,12 @@ typedef struct
uint64_t reg;
struct
{
uint64_t i_row_wid:10;
uint64_t i_col_high:9;
uint64_t reserved0:13;
uint64_t o_row_wid:10;
uint64_t o_col_high:9;
uint64_t reserved1:13;
uint64_t i_row_wid : 10;
uint64_t i_col_high : 9;
uint64_t reserved0 : 13;
uint64_t o_row_wid : 10;
uint64_t o_col_high : 9;
uint64_t reserved1 : 13;
} data;
} image_size;
@ -83,16 +83,16 @@ typedef struct
uint64_t reg;
struct
{
uint64_t kernel_type:3;
uint64_t pad_type:1;
uint64_t pool_type:4;
uint64_t first_stride:1;
uint64_t bypass_conv:1;
uint64_t load_para:1;
uint64_t reserved0:5;
uint64_t dma_burst_size:8;
uint64_t pad_value:8;
uint64_t bwsx_base_addr:32;
uint64_t kernel_type : 3;
uint64_t pad_type : 1;
uint64_t pool_type : 4;
uint64_t first_stride : 1;
uint64_t bypass_conv : 1;
uint64_t load_para : 1;
uint64_t reserved0 : 5;
uint64_t dma_burst_size : 8;
uint64_t pad_value : 8;
uint64_t bwsx_base_addr : 32;
} data;
} kernel_pool_type_cfg;
@ -101,11 +101,11 @@ typedef struct
uint64_t reg;
struct
{
uint64_t load_coor:1;
uint64_t load_time:6;
uint64_t reserved0:8;
uint64_t para_size:17;
uint64_t para_start_addr:32;
uint64_t load_coor : 1;
uint64_t load_time : 6;
uint64_t reserved0 : 8;
uint64_t para_size : 17;
uint64_t para_start_addr : 32;
} data;
} kernel_load_cfg;
@ -114,9 +114,9 @@ typedef struct
uint64_t reg;
struct
{
uint64_t coef_column_offset:4;
uint64_t coef_row_offset:12;
uint64_t reserved0:48;
uint64_t coef_column_offset : 4;
uint64_t coef_row_offset : 12;
uint64_t reserved0 : 48;
} data;
} kernel_offset;
@ -125,13 +125,13 @@ typedef struct
uint64_t reg;
struct
{
uint64_t channel_switch_addr:15;
uint64_t reserved:1;
uint64_t row_switch_addr:4;
uint64_t coef_size:8;
uint64_t coef_group:3;
uint64_t load_act:1;
uint64_t active_addr:32;
uint64_t channel_switch_addr : 15;
uint64_t reserved : 1;
uint64_t row_switch_addr : 4;
uint64_t coef_size : 8;
uint64_t coef_group : 3;
uint64_t load_act : 1;
uint64_t active_addr : 32;
} data;
} kernel_calc_type_cfg;
@ -140,11 +140,11 @@ typedef struct
uint64_t reg;
struct
{
uint64_t wb_channel_switch_addr:15;
uint64_t reserved0:1;
uint64_t wb_row_switch_addr:4;
uint64_t wb_group:3;
uint64_t reserved1:41;
uint64_t wb_channel_switch_addr : 15;
uint64_t reserved0 : 1;
uint64_t wb_row_switch_addr : 4;
uint64_t wb_group : 3;
uint64_t reserved1 : 41;
} data;
} write_back_cfg;
@ -153,11 +153,11 @@ typedef struct
uint64_t reg;
struct
{
uint64_t shr_w:4;
uint64_t shr_x:4;
uint64_t arg_w:24;
uint64_t arg_x:24;
uint64_t reserved0:8;
uint64_t shr_w : 4;
uint64_t shr_x : 4;
uint64_t arg_w : 24;
uint64_t arg_x : 24;
uint64_t reserved0 : 8;
} data;
} conv_value;
@ -166,8 +166,8 @@ typedef struct
uint64_t reg;
struct
{
uint64_t arg_add:40;
uint64_t reserved:24;
uint64_t arg_add : 40;
uint64_t reserved : 24;
} data;
} conv_value2;
@ -176,10 +176,10 @@ typedef struct
uint64_t reg;
struct
{
uint64_t send_data_out:1;
uint64_t reserved:15;
uint64_t channel_byte_num:16;
uint64_t dma_total_byte:32;
uint64_t send_data_out : 1;
uint64_t reserved : 15;
uint64_t channel_byte_num : 16;
uint64_t dma_total_byte : 32;
} data;
} dma_parameter;
} kpu_layer_argument_t;
@ -191,9 +191,9 @@ typedef struct
uint64_t reg;
struct
{
uint64_t shift_number:8;
uint64_t y_mul:16;
uint64_t x_start:36;
uint64_t shift_number : 8;
uint64_t y_mul : 16;
uint64_t x_start : 36;
} data;
} activate_para[16];
@ -223,14 +223,13 @@ typedef struct
uint64_t reg;
struct
{
uint64_t norm_mul:24;
uint64_t norm_add:32;
uint64_t norm_shift:4;
uint64_t norm_mul : 24;
uint64_t norm_add : 32;
uint64_t norm_shift : 4;
} data;
} batchnorm;
} kpu_batchnorm_argument_t;
typedef struct
{
union
@ -245,36 +244,35 @@ typedef struct
typedef struct
{
uint64_t calc_done_int:1;
uint64_t layer_cfg_almost_empty_int:1;
uint64_t layer_cfg_almost_full_int:1;
uint64_t reserved:61;
uint64_t calc_done_int : 1;
uint64_t layer_cfg_almost_empty_int : 1;
uint64_t layer_cfg_almost_full_int : 1;
uint64_t reserved : 61;
} kpu_config_interrupt_t;
typedef struct
{
uint64_t fifo_full_threshold:4;
uint64_t fifo_empty_threshold:4;
uint64_t reserved:56;
uint64_t fifo_full_threshold : 4;
uint64_t fifo_empty_threshold : 4;
uint64_t reserved : 56;
} kpu_config_fifo_threshold_t;
typedef struct
{
uint64_t dma_fifo_flush_n:1;
uint64_t gs_fifo_flush_n:1;
uint64_t cfg_fifo_flush_n:1;
uint64_t cmd_fifo_flush_n:1;
uint64_t resp_fifo_flush_n:1;
uint64_t reserved:59;
uint64_t dma_fifo_flush_n : 1;
uint64_t gs_fifo_flush_n : 1;
uint64_t cfg_fifo_flush_n : 1;
uint64_t cmd_fifo_flush_n : 1;
uint64_t resp_fifo_flush_n : 1;
uint64_t reserved : 59;
} kpu_config_fifo_ctrl_t;
typedef struct
{
uint64_t eight_bit_mode:1;
uint64_t reserved:63;
uint64_t eight_bit_mode : 1;
uint64_t reserved : 63;
} kpu_config_eight_bit_mode_t;
typedef struct
{
volatile uint64_t layer_argument_fifo;
@ -285,41 +283,42 @@ typedef struct
kpu_config_interrupt_t data;
} interrupt_status;
volatile union
volatile union
{
uint64_t reg;
kpu_config_interrupt_t data;
kpu_config_interrupt_t data;
} interrupt_raw;
volatile union {
volatile union
{
uint64_t reg;
kpu_config_interrupt_t data;
kpu_config_interrupt_t data;
} interrupt_mask;
volatile union
volatile union
{
uint64_t reg;
kpu_config_interrupt_t data;
} interrupt_clear;
volatile union
volatile union
{
uint64_t reg;
kpu_config_fifo_threshold_t data;
kpu_config_fifo_threshold_t data;
} fifo_threshold;
volatile uint64_t fifo_data_out;
volatile union
volatile union
{
uint64_t reg;
kpu_config_fifo_ctrl_t data;
kpu_config_fifo_ctrl_t data;
} fifo_ctrl;
volatile union
volatile union
{
uint64_t reg;
kpu_config_eight_bit_mode_t data;
kpu_config_eight_bit_mode_t data;
} eight_bit_mode;
} kpu_config_t;
@ -431,7 +430,7 @@ typedef enum
typedef struct
{
float scale;
float bias;
float bias;
} kpu_model_quant_param_t;
typedef struct
@ -660,7 +659,7 @@ typedef struct
uint32_t channels;
} kpu_model_logistic_layer_argument_t;
typedef void(*kpu_done_callback_t)(void* userdata);
typedef void (*kpu_done_callback_t)(void *userdata);
typedef struct
{
@ -672,7 +671,7 @@ typedef struct
const uint8_t *body_start;
uint32_t layers_length;
volatile uint32_t current_layer;
const uint8_t * volatile current_body;
const uint8_t *volatile current_body;
dmac_channel_number_t dma_ch;
kpu_done_callback_t done_callback;
void *userdata;
@ -704,7 +703,7 @@ extern volatile kpu_config_t *const kpu;
*
* @return Kpu handler
*/
extern kpu_task_t *kpu_task_init(kpu_task_t* task);
extern kpu_task_t *kpu_task_init(kpu_task_t *task);
/**
* @brief Kpu run for AI
@ -719,7 +718,7 @@ extern kpu_task_t *kpu_task_init(kpu_task_t* task);
* - 0 Success
* - Other Fail.Kpu is busy.
*/
int kpu_run(kpu_task_t* task, dmac_channel_number_t dma_ch, const void *src, void* dest, plic_irq_callback_t callback);
int kpu_run(kpu_task_t *task, dmac_channel_number_t dma_ch, const void *src, void *dest, plic_irq_callback_t callback);
/**
* @brief Get kpu result buf
@ -728,7 +727,7 @@ int kpu_run(kpu_task_t* task, dmac_channel_number_t dma_ch, const void *src, voi
*
* @return Kpu result buf
*/
uint8_t *kpu_get_output_buf(kpu_task_t* task);
uint8_t *kpu_get_output_buf(kpu_task_t *task);
/**
* @brief Release kpu output buf

9
lib/drivers/include/plic.h
View File

@ -285,7 +285,7 @@ typedef struct _plic_target_enables
/* 0x0C002000-0x0C1F1F80: target 0-15871 enables */
struct
{
uint32_t enable[32 * 2];/* Offset 0x00-0x7C: Bit 0 is zero, Bits 1-1023 is bits*/
uint32_t enable[32 * 2]; /* Offset 0x00-0x7C: Bit 0 is zero, Bits 1-1023 is bits*/
} target[15872 / 2];
/* 0x0C1F2000-0x0C1FFFFC: Reserved, size 0xE000 */
@ -324,9 +324,10 @@ typedef struct _plic_target_enables
typedef struct _plic_target
{
/* 0x0C200000-0x0FFFF004: target 0-15871 */
struct {
uint32_t priority_threshold;/* Offset 0x000 */
uint32_t claim_complete; /* Offset 0x004 */
struct
{
uint32_t priority_threshold; /* Offset 0x000 */
uint32_t claim_complete; /* Offset 0x004 */
uint8_t resv[0x1FF8]; /* Offset 0x008, Size 0xFF8 */
} target[15872 / 2];
} __attribute__((packed, aligned(4))) plic_target_t;

3
lib/drivers/include/pwm.h
View File

@ -15,8 +15,8 @@
#ifndef _DRIVER_PWM_H
#define _DRIVER_PWM_H
#include <stdint.h>
#include <stddef.h>
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
@ -66,7 +66,6 @@ void pwm_set_enable(pwm_device_number_t pwm_number, pwm_channel_number_t channel
*/
double pwm_set_frequency(pwm_device_number_t pwm_number, pwm_channel_number_t channel, double frequency, double duty);
#ifdef __cplusplus
}
#endif

124
lib/drivers/include/rtc.h
View File

@ -21,11 +21,11 @@
#ifndef _DRIVER_RTC_H
#define _DRIVER_RTC_H
#include <stdint.h>
#include <time.h>
#include <plic.h>
#include <stdbool.h>
#include <stdint.h>
#include <string.h>
#include <time.h>
#include "platform.h"
@ -78,14 +78,14 @@ typedef enum _rtc_tick_interrupt_mode_e
*/
typedef struct _rtc_mask
{
uint32_t resv : 1; /*!< Reserved */
uint32_t resv : 1; /*!< Reserved */
uint32_t second : 1; /*!< Second mask */
uint32_t minute : 1; /*!< Minute mask */
uint32_t hour : 1; /*!< Hour mask */
uint32_t week : 1; /*!< Week mask */
uint32_t day : 1; /*!< Day mask */
uint32_t month : 1; /*!< Month mask */
uint32_t year : 1; /*!< Year mask */
uint32_t hour : 1; /*!< Hour mask */
uint32_t week : 1; /*!< Week mask */
uint32_t day : 1; /*!< Day mask */
uint32_t month : 1; /*!< Month mask */
uint32_t year : 1; /*!< Year mask */
} __attribute__((packed, aligned(1))) rtc_mask_t;
/**
@ -109,7 +109,6 @@ typedef struct _rtc_mask
*
*/
/**
* @brief Timer date information
*
@ -117,12 +116,12 @@ typedef struct _rtc_mask
*/
typedef struct _rtc_date
{
uint32_t week : 3; /*!< Week. Range [0,6]. 0 is Sunday. */
uint32_t resv0 : 5; /*!< Reserved */
uint32_t day : 5; /*!< Day. Range [1,31] or [1,30] or [1,29] or [1,28] */
uint32_t resv1 : 3; /*!< Reserved */
uint32_t month : 4; /*!< Month. Range [1,12] */
uint32_t year : 12; /*!< Year. Range [0,99] */
uint32_t week : 3; /*!< Week. Range [0,6]. 0 is Sunday. */
uint32_t resv0 : 5; /*!< Reserved */
uint32_t day : 5; /*!< Day. Range [1,31] or [1,30] or [1,29] or [1,28] */
uint32_t resv1 : 3; /*!< Reserved */
uint32_t month : 4; /*!< Month. Range [1,12] */
uint32_t year : 12; /*!< Year. Range [0,99] */
} __attribute__((packed, aligned(4))) rtc_date_t;
/**
@ -132,12 +131,12 @@ typedef struct _rtc_date
*/
typedef struct _rtc_time
{
uint32_t resv0 : 10; /*!< Reserved */
uint32_t second : 6; /*!< Second. Range [0,59] */
uint32_t minute : 6; /*!< Minute. Range [0,59] */
uint32_t resv1 : 2; /*!< Reserved */
uint32_t hour : 5; /*!< Hour. Range [0,23] */
uint32_t resv2 : 3; /*!< Reserved */
uint32_t resv0 : 10; /*!< Reserved */
uint32_t second : 6; /*!< Second. Range [0,59] */
uint32_t minute : 6; /*!< Minute. Range [0,59] */
uint32_t resv1 : 2; /*!< Reserved */
uint32_t hour : 5; /*!< Hour. Range [0,23] */
uint32_t resv2 : 3; /*!< Reserved */
} __attribute__((packed, aligned(4))) rtc_time_t;
typedef struct _rtc_date_time
@ -158,12 +157,12 @@ typedef struct _rtc_date_time
*/
typedef struct _rtc_alarm_date
{
uint32_t week : 3; /*!< Alarm Week. Range [0,6]. 0 is Sunday. */
uint32_t resv0 : 5; /*!< Reserved */
uint32_t day : 5; /*!< Alarm Day. Range [1,31] or [1,30] or [1,29] or [1,28] */
uint32_t resv1 : 3; /*!< Reserved */
uint32_t month : 4; /*!< Alarm Month. Range [1,12] */
uint32_t year : 12; /*!< Alarm Year. Range [0,99] */
uint32_t week : 3; /*!< Alarm Week. Range [0,6]. 0 is Sunday. */
uint32_t resv0 : 5; /*!< Reserved */
uint32_t day : 5; /*!< Alarm Day. Range [1,31] or [1,30] or [1,29] or [1,28] */
uint32_t resv1 : 3; /*!< Reserved */
uint32_t month : 4; /*!< Alarm Month. Range [1,12] */
uint32_t year : 12; /*!< Alarm Year. Range [0,99] */
} __attribute__((packed, aligned(4))) rtc_alarm_date_t;
/**
@ -173,12 +172,12 @@ typedef struct _rtc_alarm_date
*/
typedef struct _rtc_alarm_time
{
uint32_t resv0 : 10; /*!< Reserved */
uint32_t second : 6; /*!< Alarm Second. Range [0,59] */
uint32_t minute : 6; /*!< Alarm Minute. Range [0,59] */
uint32_t resv1 : 2; /*!< Reserved */
uint32_t hour : 5; /*!< Alarm Hour. Range [0,23] */
uint32_t resv2 : 3; /*!< Reserved */
uint32_t resv0 : 10; /*!< Reserved */
uint32_t second : 6; /*!< Alarm Second. Range [0,59] */
uint32_t minute : 6; /*!< Alarm Minute. Range [0,59] */
uint32_t resv1 : 2; /*!< Reserved */
uint32_t hour : 5; /*!< Alarm Hour. Range [0,23] */
uint32_t resv2 : 3; /*!< Reserved */
} __attribute__((packed, aligned(4))) rtc_alarm_time_t;
/**
@ -208,11 +207,11 @@ typedef struct _rtc_current_count
*/
typedef struct _rtc_interrupt_ctrl
{
uint32_t tick_enable : 1; /*!< Reserved */
uint32_t alarm_enable : 1; /*!< Alarm interrupt enable */
uint32_t tick_int_mode : 2; /*!< Tick interrupt enable */
uint32_t resv : 20; /*!< Reserved */
uint32_t alarm_compare_mask : 8; /*!< Alarm compare mask for interrupt */
uint32_t tick_enable : 1; /*!< Reserved */
uint32_t alarm_enable : 1; /*!< Alarm interrupt enable */
uint32_t tick_int_mode : 2; /*!< Tick interrupt enable */
uint32_t resv : 20; /*!< Reserved */
uint32_t alarm_compare_mask : 8; /*!< Alarm compare mask for interrupt */
} __attribute__((packed, aligned(4))) rtc_interrupt_ctrl_t;
/**
@ -222,14 +221,14 @@ typedef struct _rtc_interrupt_ctrl
*/
typedef struct _rtc_register_ctrl
{
uint32_t read_enable : 1; /*!< RTC timer read enable */
uint32_t write_enable : 1; /*!< RTC timer write enable */
uint32_t resv0 : 11; /*!< Reserved */
uint32_t timer_mask : 8; /*!< RTC timer mask */
uint32_t alarm_mask : 8; /*!< RTC alarm mask */
uint32_t initial_count_mask : 1; /*!< RTC counter initial count value mask */
uint32_t interrupt_register_mask : 1; /*!< RTC interrupt register mask */
uint32_t resv1 : 1; /*!< Reserved */
uint32_t read_enable : 1; /*!< RTC timer read enable */
uint32_t write_enable : 1; /*!< RTC timer write enable */
uint32_t resv0 : 11; /*!< Reserved */
uint32_t timer_mask : 8; /*!< RTC timer mask */
uint32_t alarm_mask : 8; /*!< RTC alarm mask */
uint32_t initial_count_mask : 1; /*!< RTC counter initial count value mask */
uint32_t interrupt_register_mask : 1; /*!< RTC interrupt register mask */
uint32_t resv1 : 1; /*!< Reserved */
} __attribute__((packed, aligned(4))) rtc_register_ctrl_t;
/**
@ -239,7 +238,7 @@ typedef struct _rtc_register_ctrl
*/
typedef struct _rtc_reserved0
{
uint32_t resv : 32; /*!< Reserved */
uint32_t resv : 32; /*!< Reserved */
} __attribute__((packed, aligned(4))) rtc_reserved0_t;
/**
@ -249,7 +248,7 @@ typedef struct _rtc_reserved0
*/
typedef struct _rtc_reserved1
{
uint32_t resv : 32; /*!< Reserved */
uint32_t resv : 32; /*!< Reserved */
} __attribute__((packed, aligned(4))) rtc_reserved1_t;
/**
@ -259,12 +258,12 @@ typedef struct _rtc_reserved1
*/
typedef struct _rtc_extended
{
uint32_t century : 5; /*!< Century. Range [0,31] */
uint32_t century : 5; /*!< Century. Range [0,31] */
uint32_t leap_year : 1; /*!< Is leap year. 1 is leap year, 0 is not leap year */
uint32_t resv : 26; /*!< Reserved */;
uint32_t resv : 26; /*!< Reserved */
;
} __attribute__((packed, aligned(4))) rtc_extended_t;
/**
* @brief Real-time clock struct
*
@ -273,20 +272,19 @@ typedef struct _rtc_extended
*/
typedef struct _rtc
{
rtc_date_t date; /*!< No. 0 (0x00): Timer date information */
rtc_time_t time; /*!< No. 1 (0x04): Timer time information */
rtc_alarm_date_t alarm_date; /*!< No. 2 (0x08): Alarm date information */
rtc_alarm_time_t alarm_time; /*!< No. 3 (0x0c): Alarm time information */
rtc_initial_count_t initial_count; /*!< No. 4 (0x10): Timer counter initial value */
rtc_current_count_t current_count; /*!< No. 5 (0x14): Timer counter current value */
rtc_interrupt_ctrl_t interrupt_ctrl; /*!< No. 6 (0x18): RTC interrupt settings */
rtc_register_ctrl_t register_ctrl; /*!< No. 7 (0x1c): RTC register settings */
rtc_reserved0_t reserved0; /*!< No. 8 (0x20): Reserved */
rtc_reserved1_t reserved1; /*!< No. 9 (0x24): Reserved */
rtc_extended_t extended; /*!< No. 10 (0x28): Timer extended information */
rtc_date_t date; /*!< No. 0 (0x00): Timer date information */
rtc_time_t time; /*!< No. 1 (0x04): Timer time information */
rtc_alarm_date_t alarm_date; /*!< No. 2 (0x08): Alarm date information */
rtc_alarm_time_t alarm_time; /*!< No. 3 (0x0c): Alarm time information */
rtc_initial_count_t initial_count; /*!< No. 4 (0x10): Timer counter initial value */
rtc_current_count_t current_count; /*!< No. 5 (0x14): Timer counter current value */
rtc_interrupt_ctrl_t interrupt_ctrl; /*!< No. 6 (0x18): RTC interrupt settings */
rtc_register_ctrl_t register_ctrl; /*!< No. 7 (0x1c): RTC register settings */
rtc_reserved0_t reserved0; /*!< No. 8 (0x20): Reserved */
rtc_reserved1_t reserved1; /*!< No. 9 (0x24): Reserved */
rtc_extended_t extended; /*!< No. 10 (0x28): Timer extended information */
} __attribute__((packed, aligned(4))) rtc_t;
/**
* @brief Real-time clock object
*/

13
lib/drivers/include/sha256.h
View File

@ -14,19 +14,19 @@
*/
#ifndef _SHA256_H
#define _SHA256_H
#include <stdint.h>
#include <stddef.h>
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
#define ENABLE_SHA (0x1)
#define SHA256_BIG_ENDIAN (0x1)
#define ENABLE_SHA (0x1)
#define SHA256_BIG_ENDIAN (0x1)
#define SHA256_HASH_LEN 32
#define SHA256_HASH_WORDS 8
#define SHA256_BLOCK_LEN 64L
#define SHA256_HASH_LEN 32
#define SHA256_HASH_WORDS 8
#define SHA256_BLOCK_LEN 64L
typedef struct _sha_num_reg
{
@ -125,4 +125,3 @@ void sha256_hard_calculate(const uint8_t *input, size_t input_len, uint8_t *outp
#endif
#endif

13
lib/drivers/include/spi.h
View File

@ -15,8 +15,8 @@
#ifndef _DRIVER_SPI_H
#define _DRIVER_SPI_H
#include <stdint.h>
#include <stddef.h>
#include <stdint.h>
#include "dmac.h"
#ifdef __cplusplus
@ -140,12 +140,11 @@ typedef enum _spi_transfer_mode
SPI_TMOD_EEROM
} spi_transfer_mode_t;
typedef enum _spi_transfer_width
{
SPI_TRANS_CHAR = 0x1,
SPI_TRANS_CHAR = 0x1,
SPI_TRANS_SHORT = 0x2,
SPI_TRANS_INT = 0x4,
SPI_TRANS_INT = 0x4,
} spi_transfer_width_t;
typedef enum _spi_chip_select
@ -447,9 +446,9 @@ uint32_t spi_set_clk_rate(spi_device_num_t spi_num, uint32_t spi_clk);
*
*/
void spi_dup_send_receive_data_dma(dmac_channel_number_t dma_send_channel_num,
dmac_channel_number_t dma_receive_channel_num,
spi_device_num_t spi_num, spi_chip_select_t chip_select,
const uint8_t *tx_buf, size_t tx_len, uint8_t *rx_buf, size_t rx_len);
dmac_channel_number_t dma_receive_channel_num,
spi_device_num_t spi_num, spi_chip_select_t chip_select,
const uint8_t *tx_buf, size_t tx_len, uint8_t *rx_buf, size_t rx_len);
/**
* @brief Set spi slave configuration

2
lib/drivers/include/sysctl.h
View File

@ -658,7 +658,7 @@ typedef struct _sysctl_misc
{
uint32_t debug_sel : 6;
uint32_t reserved0 : 4;
uint32_t spi_dvp_data_enable: 1;
uint32_t spi_dvp_data_enable : 1;
uint32_t reserved1 : 21;
} __attribute__((packed, aligned(4))) sysctl_misc_t;

4
lib/drivers/include/timer.h
View File

@ -15,8 +15,8 @@
#ifndef _DRIVER_TIMER_H
#define _DRIVER_TIMER_H
#include <stdint.h>
#include <stddef.h>
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
@ -114,7 +114,7 @@ void timer_init(timer_device_number_t timer_number);
* @param[in] priority interrupt priority
*
*/
void timer_set_irq(timer_device_number_t timer_number, timer_channel_number_t channel, void(*func)(), uint32_t priority);
void timer_set_irq(timer_device_number_t timer_number, timer_channel_number_t channel, void (*func)(), uint32_t priority);
/**
* @brief Register timer interrupt user callback function

5
lib/drivers/include/uart.h
View File

@ -38,9 +38,9 @@
#define _DRIVER_APBUART_H
#include <stdint.h>
#include "dmac.h"
#include "platform.h"
#include "plic.h"
#include "dmac.h"
#ifdef __cplusplus
extern "C" {
@ -363,7 +363,6 @@ void uart_send_data_dma(uart_device_number_t uart_channel, dmac_channel_number_t
*/
void uart_receive_data_dma(uart_device_number_t uart_channel, dmac_channel_number_t dmac_channel, uint8_t *buffer, size_t buf_len);
/**
* @brief Send data by dma
*
@ -404,7 +403,7 @@ void uart_receive_data_dma_irq(uart_device_number_t uart_channel, dmac_channel_n
* @param[in] buffer Uart DMA callback
*
*/
void uart_handle_data_dma(uart_device_number_t uart_channel ,uart_data_t data, plic_interrupt_t *cb);
void uart_handle_data_dma(uart_device_number_t uart_channel, uart_data_t data, plic_interrupt_t *cb);
/**
* @brief Set uart work mode

27
lib/drivers/include/utils.h
View File

@ -69,7 +69,7 @@ extern "C" {
* @param[in] src 8 bit data byte to write to memory
*/
#define kendryte_write_byte(dest, src) \
(*KENDRYTE_CAST(volatile uint8_t*, (dest)) = (src))
(*KENDRYTE_CAST(volatile uint8_t *, (dest)) = (src))
/**
* @brief Read and return the 8 bit byte from the source address in device memory.
@ -78,7 +78,7 @@ extern "C" {
*
* @return 8 bit data byte value
*/
#define kendryte_read_byte(src) (*KENDRYTE_CAST(volatile uint8_t*, (src)))
#define kendryte_read_byte(src) (*KENDRYTE_CAST(volatile uint8_t *, (src)))
/**
* @brief Write the 16 bit half word to the destination address in device memory.
@ -87,7 +87,7 @@ extern "C" {
* @param[in] src 16 bit data half word to write to memory
*/
#define kendryte_write_hword(dest, src) \
(*KENDRYTE_CAST(volatile uint16_t*, (dest)) = (src))
(*KENDRYTE_CAST(volatile uint16_t *, (dest)) = (src))
/**
* @brief Read and return the 16 bit half word from the source address in device
@ -96,7 +96,7 @@ extern "C" {
*
* @return 16 bit data half word value
*/
#define kendryte_read_hword(src) (*KENDRYTE_CAST(volatile uint16_t*, (src)))
#define kendryte_read_hword(src) (*KENDRYTE_CAST(volatile uint16_t *, (src)))
/**
* @brief Write the 32 bit word to the destination address in device memory.
@ -105,7 +105,7 @@ extern "C" {
* @param[in] src 32 bit data word to write to memory
*/
#define kendryte_write_word(dest, src) \
(*KENDRYTE_CAST(volatile uint32_t*, (dest)) = (src))
(*KENDRYTE_CAST(volatile uint32_t *, (dest)) = (src))
/**
* @brief Read and return the 32 bit word from the source address in device memory.
@ -114,7 +114,7 @@ extern "C" {
*
* @return 32 bit data half word value
*/
#define kendryte_read_word(src) (*KENDRYTE_CAST(volatile uint32_t*, (src)))
#define kendryte_read_word(src) (*KENDRYTE_CAST(volatile uint32_t *, (src)))
/**
* @brief Write the 64 bit double word to the destination address in device memory.
@ -123,7 +123,7 @@ extern "C" {
* @param[in] src 64 bit data word to write to memory
*/
#define kendryte_write_dword(dest, src) \
(*KENDRYTE_CAST(volatile uint64_t*, (dest)) = (src))
(*KENDRYTE_CAST(volatile uint64_t *, (dest)) = (src))
/**
* @brief Read and return the 64 bit double word from the source address in device
@ -132,7 +132,7 @@ extern "C" {
*
* @return 64 bit data half word value
*/
#define kendryte_read_dword(src) (*KENDRYTE_CAST(volatile uint64_t*, (src)))
#define kendryte_read_dword(src) (*KENDRYTE_CAST(volatile uint64_t *, (src)))
/**
* @brief Set selected bits in the 8 bit byte at the destination address in device
@ -282,12 +282,12 @@ extern "C" {
#define kendryte_replbits_dword(dest, msk, src) \
(kendryte_write_dword(dest, (kendryte_read_dword(dest) & ~(msk)) | ((src) & (msk))))
#define configASSERT(x) \
if ((x) == 0) \
{ \
#define configASSERT(x) \
if((x) == 0) \
{ \
printf("(%s:%d) %s\r\n", __FILE__, __LINE__, #x); \
for (;;) \
; \
for(;;) \
; \
}
/**
@ -344,4 +344,3 @@ uint32_t get_gpio_bit(volatile uint32_t *bits, size_t offset);
}
#endif /* __cplusplus */
#endif /* _DRIVER_COMMON_H */

4
lib/drivers/include/wdt.h
View File

@ -15,9 +15,9 @@
#ifndef _DRIVER_WDT_H
#define _DRIVER_WDT_H
#include <stdint.h>
#include <stddef.h>
#include <plic.h>
#include <stddef.h>
#include <stdint.h>
#ifdef __cplusplus
extern "C" {

632
lib/drivers/kpu.c
View File

File diff suppressed because it is too large Load Diff

22
lib/drivers/plic.c
View File

@ -19,7 +19,7 @@
#include "syscalls.h"
#include "syslog.h"
volatile plic_t* const plic = (volatile plic_t*)PLIC_BASE_ADDR;
volatile plic_t *const plic = (volatile plic_t *)PLIC_BASE_ADDR;
static plic_instance_t plic_instance[PLIC_NUM_CORES][IRQN_MAX];
@ -31,14 +31,14 @@ void plic_init(void)
unsigned long core_id = current_coreid();
/* Disable all interrupts for the current core. */
for (i = 0; i < ((PLIC_NUM_SOURCES + 32u) / 32u); i++)
for(i = 0; i < ((PLIC_NUM_SOURCES + 32u) / 32u); i++)
plic->target_enables.target[core_id].enable[i] = 0;
static uint8_t s_plic_priorities_init_flag = 0;
/* Set priorities to zero. */
if(s_plic_priorities_init_flag == 0)
{
for (i = 0; i < PLIC_NUM_SOURCES; i++)
for(i = 0; i < PLIC_NUM_SOURCES; i++)
plic->source_priorities.priority[i] = 0;
s_plic_priorities_init_flag = 1;
}
@ -47,7 +47,7 @@ void plic_init(void)
plic->targets.target[core_id].priority_threshold = 0;
/* Clear PLIC instance for every cores */
for (i = 0; i < IRQN_MAX; i++)
for(i = 0; i < IRQN_MAX; i++)
{
/* clang-format off */
plic_instance[core_id][i] = (const plic_instance_t){
@ -63,7 +63,7 @@ void plic_init(void)
* at any time, even if the EIP is not set.
*/
i = 0;
while (plic->targets.target[core_id].claim_complete > 0 && i < 100)
while(plic->targets.target[core_id].claim_complete > 0 && i < 100)
{
/* This loop will clear pending bit on the interrupt source */
i++;
@ -76,7 +76,7 @@ void plic_init(void)
int plic_irq_enable(plic_irq_t irq_number)
{
/* Check parameters */
if (PLIC_NUM_SOURCES < irq_number || 0 > irq_number)
if(PLIC_NUM_SOURCES < irq_number || 0 > irq_number)
return -1;
unsigned long core_id = current_coreid();
/* Get current enable bit array by IRQ number */
@ -91,7 +91,7 @@ int plic_irq_enable(plic_irq_t irq_number)
int plic_irq_disable(plic_irq_t irq_number)
{
/* Check parameters */
if (PLIC_NUM_SOURCES < irq_number || 0 > irq_number)
if(PLIC_NUM_SOURCES < irq_number || 0 > irq_number)
return -1;
unsigned long core_id = current_coreid();
/* Get current enable bit array by IRQ number */
@ -106,7 +106,7 @@ int plic_irq_disable(plic_irq_t irq_number)
int plic_set_priority(plic_irq_t irq_number, uint32_t priority)
{
/* Check parameters */
if (PLIC_NUM_SOURCES < irq_number || 0 > irq_number)
if(PLIC_NUM_SOURCES < irq_number || 0 > irq_number)
return -1;
/* Set interrupt priority by IRQ number */
plic->source_priorities.priority[irq_number] = priority;
@ -116,7 +116,7 @@ int plic_set_priority(plic_irq_t irq_number, uint32_t priority)
uint32_t plic_get_priority(plic_irq_t irq_number)
{
/* Check parameters */
if (PLIC_NUM_SOURCES < irq_number || 0 > irq_number)
if(PLIC_NUM_SOURCES < irq_number || 0 > irq_number)
return 0;
/* Get interrupt priority by IRQ number */
return plic->source_priorities.priority[irq_number];
@ -174,7 +174,7 @@ handle_irq_m_ext(uintptr_t cause, uintptr_t epc)
* without first restoring the interrupted context and taking another
* interrupt trap.
*/
if (read_csr(mip) & MIP_MEIP)
if(read_csr(mip) & MIP_MEIP)
{
/* Get current core id */
uint64_t core_id = current_coreid();
@ -190,7 +190,7 @@ handle_irq_m_ext(uintptr_t cause, uintptr_t epc)
clear_csr(mie, MIP_MTIP | MIP_MSIP);
/* Enable global interrupt */
set_csr(mstatus, MSTATUS_MIE);
if (plic_instance[core_id][int_num].callback)
if(plic_instance[core_id][int_num].callback)
plic_instance[core_id][int_num].callback(
plic_instance[core_id][int_num].ctx);
/* Perform IRQ complete */

18
lib/drivers/pwm.c
View File

@ -12,13 +12,13 @@
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "timer.h"
#include <stddef.h>
#include "io.h"
#include "plic.h"
#include "pwm.h"
#include "sysctl.h"
#include <stddef.h>
#include "timer.h"
#include "utils.h"
#include "plic.h"
#include "io.h"
void pwm_init(pwm_device_number_t pwm_number)
{
@ -27,15 +27,14 @@ void pwm_init(pwm_device_number_t pwm_number)
void pwm_set_enable(pwm_device_number_t pwm_number, pwm_channel_number_t channel, int enable)
{
if (enable)
if(enable)
{
if (timer[pwm_number]->channel[channel].load_count == 0)
if(timer[pwm_number]->channel[channel].load_count == 0)
timer[pwm_number]->channel[channel].load_count = 1;
if (timer[pwm_number]->load_count2[channel] == 0)
if(timer[pwm_number]->load_count2[channel] == 0)
timer[pwm_number]->load_count2[channel] = 1;
timer[pwm_number]->channel[channel].control = TIMER_CR_INTERRUPT_MASK | TIMER_CR_PWM_ENABLE | TIMER_CR_USER_MODE | TIMER_CR_ENABLE;
}
else
} else
{
timer[pwm_number]->channel[channel].control = TIMER_CR_INTERRUPT_MASK;
}
@ -55,4 +54,3 @@ double pwm_set_frequency(pwm_device_number_t pwm_number, pwm_channel_number_t ch
return frequency;
}

206
lib/drivers/rtc.c
View File

@ -13,12 +13,12 @@
* limitations under the License.
*/
#include <stdint.h>
#include <time.h>
#include <stdlib.h>
#include <time.h>
#include "encoding.h"
#include "sysctl.h"
#include "rtc.h"
#include "printf.h"
#include "rtc.h"
#include "sysctl.h"
volatile rtc_t *const rtc = (volatile rtc_t *)RTC_BASE_ADDR;
@ -40,8 +40,7 @@ typedef struct _rtc_instance_t
rtc_tick_interrupt_mode_t tick_mode_by_alarm;
} rtc_instance_t;
rtc_instance_t rtc_instance = (rtc_instance_t)
{
rtc_instance_t rtc_instance = (rtc_instance_t){
.tick_mode_by_user = -1,
.tick_mode_by_alarm = RTC_INT_MAX,
};
@ -50,23 +49,24 @@ int rtc_timer_set_mode(rtc_timer_mode_t timer_mode)
{
rtc_register_ctrl_t register_ctrl = rtc->register_ctrl;
switch (timer_mode) {
case RTC_TIMER_PAUSE:
register_ctrl.read_enable = 0;
register_ctrl.write_enable = 0;
break;
case RTC_TIMER_RUNNING:
register_ctrl.read_enable = 1;
register_ctrl.write_enable = 0;
break;
case RTC_TIMER_SETTING:
register_ctrl.read_enable = 0;
register_ctrl.write_enable = 1;
break;
default:
register_ctrl.read_enable = 0;
register_ctrl.write_enable = 0;
break;
switch(timer_mode)
{
case RTC_TIMER_PAUSE:
register_ctrl.read_enable = 0;
register_ctrl.write_enable = 0;
break;
case RTC_TIMER_RUNNING:
register_ctrl.read_enable = 1;
register_ctrl.write_enable = 0;
break;
case RTC_TIMER_SETTING:
register_ctrl.read_enable = 0;
register_ctrl.write_enable = 1;
break;
default:
register_ctrl.read_enable = 0;
register_ctrl.write_enable = 0;
break;
}
/* Get CPU current freq */
@ -76,7 +76,7 @@ int rtc_timer_set_mode(rtc_timer_mode_t timer_mode)
/* Get current CPU cycle */
unsigned long start_cycle = read_csr(mcycle);
/* Wait for 1/26000000 s to sync data */
while (read_csr(mcycle) - start_cycle < freq)
while(read_csr(mcycle) - start_cycle < freq)
continue;
rtc->register_ctrl = register_ctrl;
@ -89,16 +89,20 @@ rtc_timer_mode_t rtc_timer_get_mode(void)
rtc_register_ctrl_t register_ctrl = rtc->register_ctrl;
rtc_timer_mode_t timer_mode = RTC_TIMER_PAUSE;
if ((!register_ctrl.read_enable) && (!register_ctrl.write_enable)) {
if((!register_ctrl.read_enable) && (!register_ctrl.write_enable))
{
/* RTC_TIMER_PAUSE */
timer_mode = RTC_TIMER_PAUSE;
} else if ((register_ctrl.read_enable) && (!register_ctrl.write_enable)) {
} else if((register_ctrl.read_enable) && (!register_ctrl.write_enable))
{
/* RTC_TIMER_RUNNING */
timer_mode = RTC_TIMER_RUNNING;
} else if ((!register_ctrl.read_enable) && (register_ctrl.write_enable)) {
} else if((!register_ctrl.read_enable) && (register_ctrl.write_enable))
{
/* RTC_TIMER_SETTING */
timer_mode = RTC_TIMER_RUNNING;
} else {
} else
{
/* Something is error, reset timer mode */
rtc_timer_set_mode(timer_mode);
}
@ -117,7 +121,8 @@ int rtc_timer_set_tm(const struct tm *tm)
rtc_time_t timer_time;
rtc_extended_t timer_extended;
if (tm) {
if(tm)
{
/*
* Range of tm->tm_sec could be [0,61]
*
@ -125,25 +130,25 @@ int rtc_timer_set_tm(const struct tm *tm)
* leap seconds in the same minute are not allowed (the C90
* range 0..61 was a defect)
*/
if (rtc_in_range(tm->tm_sec, 0, 59))
if(rtc_in_range(tm->tm_sec, 0, 59))
timer_time.second = tm->tm_sec;
else
return -1;
/* Range of tm->tm_min could be [0,59] */
if (rtc_in_range(tm->tm_min, 0, 59))
if(rtc_in_range(tm->tm_min, 0, 59))
timer_time.minute = tm->tm_min;
else
return -1;
/* Range of tm->tm_hour could be [0, 23] */
if (rtc_in_range(tm->tm_hour, 0, 23))
if(rtc_in_range(tm->tm_hour, 0, 23))
timer_time.hour = tm->tm_hour;
else
return -1;
/* Range of tm->tm_mday could be [1, 31] */
if (rtc_in_range(tm->tm_mday, 1, 31))
if(rtc_in_range(tm->tm_mday, 1, 31))
timer_date.day = tm->tm_mday;
else
return -1;
@ -152,7 +157,7 @@ int rtc_timer_set_tm(const struct tm *tm)
* Range of tm->tm_mon could be [0, 11]
* But in this RTC, date.month should be [1, 12]
*/
if (rtc_in_range(tm->tm_mon, 0, 11))
if(rtc_in_range(tm->tm_mon, 0, 11))
timer_date.month = tm->tm_mon + 1;
else
return -1;
@ -166,15 +171,16 @@ int rtc_timer_set_tm(const struct tm *tm)
int rtc_year = human_year % 100;
int rtc_century = human_year / 100;
if (rtc_in_range(rtc_year, 0, 99) &&
rtc_in_range(rtc_century, 0, 31)) {
if(rtc_in_range(rtc_year, 0, 99) &&
rtc_in_range(rtc_century, 0, 31))
{
timer_date.year = rtc_year;
timer_extended.century = rtc_century;
} else
return -1;
/* Range of tm->tm_wday could be [0, 6] */
if (rtc_in_range(tm->tm_wday, 0, 6))
if(rtc_in_range(tm->tm_wday, 0, 6))
timer_date.week = tm->tm_wday;
else
return -1;
@ -197,7 +203,8 @@ int rtc_alarm_set_tm(const struct tm *tm)
rtc_alarm_date_t alarm_date;
rtc_alarm_time_t alarm_time;
if (tm) {
if(tm)
{
/*
* Range of tm->tm_sec could be [0,61]
*
@ -205,25 +212,25 @@ int rtc_alarm_set_tm(const struct tm *tm)
* leap seconds in the same minute are not allowed (the C90
* range 0..61 was a defect)
*/
if (rtc_in_range(tm->tm_sec, 0, 59))
if(rtc_in_range(tm->tm_sec, 0, 59))
alarm_time.second = tm->tm_sec;
else
return -1;
/* Range of tm->tm_min could be [0,59] */
if (rtc_in_range(tm->tm_min, 0, 59))
if(rtc_in_range(tm->tm_min, 0, 59))
alarm_time.minute = tm->tm_min;
else
return -1;
/* Range of tm->tm_hour could be [0, 23] */
if (rtc_in_range(tm->tm_hour, 0, 23))
if(rtc_in_range(tm->tm_hour, 0, 23))
alarm_time.hour = tm->tm_hour;
else
return -1;
/* Range of tm->tm_mday could be [1, 31] */
if (rtc_in_range(tm->tm_mday, 1, 31))
if(rtc_in_range(tm->tm_mday, 1, 31))
alarm_date.day = tm->tm_mday;
else
return -1;
@ -232,7 +239,7 @@ int rtc_alarm_set_tm(const struct tm *tm)
* Range of tm->tm_mon could be [0, 11]
* But in this RTC, date.month should be [1, 12]
*/
if (rtc_in_range(tm->tm_mon, 0, 11))
if(rtc_in_range(tm->tm_mon, 0, 11))
alarm_date.month = tm->tm_mon + 1;
else
return -1;
@ -246,14 +253,15 @@ int rtc_alarm_set_tm(const struct tm *tm)
int rtc_year = human_year % 100;
int rtc_century = human_year / 100;
if (rtc_in_range(rtc_year, 0, 99) &&
rtc_in_range(rtc_century, 0, 31)) {
if(rtc_in_range(rtc_year, 0, 99) &&
rtc_in_range(rtc_century, 0, 31))
{
alarm_date.year = rtc_year;
} else
return -1;
/* Range of tm->tm_wday could be [0, 6] */
if (rtc_in_range(tm->tm_wday, 0, 6))
if(rtc_in_range(tm->tm_wday, 0, 6))
alarm_date.week = tm->tm_wday;
else
return -1;
@ -279,8 +287,7 @@ int rtc_get_yday(int year, int month, int day)
{
static const int days[2][13] = {
{0, 0, 31, 59, 90, 120, 151, 181, 212, 243, 273, 304, 334},
{0, 0, 31, 60, 91, 121, 152, 182, 213, 244, 274, 305, 335}
};
{0, 0, 31, 60, 91, 121, 152, 182, 213, 244, 274, 305, 335}};
int leap = rtc_year_is_leap(year);
return days[leap][month] + day;
@ -289,13 +296,13 @@ int rtc_get_yday(int year, int month, int day)
int rtc_get_wday(int year, int month, int day)
{
/* Magic method to get weekday */
int weekday = (day += month < 3 ? year-- : year - 2, 23 * month / 9 + day + 4 + year / 4 - year / 100 + year / 400) % 7;
int weekday = (day += month < 3 ? year-- : year - 2, 23 * month / 9 + day + 4 + year / 4 - year / 100 + year / 400) % 7;
return weekday;
}
struct tm *rtc_timer_get_tm(void)
{
if (rtc_timer_get_mode() != RTC_TIMER_RUNNING)
if(rtc_timer_get_mode() != RTC_TIMER_RUNNING)
return NULL;
rtc_date_t timer_date = rtc->date;
@ -304,13 +311,13 @@ struct tm *rtc_timer_get_tm(void)
struct tm *tm = &rtc_timer_date_time;
tm->tm_sec = timer_time.second % 61; /* 0-60, follow C99 */
tm->tm_min = timer_time.minute % 60; /* 0-59 */
tm->tm_hour = timer_time.hour % 24; /* 0-23 */
tm->tm_mday = timer_date.day % 32; /* 1-31 */
tm->tm_sec = timer_time.second % 61; /* 0-60, follow C99 */
tm->tm_min = timer_time.minute % 60; /* 0-59 */
tm->tm_hour = timer_time.hour % 24; /* 0-23 */
tm->tm_mday = timer_date.day % 32; /* 1-31 */
tm->tm_mon = (timer_date.month - 1) % 12; /* 0-11 */
tm->tm_year = (timer_date.year % 100) + (timer_extended.century * 100) - 1900;
tm->tm_wday = timer_date.week % 7; /* 0-6 */
tm->tm_wday = timer_date.week % 7; /* 0-6 */
tm->tm_yday = rtc_get_yday(tm->tm_year + 1900, tm->tm_mon + 1, tm->tm_mday) % 366; /* 0-365 */
tm->tm_isdst = -1;
@ -319,7 +326,7 @@ struct tm *rtc_timer_get_tm(void)
struct tm *rtc_alarm_get_tm(void)
{
if (rtc_timer_get_mode() != RTC_TIMER_RUNNING)
if(rtc_timer_get_mode() != RTC_TIMER_RUNNING)
return NULL;
rtc_alarm_date_t alarm_date = rtc->alarm_date;
@ -328,13 +335,13 @@ struct tm *rtc_alarm_get_tm(void)
struct tm *tm = &rtc_alarm_date_time;
tm->tm_sec = alarm_time.second % 61; /* 0-60, follow C99 */
tm->tm_min = alarm_time.minute % 60; /* 0-59 */
tm->tm_hour = alarm_time.hour % 24; /* 0-23 */
tm->tm_mday = alarm_date.day % 32; /* 1-31 */
tm->tm_sec = alarm_time.second % 61; /* 0-60, follow C99 */
tm->tm_min = alarm_time.minute % 60; /* 0-59 */
tm->tm_hour = alarm_time.hour % 24; /* 0-23 */
tm->tm_mday = alarm_date.day % 32; /* 1-31 */
tm->tm_mon = (alarm_date.month - 1) % 12; /* 0-11 */
tm->tm_year = (alarm_date.year % 100) + (timer_extended.century * 100) - 1900;
tm->tm_wday = alarm_date.week % 7; /* 0-6 */
tm->tm_wday = alarm_date.week % 7; /* 0-6 */
tm->tm_yday = rtc_get_yday(tm->tm_year + 1900, tm->tm_mon + 1, tm->tm_mday) % 366; /* 0-365 */
tm->tm_isdst = -1;
@ -362,18 +369,19 @@ int rtc_timer_get(int *year, int *month, int *day, int *hour, int *minute, int *
{
struct tm *tm = rtc_timer_get_tm();
if (tm) {
if (year)
if(tm)
{
if(year)
*year = tm->tm_year + 1900;
if (month)
if(month)
*month = tm->tm_mon + 1;
if (day)
if(day)
*day = tm->tm_mday;
if (hour)
if(hour)
*hour = tm->tm_hour;
if (minute)
if(minute)
*minute = tm->tm_min;
if (second)
if(second)
*second = tm->tm_sec;
} else
return -1;
@ -402,18 +410,19 @@ int rtc_alarm_get(int *year, int *month, int *day, int *hour, int *minute, int *
{
struct tm *tm = rtc_alarm_get_tm();
if (tm) {
if (year)
if(tm)
{
if(year)
*year = tm->tm_year + 1900;
if (month)
if(month)
*month = tm->tm_mon + 1;
if (day)
if(day)
*day = tm->tm_mday;
if (hour)
if(hour)
*hour = tm->tm_hour;
if (minute)
if(minute)
*minute = tm->tm_min;
if (second)
if(second)
*second = tm->tm_sec;
} else
return -1;
@ -439,7 +448,7 @@ unsigned int rtc_timer_get_clock_frequency(void)
return rtc->initial_count.count;
}
int rtc_timer_set_clock_count_value(unsigned int count)
int rtc_timer_set_clock_count_value(unsigned int count)
{
rtc_current_count_t current_count;
@ -544,32 +553,34 @@ int rtc_protect_set(int enable)
rtc_register_ctrl_t register_ctrl = rtc->register_ctrl;
rtc_mask_t mask = {
.second = 1, /* Second mask */
.minute = 1, /* Minute mask */
.hour = 1, /* Hour mask */
.week = 1, /* Week mask */
.day = 1, /* Day mask */
.month = 1, /* Month mask */
.year = 1, /* Year mask */
.second = 1, /* Second mask */
.minute = 1, /* Minute mask */
.hour = 1, /* Hour mask */
.week = 1, /* Week mask */
.day = 1, /* Day mask */
.month = 1, /* Month mask */
.year = 1, /* Year mask */
};
rtc_mask_t unmask = {
.second = 0, /* Second mask */
.minute = 0, /* Minute mask */
.hour = 0, /* Hour mask */
.week = 0, /* Week mask */
.day = 0, /* Day mask */
.month = 0, /* Month mask */
.year = 0, /* Year mask */
.second = 0, /* Second mask */
.minute = 0, /* Minute mask */
.hour = 0, /* Hour mask */
.week = 0, /* Week mask */
.day = 0, /* Day mask */
.month = 0, /* Month mask */
.year = 0, /* Year mask */
};
if (enable) {
if(enable)
{
/* Turn RTC in protect mode, no one can write time */
register_ctrl.timer_mask = *(uint8_t *)&unmask;
register_ctrl.alarm_mask = *(uint8_t *)&unmask;
register_ctrl.initial_count_mask = 0;
register_ctrl.interrupt_register_mask = 0;
} else {
} else
{
/* Turn RTC in unprotect mode, everyone can write time */
register_ctrl.timer_mask = *(uint8_t *)&mask;
register_ctrl.alarm_mask = *(uint8_t *)&mask;
@ -591,8 +602,7 @@ int rtc_init(void)
rtc_protect_set(0);
/* Set RTC clock frequency */
rtc_timer_set_clock_frequency(
sysctl_clock_get_freq(SYSCTL_CLOCK_IN0)
);
sysctl_clock_get_freq(SYSCTL_CLOCK_IN0));
rtc_timer_set_clock_count_value(1);
/* Set RTC mode to timer running mode */
rtc_timer_set_mode(RTC_TIMER_RUNNING);
@ -667,8 +677,7 @@ int rtc_irq_callback(void *ctx)
rtc_tick_set_interrupt_mode(instance->tick_mode_by_user);
rtc_tick_set_interrupt(1);
}
}
else
} else
{
rtc_tick_set_interrupt(0);
}
@ -780,8 +789,7 @@ int rtc_alarm_irq_register(bool is_single_shot, rtc_mask_t mask, plic_irq_callba
{
rtc_instance.tick_mode_by_alarm = RTC_INT_HOUR;
goto alarm_mode;
}
else
} else
{
rtc_instance.tick_mode_by_alarm = RTC_INT_DAY;
}
@ -819,8 +827,7 @@ void rtc_alarm_irq_unregister(void)
rtc_tick_set_interrupt_mode(rtc_instance.tick_mode_by_user);
rtc_tick_set_interrupt(1);
}
}
else
} else
{
rtc_tick_set_interrupt(0);
}
@ -830,4 +837,3 @@ void rtc_alarm_irq_unregister(void)
plic_irq_unregister(IRQN_RTC_INTERRUPT);
}
}

42
lib/drivers/sha256.c
View File

@ -13,8 +13,8 @@
* limitations under the License.
*/
#include <string.h>
#include "sysctl.h"
#include "sha256.h"
#include "sysctl.h"
#include "utils.h"
#define ROTL(x, n) (((x) << (n)) | ((x) >> (32 - (n))))
@ -22,18 +22,17 @@
#define BYTESWAP(x) ((ROTR((x), 8) & 0xff00ff00L) | (ROTL((x), 8) & 0x00ff00ffL))
#define BYTESWAP64(x) byteswap64(x)
volatile sha256_t* const sha256 = (volatile sha256_t*)SHA256_BASE_ADDR;
volatile sha256_t *const sha256 = (volatile sha256_t *)SHA256_BASE_ADDR;
static const uint8_t padding[64] =
{
0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
};
{
0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
static inline uint64_t byteswap64(uint64_t x)
{
@ -62,22 +61,22 @@ void sha256_update(sha256_context_t *context, const void *input, size_t input_le
size_t bytes_to_copy;
uint32_t i;
while (input_len)
while(input_len)
{
buffer_bytes_left = SHA256_BLOCK_LEN - context->buffer_len;
bytes_to_copy = buffer_bytes_left;
if (bytes_to_copy > input_len)
if(bytes_to_copy > input_len)
bytes_to_copy = input_len;
memcpy(&context->buffer.bytes[context->buffer_len], data, bytes_to_copy);
context->total_len += bytes_to_copy * 8L;
context->buffer_len += bytes_to_copy;
data += bytes_to_copy;
input_len -= bytes_to_copy;
if (context->buffer_len == SHA256_BLOCK_LEN)
if(context->buffer_len == SHA256_BLOCK_LEN)
{
for (i = 0; i < 16; i++)
for(i = 0; i < 16; i++)
{
while (sha256->sha_function_reg_1.fifo_in_full)
while(sha256->sha_function_reg_1.fifo_in_full)
;
sha256->sha_data_in1 = context->buffer.words[i];
}
@ -93,16 +92,16 @@ void sha256_final(sha256_context_t *context, uint8_t *output)
uint32_t i;
bytes_to_pad = 120L - context->buffer_len;
if (bytes_to_pad > 64L)
if(bytes_to_pad > 64L)
bytes_to_pad -= 64L;
length_pad = BYTESWAP64(context->total_len);
sha256_update(context, padding, bytes_to_pad);
sha256_update(context, &length_pad, 8L);
while (!(sha256->sha_function_reg_0.sha_en))
while(!(sha256->sha_function_reg_0.sha_en))
;
if (output)
if(output)
{
for (i = 0; i < SHA256_HASH_WORDS; i++)
for(i = 0; i < SHA256_HASH_WORDS; i++)
{
*((uint32_t *)output) = sha256->sha_result[SHA256_HASH_WORDS - i - 1];
output += 4;
@ -117,4 +116,3 @@ void sha256_hard_calculate(const uint8_t *input, size_t input_len, uint8_t *outp
sha256_update(&sha, input, input_len);
sha256_final(&sha, output);
}

563
lib/drivers/spi.c
View File

@ -12,24 +12,23 @@
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "platform.h"
#include "spi.h"
#include "fpioa.h"
#include "utils.h"
#include "gpiohs.h"
#include "sysctl.h"
#include <bsp.h>
#include <stddef.h>
#include <stdlib.h>
#include <string.h>
#include <bsp.h>
#include "fpioa.h"
#include "gpiohs.h"
#include "platform.h"
#include "spi.h"
#include "sysctl.h"
#include "utils.h"
volatile spi_t *const spi[4] =
{
(volatile spi_t *)SPI0_BASE_ADDR,
(volatile spi_t *)SPI1_BASE_ADDR,
(volatile spi_t *)SPI_SLAVE_BASE_ADDR,
(volatile spi_t *)SPI3_BASE_ADDR
};
{
(volatile spi_t *)SPI0_BASE_ADDR,
(volatile spi_t *)SPI1_BASE_ADDR,
(volatile spi_t *)SPI_SLAVE_BASE_ADDR,
(volatile spi_t *)SPI3_BASE_ADDR};
typedef struct _spi_dma_context
{
@ -60,29 +59,29 @@ static spi_slave_instance_t g_instance;
static spi_frame_format_t spi_get_frame_format(spi_device_num_t spi_num)
{
uint8_t frf_offset;
switch(spi_num)
{
case 0:
case 1:
frf_offset = 21;
break;
case 2:
configASSERT(!"Spi Bus 2 Not Support!");
break;
case 3:
default:
frf_offset = 22;
break;
}
volatile spi_t *spi_adapter = spi[spi_num];
return ((spi_adapter->ctrlr0 >> frf_offset) & 0x3);
switch(spi_num)
{
case 0:
case 1:
frf_offset = 21;
break;
case 2:
configASSERT(!"Spi Bus 2 Not Support!");
break;
case 3:
default:
frf_offset = 22;
break;
}
volatile spi_t *spi_adapter = spi[spi_num];
return ((spi_adapter->ctrlr0 >> frf_offset) & 0x3);
}
static spi_transfer_width_t spi_get_frame_size(size_t data_bit_length)
{
if (data_bit_length < 8)
if(data_bit_length < 8)
return SPI_TRANS_CHAR;
else if (data_bit_length < 16)
else if(data_bit_length < 16)
return SPI_TRANS_SHORT;
return SPI_TRANS_INT;
}
@ -92,7 +91,8 @@ static int spi_dma_irq(void *ctx)
spi_instance_t *v_instance = (spi_instance_t *)ctx;
volatile spi_t *spi_handle = spi[v_instance->spi_num];
dmac_irq_unregister(v_instance->dmac_channel);
while ((spi_handle->sr & 0x05) != 0x04);
while((spi_handle->sr & 0x05) != 0x04)
;
spi_handle->ser = 0x00;
spi_handle->ssienr = 0x00;
spinlock_unlock(&v_instance->lock);
@ -160,7 +160,7 @@ void spi_init(spi_device_num_t spi_num, spi_work_mode_t work_mode, spi_frame_for
break;
}
switch (frame_format)
switch(frame_format)
{
case SPI_FF_DUAL:
configASSERT(data_bit_length % 2 == 0);
@ -196,7 +196,7 @@ void spi_init_non_standard(spi_device_num_t spi_num, uint32_t instruction_length
configASSERT(spi_num < SPI_DEVICE_MAX && spi_num != 2);
volatile spi_t *spi_handle = spi[spi_num];
uint32_t inst_l = 0;
switch (instruction_length)
switch(instruction_length)
{
case 0:
inst_l = 0;
@ -224,11 +224,10 @@ void spi_init_non_standard(spi_device_num_t spi_num, uint32_t instruction_length
uint32_t spi_set_clk_rate(spi_device_num_t spi_num, uint32_t spi_clk)
{
uint32_t spi_baudr = sysctl_clock_get_freq(SYSCTL_CLOCK_SPI0 + spi_num) / spi_clk;
if(spi_baudr < 2 )
if(spi_baudr < 2)
{
spi_baudr = 2;
}
else if(spi_baudr > 65534)
} else if(spi_baudr > 65534)
{
spi_baudr = 65534;
}
@ -272,7 +271,7 @@ void spi_send_data_normal(spi_device_num_t spi_num, spi_chip_select_t chip_selec
spi_handle->ssienr = 0x01;
spi_handle->ser = 1U << chip_select;
uint32_t i = 0;
while (tx_len)
while(tx_len)
{
fifo_len = 32 - spi_handle->txflr;
fifo_len = fifo_len < tx_len ? fifo_len : tx_len;
@ -282,16 +281,15 @@ void spi_send_data_normal(spi_device_num_t spi_num, spi_chip_select_t chip_selec
fifo_len = fifo_len / 4 * 4;
if(v_misalign_flag)
{
for(index = 0; index < fifo_len; index +=4)
for(index = 0; index < fifo_len; index += 4)
{
memcpy(&v_send_data, tx_buff + i , 4);
memcpy(&v_send_data, tx_buff + i, 4);
spi_handle->dr[0] = v_send_data;
i += 4;
}
}
else
} else
{
for (index = 0; index < fifo_len / 4; index++)
for(index = 0; index < fifo_len / 4; index++)
spi_handle->dr[0] = ((uint32_t *)tx_buff)[i++];
}
break;
@ -299,31 +297,29 @@ void spi_send_data_normal(spi_device_num_t spi_num, spi_chip_select_t chip_selec
fifo_len = fifo_len / 2 * 2;
if(v_misalign_flag)
{
for(index = 0; index < fifo_len; index +=2)
for(index = 0; index < fifo_len; index += 2)
{
memcpy(&v_send_data, tx_buff + i, 2);
spi_handle->dr[0] = v_send_data;
i += 2;
}
}
else
} else
{
for (index = 0; index < fifo_len / 2; index++)
for(index = 0; index < fifo_len / 2; index++)
spi_handle->dr[0] = ((uint16_t *)tx_buff)[i++];
}
break;
default:
for (index = 0; index < fifo_len; index++)
for(index = 0; index < fifo_len; index++)
spi_handle->dr[0] = tx_buff[i++];
break;
}
tx_len -= fifo_len;
}
while ((spi_handle->sr & 0x05) != 0x04)
while((spi_handle->sr & 0x05) != 0x04)
;
spi_handle->ser = 0x00;
spi_handle->ssienr = 0x00;
}
void spi_send_data_standard(spi_device_num_t spi_num, spi_chip_select_t chip_select, const uint8_t *cmd_buff,
@ -418,29 +414,29 @@ void spi_send_data_normal_dma(dmac_channel_number_t channel_num, spi_device_num_
buf = malloc((tx_len) * sizeof(uint32_t));
for(i = 0; i < tx_len; i++)
buf[i] = ((uint16_t *)tx_buff)[i];
break;
break;
case SPI_TRANS_INT:
buf = (uint32_t *)tx_buff;
break;
break;
case SPI_TRANS_CHAR:
default:
buf = malloc((tx_len) * sizeof(uint32_t));
for(i = 0; i < tx_len; i++)
buf[i] = ((uint8_t *)tx_buff)[i];
break;
break;
}
spi_handle->dmacr = 0x2; /*enable dma transmit*/
spi_handle->dmacr = 0x2; /*enable dma transmit*/
spi_handle->ssienr = 0x01;
sysctl_dma_select((sysctl_dma_channel_t) channel_num, SYSCTL_DMA_SELECT_SSI0_TX_REQ + spi_num * 2);
sysctl_dma_select((sysctl_dma_channel_t)channel_num, SYSCTL_DMA_SELECT_SSI0_TX_REQ + spi_num * 2);
dmac_set_single_mode(channel_num, buf, (void *)(&spi_handle->dr[0]), DMAC_ADDR_INCREMENT, DMAC_ADDR_NOCHANGE,
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, tx_len);
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, tx_len);
spi_handle->ser = 1U << chip_select;
dmac_wait_done(channel_num);
if(spi_transfer_width != SPI_TRANS_INT)
free((void *)buf);
while ((spi_handle->sr & 0x05) != 0x04)
while((spi_handle->sr & 0x05) != 0x04)
;
spi_handle->ser = 0x00;
spi_handle->ssienr = 0x00;
@ -529,10 +525,10 @@ void spi_dup_send_receive_data_dma(dmac_channel_number_t dma_send_channel_num,
sysctl_dma_select((sysctl_dma_channel_t)dma_receive_channel_num, SYSCTL_DMA_SELECT_SSI0_RX_REQ + spi_num * 2);
dmac_set_single_mode(dma_receive_channel_num, (void *)(&spi_handle->dr[0]), v_rx_buf, DMAC_ADDR_NOCHANGE, DMAC_ADDR_INCREMENT,
DMAC_MSIZE_1, DMAC_TRANS_WIDTH_32, v_max_len);
DMAC_MSIZE_1, DMAC_TRANS_WIDTH_32, v_max_len);
dmac_set_single_mode(dma_send_channel_num, v_tx_buf, (void *)(&spi_handle->dr[0]), DMAC_ADDR_INCREMENT, DMAC_ADDR_NOCHANGE,
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, v_max_len);
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, v_max_len);
spi_handle->ser = 1U << chip_select;
dmac_wait_done(dma_send_channel_num);
@ -543,18 +539,18 @@ void spi_dup_send_receive_data_dma(dmac_channel_number_t dma_send_channel_num,
switch(frame_width)
{
case SPI_TRANS_INT:
for(i = 0; i < v_rx_len; i++)
((uint32_t *)rx_buf)[i] = v_rx_buf[i];
break;
case SPI_TRANS_SHORT:
for(i = 0; i < v_rx_len; i++)
((uint16_t *)rx_buf)[i] = v_rx_buf[i];
break;
default:
for(i = 0; i < v_rx_len; i++)
rx_buf[i] = v_rx_buf[i];
break;
case SPI_TRANS_INT:
for(i = 0; i < v_rx_len; i++)
((uint32_t *)rx_buf)[i] = v_rx_buf[i];
break;
case SPI_TRANS_SHORT:
for(i = 0; i < v_rx_len; i++)
((uint16_t *)rx_buf)[i] = v_rx_buf[i];
break;
default:
for(i = 0; i < v_rx_len; i++)
rx_buf[i] = v_rx_buf[i];
break;
}
free(v_tx_buf);
free(v_rx_buf);
@ -596,22 +592,22 @@ void spi_receive_data_standard(spi_device_num_t spi_num, spi_chip_select_t chip_
spi_handle->ctrlr1 = (uint32_t)(v_rx_len - 1);
spi_handle->ssienr = 0x01;
while (v_cmd_len)
while(v_cmd_len)
{
fifo_len = 32 - spi_handle->txflr;
fifo_len = fifo_len < v_cmd_len ? fifo_len : v_cmd_len;
switch(frame_width)
{
case SPI_TRANS_INT:
for (index = 0; index < fifo_len; index++)
for(index = 0; index < fifo_len; index++)
spi_handle->dr[0] = ((uint32_t *)cmd_buff)[i++];
break;
case SPI_TRANS_SHORT:
for (index = 0; index < fifo_len; index++)
for(index = 0; index < fifo_len; index++)
spi_handle->dr[0] = ((uint16_t *)cmd_buff)[i++];
break;
default:
for (index = 0; index < fifo_len; index++)
for(index = 0; index < fifo_len; index++)
spi_handle->dr[0] = cmd_buff[i++];
break;
}
@ -626,23 +622,23 @@ void spi_receive_data_standard(spi_device_num_t spi_num, spi_chip_select_t chip_
}
i = 0;
while (v_rx_len)
while(v_rx_len)
{
fifo_len = spi_handle->rxflr;
fifo_len = fifo_len < v_rx_len ? fifo_len : v_rx_len;
switch(frame_width)
{
case SPI_TRANS_INT:
for (index = 0; index < fifo_len; index++)
((uint32_t *)rx_buff)[i++] = spi_handle->dr[0];
for(index = 0; index < fifo_len; index++)
((uint32_t *)rx_buff)[i++] = spi_handle->dr[0];
break;
case SPI_TRANS_SHORT:
for (index = 0; index < fifo_len; index++)
((uint16_t *)rx_buff)[i++] = (uint16_t)spi_handle->dr[0];
break;
for(index = 0; index < fifo_len; index++)
((uint16_t *)rx_buff)[i++] = (uint16_t)spi_handle->dr[0];
break;
default:
for (index = 0; index < fifo_len; index++)
rx_buff[i++] = (uint8_t)spi_handle->dr[0];
for(index = 0; index < fifo_len; index++)
rx_buff[i++] = (uint8_t)spi_handle->dr[0];
break;
}
@ -654,16 +650,16 @@ void spi_receive_data_standard(spi_device_num_t spi_num, spi_chip_select_t chip_
}
void spi_receive_data_normal_dma(dmac_channel_number_t dma_send_channel_num,
dmac_channel_number_t dma_receive_channel_num,
spi_device_num_t spi_num, spi_chip_select_t chip_select, const void *cmd_buff,
size_t cmd_len, void *rx_buff, size_t rx_len)
dmac_channel_number_t dma_receive_channel_num,
spi_device_num_t spi_num, spi_chip_select_t chip_select, const void *cmd_buff,
size_t cmd_len, void *rx_buff, size_t rx_len)
{
configASSERT(spi_num < SPI_DEVICE_MAX && spi_num != 2);
if(cmd_len == 0)
spi_set_tmod(spi_num, SPI_TMOD_RECV);
spi_set_tmod(spi_num, SPI_TMOD_RECV);
else
spi_set_tmod(spi_num, SPI_TMOD_EEROM);
spi_set_tmod(spi_num, SPI_TMOD_EEROM);
volatile spi_t *spi_handle = spi[spi_num];
@ -675,10 +671,10 @@ void spi_receive_data_normal_dma(dmac_channel_number_t dma_send_channel_num,
sysctl_dma_select((sysctl_dma_channel_t)dma_receive_channel_num, SYSCTL_DMA_SELECT_SSI0_RX_REQ + spi_num * 2);
dmac_set_single_mode(dma_receive_channel_num, (void *)(&spi_handle->dr[0]), rx_buff, DMAC_ADDR_NOCHANGE, DMAC_ADDR_INCREMENT,
DMAC_MSIZE_1, DMAC_TRANS_WIDTH_32, rx_len);
DMAC_MSIZE_1, DMAC_TRANS_WIDTH_32, rx_len);
if(cmd_len)
dmac_set_single_mode(dma_send_channel_num, cmd_buff, (void *)(&spi_handle->dr[0]), DMAC_ADDR_INCREMENT, DMAC_ADDR_NOCHANGE,
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, cmd_len);
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, cmd_len);
if(cmd_len == 0 && spi_get_frame_format(spi_num) == SPI_FF_STANDARD)
spi[spi_num]->dr[0] = 0xffffffff;
spi_handle->ser = 1U << chip_select;
@ -690,7 +686,6 @@ void spi_receive_data_normal_dma(dmac_channel_number_t dma_send_channel_num,
spi_handle->ssienr = 0x00;
}
void spi_receive_data_standard_dma(dmac_channel_number_t dma_send_channel_num,
dmac_channel_number_t dma_receive_channel_num,
spi_device_num_t spi_num, spi_chip_select_t chip_select, const uint8_t *cmd_buff,
@ -734,7 +729,7 @@ void spi_receive_data_standard_dma(dmac_channel_number_t dma_send_channel_num,
v_cmd_len = cmd_len / 4;
break;
case SPI_TRANS_SHORT:
write_cmd = malloc((cmd_len + rx_len) /2 * sizeof(uint32_t));
write_cmd = malloc((cmd_len + rx_len) / 2 * sizeof(uint32_t));
for(i = 0; i < cmd_len / 2; i++)
write_cmd[i] = ((uint16_t *)cmd_buff)[i];
read_buf = &write_cmd[i];
@ -810,12 +805,12 @@ void spi_receive_data_multiple(spi_device_num_t spi_num, spi_chip_select_t chip_
spi_handle->ctrlr1 = (uint32_t)(v_rx_len - 1);
spi_handle->ssienr = 0x01;
while (v_cmd_len)
while(v_cmd_len)
{
fifo_len = 32 - spi_handle->txflr;
fifo_len = fifo_len < v_cmd_len ? fifo_len : v_cmd_len;
for (index = 0; index < fifo_len; index++)
for(index = 0; index < fifo_len; index++)
spi_handle->dr[0] = *cmd_buff++;
spi_handle->ser = 1U << chip_select;
@ -827,23 +822,23 @@ void spi_receive_data_multiple(spi_device_num_t spi_num, spi_chip_select_t chip_
spi_handle->ser = 1U << chip_select;
}
while (v_rx_len)
while(v_rx_len)
{
fifo_len = spi_handle->rxflr;
fifo_len = fifo_len < v_rx_len ? fifo_len : v_rx_len;
switch(frame_width)
{
case SPI_TRANS_INT:
for (index = 0; index < fifo_len; index++)
((uint32_t *)rx_buff)[i++] = spi_handle->dr[0];
for(index = 0; index < fifo_len; index++)
((uint32_t *)rx_buff)[i++] = spi_handle->dr[0];
break;
case SPI_TRANS_SHORT:
for (index = 0; index < fifo_len; index++)
((uint16_t *)rx_buff)[i++] = (uint16_t)spi_handle->dr[0];
for(index = 0; index < fifo_len; index++)
((uint16_t *)rx_buff)[i++] = (uint16_t)spi_handle->dr[0];
break;
default:
for (index = 0; index < fifo_len; index++)
rx_buff[i++] = (uint8_t)spi_handle->dr[0];
for(index = 0; index < fifo_len; index++)
rx_buff[i++] = (uint8_t)spi_handle->dr[0];
break;
}
@ -852,13 +847,12 @@ void spi_receive_data_multiple(spi_device_num_t spi_num, spi_chip_select_t chip_
spi_handle->ser = 0x00;
spi_handle->ssienr = 0x00;
}
void spi_receive_data_multiple_dma(dmac_channel_number_t dma_send_channel_num,
dmac_channel_number_t dma_receive_channel_num,
spi_device_num_t spi_num, spi_chip_select_t chip_select, const uint32_t *cmd_buff,
size_t cmd_len, uint8_t *rx_buff, size_t rx_len)
dmac_channel_number_t dma_receive_channel_num,
spi_device_num_t spi_num, spi_chip_select_t chip_select, const uint32_t *cmd_buff,
size_t cmd_len, uint8_t *rx_buff, size_t rx_len)
{
configASSERT(spi_num < SPI_DEVICE_MAX && spi_num != 2);
@ -867,17 +861,17 @@ void spi_receive_data_multiple_dma(dmac_channel_number_t dma_send_channel_num,
uint8_t dfs_offset;
switch(spi_num)
{
case 0:
case 1:
dfs_offset = 16;
break;
case 2:
configASSERT(!"Spi Bus 2 Not Support!");
break;
case 3:
default:
dfs_offset = 0;
break;
case 0:
case 1:
dfs_offset = 16;
break;
case 2:
configASSERT(!"Spi Bus 2 Not Support!");
break;
case 3:
default:
dfs_offset = 0;
break;
}
uint32_t data_bit_length = (spi_handle->ctrlr0 >> dfs_offset) & 0x1F;
spi_transfer_width_t frame_width = spi_get_frame_size(data_bit_length);
@ -889,23 +883,23 @@ void spi_receive_data_multiple_dma(dmac_channel_number_t dma_send_channel_num,
size_t v_recv_len;
switch(frame_width)
{
case SPI_TRANS_INT:
v_recv_len = rx_len / 4;
break;
case SPI_TRANS_SHORT:
write_cmd = malloc(cmd_len + rx_len /2 * sizeof(uint32_t));
for(i = 0; i < cmd_len; i++)
write_cmd[i] = cmd_buff[i];
read_buf = &write_cmd[i];
v_recv_len = rx_len / 2;
break;
default:
write_cmd = malloc(cmd_len + rx_len * sizeof(uint32_t));
for(i = 0; i < cmd_len; i++)
write_cmd[i] = cmd_buff[i];
read_buf = &write_cmd[i];
v_recv_len = rx_len;
break;
case SPI_TRANS_INT:
v_recv_len = rx_len / 4;
break;
case SPI_TRANS_SHORT:
write_cmd = malloc(cmd_len + rx_len / 2 * sizeof(uint32_t));
for(i = 0; i < cmd_len; i++)
write_cmd[i] = cmd_buff[i];
read_buf = &write_cmd[i];
v_recv_len = rx_len / 2;
break;
default:
write_cmd = malloc(cmd_len + rx_len * sizeof(uint32_t));
for(i = 0; i < cmd_len; i++)
write_cmd[i] = cmd_buff[i];
read_buf = &write_cmd[i];
v_recv_len = rx_len;
break;
}
if(frame_width == SPI_TRANS_INT)
spi_receive_data_normal_dma(dma_send_channel_num, dma_receive_channel_num, spi_num, chip_select, cmd_buff, cmd_len, rx_buff, v_recv_len);
@ -914,16 +908,16 @@ void spi_receive_data_multiple_dma(dmac_channel_number_t dma_send_channel_num,
switch(frame_width)
{
case SPI_TRANS_INT:
break;
case SPI_TRANS_SHORT:
for(i = 0; i < v_recv_len; i++)
((uint16_t *)rx_buff)[i] = read_buf[i];
break;
default:
for(i = 0; i < v_recv_len; i++)
rx_buff[i] = read_buf[i];
break;
case SPI_TRANS_INT:
break;
case SPI_TRANS_SHORT:
for(i = 0; i < v_recv_len; i++)
((uint16_t *)rx_buff)[i] = read_buf[i];
break;
default:
for(i = 0; i < v_recv_len; i++)
rx_buff[i] = read_buf[i];
break;
}
if(frame_width != SPI_TRANS_INT)
@ -947,7 +941,7 @@ void spi_send_data_multiple(spi_device_num_t spi_num, spi_chip_select_t chip_sel
fifo_len = 32 - spi_handle->txflr;
fifo_len = fifo_len < v_cmd_len ? fifo_len : v_cmd_len;
fifo_len = fifo_len / 4 * 4;
for (index = 0; index < fifo_len / 4; index++)
for(index = 0; index < fifo_len / 4; index++)
spi_handle->dr[0] = *cmd_buff++;
v_cmd_len -= fifo_len;
}
@ -1022,16 +1016,16 @@ void spi_fill_data_dma(dmac_channel_number_t channel_num, spi_device_num_t spi_n
spi_set_tmod(spi_num, SPI_TMOD_TRANS);
volatile spi_t *spi_handle = spi[spi_num];
spi_handle->dmacr = 0x2; /*enable dma transmit*/
spi_handle->dmacr = 0x2; /*enable dma transmit*/
spi_handle->ssienr = 0x01;
sysctl_dma_select((sysctl_dma_channel_t)channel_num, SYSCTL_DMA_SELECT_SSI0_TX_REQ + spi_num * 2);
dmac_set_single_mode(channel_num, tx_buff, (void *)(&spi_handle->dr[0]), DMAC_ADDR_NOCHANGE, DMAC_ADDR_NOCHANGE,
DMAC_MSIZE_1, DMAC_TRANS_WIDTH_32, tx_len);
DMAC_MSIZE_1, DMAC_TRANS_WIDTH_32, tx_len);
spi_handle->ser = 1U << chip_select;
dmac_wait_done(channel_num);
while ((spi_handle->sr & 0x05) != 0x04)
while((spi_handle->sr & 0x05) != 0x04)
;
spi_handle->ser = 0x00;
spi_handle->ssienr = 0x00;
@ -1043,7 +1037,7 @@ static int spi_slave_irq(void *ctx)
spi_handle->imr = 0x00;
*(volatile uint32_t *)((uintptr_t)spi_handle->icr);
if (g_instance.status == IDLE)
if(g_instance.status == IDLE)
g_instance.status = COMMAND;
return 0;
}
@ -1073,25 +1067,25 @@ static void spi_slave_command_mode(void)
spi_device_num_t spi_num = SPI_DEVICE_2;
switch(frame_width)
{
case SPI_TRANS_INT:
for (uint32_t i = 0; i < 8 / 4; i++)
((uint32_t *)cmd_data)[i] = spi_handle->dr[0];
break;
case SPI_TRANS_SHORT:
for (uint32_t i = 0; i < 8 / 2; i++)
((uint16_t *)cmd_data)[i] = spi_handle->dr[0];
break;
default:
for (uint32_t i = 0; i < 8; i++)
cmd_data[i] = spi_handle->dr[0];
break;
case SPI_TRANS_INT:
for(uint32_t i = 0; i < 8 / 4; i++)
((uint32_t *)cmd_data)[i] = spi_handle->dr[0];
break;
case SPI_TRANS_SHORT:
for(uint32_t i = 0; i < 8 / 2; i++)
((uint16_t *)cmd_data)[i] = spi_handle->dr[0];
break;
default:
for(uint32_t i = 0; i < 8; i++)
cmd_data[i] = spi_handle->dr[0];
break;
}
for (uint32_t i = 0; i < 7; i++)
for(uint32_t i = 0; i < 7; i++)
{
sum += cmd_data[i];
}
if (cmd_data[7] != sum)
if(cmd_data[7] != sum)
{
spi_slave_idle_mode();
return;
@ -1099,23 +1093,22 @@ static void spi_slave_command_mode(void)
g_instance.command.cmd = cmd_data[0];
g_instance.command.addr = cmd_data[1] | (cmd_data[2] << 8) | (cmd_data[3] << 16) | (cmd_data[4] << 24);
g_instance.command.len = cmd_data[5] | (cmd_data[6] << 8);
if (g_instance.command.len == 0)
if(g_instance.command.len == 0)
g_instance.command.len = 65536;
if ((g_instance.command.cmd < WRITE_DATA_BLOCK) && (g_instance.command.len > 8))
if((g_instance.command.cmd < WRITE_DATA_BLOCK) && (g_instance.command.len > 8))
{
spi_slave_idle_mode();
return;
}
g_instance.status = TRANSFER;
spi_handle->ssienr = 0x00;
if (g_instance.command.cmd == WRITE_CONFIG)
if(g_instance.command.cmd == WRITE_CONFIG)
{
spi_handle->ctrlr0 = (0x0 << g_instance.work_mode) | (0x1 << g_instance.slv_oe) | ((g_instance.data_bit_length - 1) << g_instance.dfs);
spi[2]->rxftlr = g_instance.command.len / data_width - 1;
spi_handle->imr = 0x00;
spi_handle->ssienr = 0x01;
}
else if (g_instance.command.cmd == READ_CONFIG)
} else if(g_instance.command.cmd == READ_CONFIG)
{
spi_handle->ctrlr0 = (0x0 << g_instance.work_mode) | (0x0 << g_instance.slv_oe) | ((g_instance.data_bit_length - 1) << g_instance.dfs);
spi_set_tmod(2, SPI_TMOD_TRANS);
@ -1124,34 +1117,32 @@ static void spi_slave_command_mode(void)
spi_handle->ssienr = 0x01;
switch(frame_width)
{
case SPI_TRANS_INT:
for (uint32_t i = 0; i < g_instance.command.len / 4; i++)
{
spi_handle->dr[0] = ((uint32_t *)&g_instance.config_ptr[g_instance.command.addr])[i];
}
break;
case SPI_TRANS_SHORT:
for (uint32_t i = 0; i < g_instance.command.len / 2; i++)
{
spi_handle->dr[0] = ((uint16_t *)&g_instance.config_ptr[g_instance.command.addr])[i];
}
break;
default:
for (uint32_t i = 0; i < g_instance.command.len; i++)
{
spi_handle->dr[0] = ((uint8_t *)&g_instance.config_ptr[g_instance.command.addr])[i];
}
break;
case SPI_TRANS_INT:
for(uint32_t i = 0; i < g_instance.command.len / 4; i++)
{
spi_handle->dr[0] = ((uint32_t *)&g_instance.config_ptr[g_instance.command.addr])[i];
}
break;
case SPI_TRANS_SHORT:
for(uint32_t i = 0; i < g_instance.command.len / 2; i++)
{
spi_handle->dr[0] = ((uint16_t *)&g_instance.config_ptr[g_instance.command.addr])[i];
}
break;
default:
for(uint32_t i = 0; i < g_instance.command.len; i++)
{
spi_handle->dr[0] = ((uint8_t *)&g_instance.config_ptr[g_instance.command.addr])[i];
}
break;
}
}
else if (g_instance.command.cmd == WRITE_DATA_BYTE)
} else if(g_instance.command.cmd == WRITE_DATA_BYTE)
{
spi_handle->ctrlr0 = (0x0 << g_instance.work_mode) | (0x1 << g_instance.slv_oe) | ((g_instance.data_bit_length - 1) << g_instance.dfs);
spi[2]->rxftlr = g_instance.command.len / data_width - 1;
spi_handle->imr = 0x00;
spi_handle->ssienr = 0x01;
}
else if (g_instance.command.cmd == READ_DATA_BYTE)
} else if(g_instance.command.cmd == READ_DATA_BYTE)
{
spi_handle->ctrlr0 = (0x0 << g_instance.work_mode) | (0x0 << g_instance.slv_oe) | ((g_instance.data_bit_length - 1) << g_instance.dfs);
spi_set_tmod(2, SPI_TMOD_TRANS);
@ -1160,27 +1151,26 @@ static void spi_slave_command_mode(void)
spi_handle->ssienr = 0x01;
switch(frame_width)
{
case SPI_TRANS_INT:
for (uint32_t i = 0; i < g_instance.command.len / 4; i++)
{
spi_handle->dr[0] = ((uint32_t *)(uintptr_t)g_instance.command.addr)[i];
}
break;
case SPI_TRANS_SHORT:
for (uint32_t i = 0; i < g_instance.command.len / 2; i++)
{
spi_handle->dr[0] = ((uint16_t *)(uintptr_t)g_instance.command.addr)[i];
}
break;
default:
for (uint32_t i = 0; i < g_instance.command.len; i++)
{
spi_handle->dr[0] = ((uint8_t *)(uintptr_t)g_instance.command.addr)[i];
}
break;
case SPI_TRANS_INT:
for(uint32_t i = 0; i < g_instance.command.len / 4; i++)
{
spi_handle->dr[0] = ((uint32_t *)(uintptr_t)g_instance.command.addr)[i];
}
break;
case SPI_TRANS_SHORT:
for(uint32_t i = 0; i < g_instance.command.len / 2; i++)
{
spi_handle->dr[0] = ((uint16_t *)(uintptr_t)g_instance.command.addr)[i];
}
break;
default:
for(uint32_t i = 0; i < g_instance.command.len; i++)
{
spi_handle->dr[0] = ((uint8_t *)(uintptr_t)g_instance.command.addr)[i];
}
break;
}
}
else if (g_instance.command.cmd == WRITE_DATA_BLOCK)
} else if(g_instance.command.cmd == WRITE_DATA_BLOCK)
{
spi_handle->ctrlr0 = (0x0 << g_instance.work_mode) | (0x1 << g_instance.slv_oe) | ((32 - 1) << g_instance.dfs);
@ -1191,9 +1181,8 @@ static void spi_slave_command_mode(void)
sysctl_dma_select(g_instance.dmac_channel, SYSCTL_DMA_SELECT_SSI0_RX_REQ + spi_num * 2);
dmac_set_single_mode(g_instance.dmac_channel, (void *)(&spi_handle->dr[0]), (void *)((uintptr_t)g_instance.command.addr & 0xFFFFFFF0), DMAC_ADDR_NOCHANGE, DMAC_ADDR_INCREMENT,
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, g_instance.command.len * 4);
}
else if (g_instance.command.cmd == READ_DATA_BLOCK)
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, g_instance.command.len * 4);
} else if(g_instance.command.cmd == READ_DATA_BLOCK)
{
spi_handle->ctrlr0 = (0x0 << g_instance.work_mode) | (0x0 << g_instance.slv_oe) | ((32 - 1) << g_instance.dfs);
spi_set_tmod(2, SPI_TMOD_TRANS);
@ -1203,9 +1192,8 @@ static void spi_slave_command_mode(void)
sysctl_dma_select(g_instance.dmac_channel, SYSCTL_DMA_SELECT_SSI0_TX_REQ + spi_num * 2);
dmac_set_single_mode(g_instance.dmac_channel, (void *)((uintptr_t)g_instance.command.addr & 0xFFFFFFF0), (void *)(&spi_handle->dr[0]), DMAC_ADDR_INCREMENT, DMAC_ADDR_NOCHANGE,
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, g_instance.command.len * 4);
}
else
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, g_instance.command.len * 4);
} else
{
spi_slave_idle_mode();
return;
@ -1220,86 +1208,83 @@ static void spi_slave_transfer_mode(void)
switch(frame_width)
{
case SPI_TRANS_INT:
command_len = g_instance.command.len / 4;
break;
case SPI_TRANS_SHORT:
command_len = g_instance.command.len / 2;
break;
default:
command_len = g_instance.command.len;
break;
case SPI_TRANS_INT:
command_len = g_instance.command.len / 4;
break;
case SPI_TRANS_SHORT:
command_len = g_instance.command.len / 2;
break;
default:
command_len = g_instance.command.len;
break;
}
volatile spi_t *spi_handle = spi[2];
g_instance.command.err = 0;
if (g_instance.command.cmd == WRITE_CONFIG || g_instance.command.cmd == WRITE_DATA_BYTE)
if(g_instance.command.cmd == WRITE_CONFIG || g_instance.command.cmd == WRITE_DATA_BYTE)
{
if (spi_handle->rxflr < command_len - 1)
if(spi_handle->rxflr < command_len - 1)
g_instance.command.err = 1;
}
else if (g_instance.command.cmd == READ_CONFIG || g_instance.command.cmd == READ_DATA_BYTE)
} else if(g_instance.command.cmd == READ_CONFIG || g_instance.command.cmd == READ_DATA_BYTE)
{
if (spi_handle->txflr != 0)
if(spi_handle->txflr != 0)
g_instance.command.err = 2;
} else if (g_instance.command.cmd == WRITE_DATA_BLOCK || g_instance.command.cmd == READ_DATA_BLOCK)
} else if(g_instance.command.cmd == WRITE_DATA_BLOCK || g_instance.command.cmd == READ_DATA_BLOCK)
{
if (dmac->channel[g_instance.dmac_channel].intstatus != 0x02)
if(dmac->channel[g_instance.dmac_channel].intstatus != 0x02)
g_instance.command.err = 3;
}
else
} else
{
spi_slave_idle_mode();
return;
}
if (g_instance.command.err == 0)
if(g_instance.command.err == 0)
{
if (g_instance.command.cmd == WRITE_CONFIG)
if(g_instance.command.cmd == WRITE_CONFIG)
{
switch(frame_width)
{
case SPI_TRANS_INT:
for (uint32_t i = 0; i < command_len; i++)
{
((uint32_t *)&g_instance.config_ptr[g_instance.command.addr])[i] = spi_handle->dr[0];
}
break;
case SPI_TRANS_SHORT:
for (uint32_t i = 0; i < command_len; i++)
{
((uint16_t *)&g_instance.config_ptr[g_instance.command.addr])[i] = spi_handle->dr[0];
}
break;
default:
for (uint32_t i = 0; i < command_len; i++)
{
((uint8_t *)&g_instance.config_ptr[g_instance.command.addr])[i] = spi_handle->dr[0];
}
break;
case SPI_TRANS_INT:
for(uint32_t i = 0; i < command_len; i++)
{
((uint32_t *)&g_instance.config_ptr[g_instance.command.addr])[i] = spi_handle->dr[0];
}
break;
case SPI_TRANS_SHORT:
for(uint32_t i = 0; i < command_len; i++)
{
((uint16_t *)&g_instance.config_ptr[g_instance.command.addr])[i] = spi_handle->dr[0];
}
break;
default:
for(uint32_t i = 0; i < command_len; i++)
{
((uint8_t *)&g_instance.config_ptr[g_instance.command.addr])[i] = spi_handle->dr[0];
}
break;
}
}
else if (g_instance.command.cmd == WRITE_DATA_BYTE)
} else if(g_instance.command.cmd == WRITE_DATA_BYTE)
{
switch(frame_width)
{
case SPI_TRANS_INT:
for (uint32_t i = 0; i < command_len; i++)
{
((uint32_t *)(uintptr_t)g_instance.command.addr)[i] = spi_handle->dr[0];
}
break;
case SPI_TRANS_SHORT:
for (uint32_t i = 0; i < command_len; i++)
{
((uint16_t *)(uintptr_t)g_instance.command.addr)[i] = spi_handle->dr[0];
}
break;
default:
for (uint32_t i = 0; i < command_len; i++)
{
((uint8_t *)(uintptr_t)g_instance.command.addr)[i] = spi_handle->dr[0];
}
break;
case SPI_TRANS_INT:
for(uint32_t i = 0; i < command_len; i++)
{
((uint32_t *)(uintptr_t)g_instance.command.addr)[i] = spi_handle->dr[0];
}
break;
case SPI_TRANS_SHORT:
for(uint32_t i = 0; i < command_len; i++)
{
((uint16_t *)(uintptr_t)g_instance.command.addr)[i] = spi_handle->dr[0];
}
break;
default:
for(uint32_t i = 0; i < command_len; i++)
{
((uint8_t *)(uintptr_t)g_instance.command.addr)[i] = spi_handle->dr[0];
}
break;
}
}
}
@ -1312,11 +1297,11 @@ static void spi_slave_transfer_mode(void)
static void spi_slave_cs_irq(void)
{
if (g_instance.status == IDLE)
if(g_instance.status == IDLE)
spi_slave_idle_mode();
else if (g_instance.status == COMMAND)
else if(g_instance.status == COMMAND)
spi_slave_command_mode();
else if (g_instance.status == TRANSFER)
else if(g_instance.status == TRANSFER)
spi_slave_transfer_mode();
}
@ -1408,14 +1393,14 @@ void spi_handle_data_dma(spi_device_num_t spi_num, spi_chip_select_t chip_select
}
sysctl_dma_select((sysctl_dma_channel_t)data.rx_channel, SYSCTL_DMA_SELECT_SSI0_RX_REQ + spi_num * 2);
dmac_set_single_mode(data.rx_channel, (void *)(&spi_handle->dr[0]), (void *)data.rx_buf, DMAC_ADDR_NOCHANGE, DMAC_ADDR_INCREMENT,
DMAC_MSIZE_1, DMAC_TRANS_WIDTH_32, data.rx_len);
DMAC_MSIZE_1, DMAC_TRANS_WIDTH_32, data.rx_len);
spi_handle->ser = 1U << chip_select;
if(!cb)
dmac_wait_idle(data.rx_channel);
break;
case SPI_TMOD_TRANS:
spi_set_tmod(spi_num, SPI_TMOD_TRANS);
spi_handle->dmacr = 0x2; /*enable dma transmit*/
spi_handle->dmacr = 0x2; /*enable dma transmit*/
spi_handle->ssienr = 0x01;
if(cb)
@ -1426,15 +1411,15 @@ void spi_handle_data_dma(spi_device_num_t spi_num, spi_chip_select_t chip_select
sysctl_dma_select(data.tx_channel, SYSCTL_DMA_SELECT_SSI0_TX_REQ + spi_num * 2);
if(data.fill_mode)
dmac_set_single_mode(data.tx_channel, data.tx_buf, (void *)(&spi_handle->dr[0]), DMAC_ADDR_NOCHANGE, DMAC_ADDR_NOCHANGE,
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, data.tx_len);
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, data.tx_len);
else
dmac_set_single_mode(data.tx_channel, data.tx_buf, (void *)(&spi_handle->dr[0]), DMAC_ADDR_INCREMENT, DMAC_ADDR_NOCHANGE,
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, data.tx_len);
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, data.tx_len);
spi_handle->ser = 1U << chip_select;
if(!cb)
{
dmac_wait_idle(data.tx_channel);
while ((spi_handle->sr & 0x05) != 0x04)
while((spi_handle->sr & 0x05) != 0x04)
;
}
break;
@ -1448,10 +1433,10 @@ void spi_handle_data_dma(spi_device_num_t spi_num, spi_chip_select_t chip_select
sysctl_dma_select(data.tx_channel, SYSCTL_DMA_SELECT_SSI0_TX_REQ + spi_num * 2);
if(data.fill_mode)
dmac_set_single_mode(data.tx_channel, data.tx_buf, (void *)(&spi_handle->dr[0]), DMAC_ADDR_NOCHANGE, DMAC_ADDR_NOCHANGE,
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, data.tx_len);
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, data.tx_len);
else
dmac_set_single_mode(data.tx_channel, data.tx_buf, (void *)(&spi_handle->dr[0]), DMAC_ADDR_INCREMENT, DMAC_ADDR_NOCHANGE,
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, data.tx_len);
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, data.tx_len);
if(cb)
{
dmac_irq_register(data.rx_channel, spi_dma_irq, &g_spi_instance[spi_num], cb->priority);
@ -1459,7 +1444,7 @@ void spi_handle_data_dma(spi_device_num_t spi_num, spi_chip_select_t chip_select
}
sysctl_dma_select(data.rx_channel, SYSCTL_DMA_SELECT_SSI0_RX_REQ + spi_num * 2);
dmac_set_single_mode(data.rx_channel, (void *)(&spi_handle->dr[0]), (void *)data.rx_buf, DMAC_ADDR_NOCHANGE, DMAC_ADDR_INCREMENT,
DMAC_MSIZE_1, DMAC_TRANS_WIDTH_32, data.rx_len);
DMAC_MSIZE_1, DMAC_TRANS_WIDTH_32, data.rx_len);
spi_handle->ser = 1U << chip_select;
if(!cb)
dmac_wait_idle(data.rx_channel);
@ -1475,8 +1460,7 @@ void spi_handle_data_dma(spi_device_num_t spi_num, spi_chip_select_t chip_select
{
dmac_irq_register(data.tx_channel, spi_dma_irq, &g_spi_instance[spi_num], cb->priority);
g_spi_instance[spi_num].dmac_channel = data.tx_channel;
}
else
} else
{
dmac_irq_register(data.rx_channel, spi_dma_irq, &g_spi_instance[spi_num], cb->priority);
g_spi_instance[spi_num].dmac_channel = data.rx_channel;
@ -1488,13 +1472,13 @@ void spi_handle_data_dma(spi_device_num_t spi_num, spi_chip_select_t chip_select
sysctl_dma_select(data.tx_channel, SYSCTL_DMA_SELECT_SSI0_TX_REQ + spi_num * 2);
if(data.fill_mode)
dmac_set_single_mode(data.tx_channel, data.tx_buf, (void *)(&spi_handle->dr[0]), DMAC_ADDR_NOCHANGE, DMAC_ADDR_NOCHANGE,
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, data.tx_len);
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, data.tx_len);
else
dmac_set_single_mode(data.tx_channel, data.tx_buf, (void *)(&spi_handle->dr[0]), DMAC_ADDR_INCREMENT, DMAC_ADDR_NOCHANGE,
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, data.tx_len);
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, data.tx_len);
sysctl_dma_select(data.rx_channel, SYSCTL_DMA_SELECT_SSI0_RX_REQ + spi_num * 2);
dmac_set_single_mode(data.rx_channel, (void *)(&spi_handle->dr[0]), (void *)data.rx_buf, DMAC_ADDR_NOCHANGE, DMAC_ADDR_INCREMENT,
DMAC_MSIZE_1, DMAC_TRANS_WIDTH_32, data.rx_len);
DMAC_MSIZE_1, DMAC_TRANS_WIDTH_32, data.rx_len);
spi_handle->ser = 1U << chip_select;
if(!cb)
{
@ -1510,4 +1494,3 @@ void spi_handle_data_dma(spi_device_num_t spi_num, spi_chip_select_t chip_select
spi_handle->ssienr = 0x00;
}
}

357
lib/drivers/sysctl.c
View File

@ -12,42 +12,42 @@
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include <stdint.h>
#include <stdlib.h>
#include <math.h>
#include <stdint.h>
#include <stdio.h>
#include "sysctl.h"
#include "string.h"
#include "encoding.h"
#include <stdlib.h>
#include "bsp.h"
#include "encoding.h"
#include "string.h"
#include "sysctl.h"
#include "uart.h"
#define SYSCTRL_CLOCK_FREQ_IN0 (26000000UL)
const uint8_t get_select_pll2[] =
{
[SYSCTL_SOURCE_IN0] = 0,
[SYSCTL_SOURCE_PLL0] = 1,
[SYSCTL_SOURCE_PLL1] = 2,
{
[SYSCTL_SOURCE_IN0] = 0,
[SYSCTL_SOURCE_PLL0] = 1,
[SYSCTL_SOURCE_PLL1] = 2,
};
const uint8_t get_source_pll2[] =
{
[0] = SYSCTL_SOURCE_IN0,
[1] = SYSCTL_SOURCE_PLL0,
[2] = SYSCTL_SOURCE_PLL1,
{
[0] = SYSCTL_SOURCE_IN0,
[1] = SYSCTL_SOURCE_PLL0,
[2] = SYSCTL_SOURCE_PLL1,
};
const uint8_t get_select_aclk[] =
{
[SYSCTL_SOURCE_IN0] = 0,
[SYSCTL_SOURCE_PLL0] = 1,
{
[SYSCTL_SOURCE_IN0] = 0,
[SYSCTL_SOURCE_PLL0] = 1,
};
const uint8_t get_source_aclk[] =
{
[0] = SYSCTL_SOURCE_IN0,
[1] = SYSCTL_SOURCE_PLL0,
{
[0] = SYSCTL_SOURCE_IN0,
[1] = SYSCTL_SOURCE_PLL0,
};
volatile sysctl_t *const sysctl = (volatile sysctl_t *)SYSCTL_BASE_ADDR;
@ -64,7 +64,7 @@ uint32_t sysctl_get_freq(void)
static void sysctl_reset_ctl(sysctl_reset_t reset, uint8_t rst_value)
{
switch (reset)
switch(reset)
{
case SYSCTL_RESET_SOC:
sysctl->soft_reset.soft_reset = rst_value;
@ -178,9 +178,9 @@ static int sysctl_clock_bus_en(sysctl_clock_t clock, uint8_t en)
*/
/* The APB clock should carefully disable */
if (en)
if(en)
{
switch (clock)
switch(clock)
{
/*
* These peripheral devices are under APB0
@ -238,7 +238,7 @@ static int sysctl_clock_bus_en(sysctl_clock_t clock, uint8_t en)
static int sysctl_clock_device_en(sysctl_clock_t clock, uint8_t en)
{
switch (clock)
switch(clock)
{
/*
* These devices are PLL
@ -388,7 +388,7 @@ static int sysctl_clock_device_en(sysctl_clock_t clock, uint8_t en)
int sysctl_clock_enable(sysctl_clock_t clock)
{
if (clock >= SYSCTL_CLOCK_MAX)
if(clock >= SYSCTL_CLOCK_MAX)
return -1;
sysctl_clock_bus_en(clock, 1);
sysctl_clock_device_en(clock, 1);
@ -397,7 +397,7 @@ int sysctl_clock_enable(sysctl_clock_t clock)
int sysctl_clock_disable(sysctl_clock_t clock)
{
if (clock >= SYSCTL_CLOCK_MAX)
if(clock >= SYSCTL_CLOCK_MAX)
return -1;
sysctl_clock_device_en(clock, 0);
return 0;
@ -406,7 +406,7 @@ int sysctl_clock_disable(sysctl_clock_t clock)
int sysctl_clock_set_threshold(sysctl_threshold_t which, int threshold)
{
int result = 0;
switch (which)
switch(which)
{
/*
* These threshold is 2 bit width
@ -520,7 +520,7 @@ int sysctl_clock_get_threshold(sysctl_threshold_t which)
{
int threshold = 0;
switch (which)
switch(which)
{
/*
* Select and get threshold value
@ -617,7 +617,7 @@ int sysctl_clock_get_threshold(sysctl_threshold_t which)
int sysctl_clock_set_clock_select(sysctl_clock_select_t which, int select)
{
int result = 0;
switch (which)
switch(which)
{
/*
* These clock select is 1 bit width
@ -669,7 +669,7 @@ int sysctl_clock_get_clock_select(sysctl_clock_select_t which)
{
int clock_select = 0;
switch (which)
switch(which)
{
/*
* Select and get clock select value
@ -716,7 +716,7 @@ uint32_t sysctl_clock_source_get_freq(sysctl_clock_source_t input)
{
uint32_t result;
switch (input)
switch(input)
{
case SYSCTL_SOURCE_IN0:
result = SYSCTRL_CLOCK_FREQ_IN0;
@ -754,10 +754,10 @@ static int sysctl_pll_is_lock(sysctl_pll_t pll)
*
*/
if (pll >= SYSCTL_PLL_MAX)
if(pll >= SYSCTL_PLL_MAX)
return 0;
switch (pll)
switch(pll)
{
case SYSCTL_PLL0:
return sysctl->pll_lock.pll_lock0 == 3;
@ -777,10 +777,10 @@ static int sysctl_pll_is_lock(sysctl_pll_t pll)
static int sysctl_pll_clear_slip(sysctl_pll_t pll)
{
if (pll >= SYSCTL_PLL_MAX)
if(pll >= SYSCTL_PLL_MAX)
return -1;
switch (pll)
switch(pll)
{
case SYSCTL_PLL0:
sysctl->pll_lock.pll_slip_clear0 = 1;
@ -820,10 +820,10 @@ int sysctl_pll_enable(sysctl_pll_t pll)
* t2 t3 t4
*/
if (pll >= SYSCTL_PLL_MAX)
if(pll >= SYSCTL_PLL_MAX)
return -1;
switch (pll)
switch(pll)
{
case SYSCTL_PLL0:
/* Do not bypass PLL */
@ -841,8 +841,8 @@ int sysctl_pll_enable(sysctl_pll_t pll)
*/
sysctl->pll0.pll_reset0 = 0;
sysctl->pll0.pll_reset0 = 1;
asm volatile ("nop");
asm volatile ("nop");
asm volatile("nop");
asm volatile("nop");
sysctl->pll0.pll_reset0 = 0;
break;
@ -862,8 +862,8 @@ int sysctl_pll_enable(sysctl_pll_t pll)
*/
sysctl->pll1.pll_reset1 = 0;
sysctl->pll1.pll_reset1 = 1;
asm volatile ("nop");
asm volatile ("nop");
asm volatile("nop");
asm volatile("nop");
sysctl->pll1.pll_reset1 = 0;
break;
@ -883,8 +883,8 @@ int sysctl_pll_enable(sysctl_pll_t pll)
*/
sysctl->pll2.pll_reset2 = 0;
sysctl->pll2.pll_reset2 = 1;
asm volatile ("nop");
asm volatile ("nop");
asm volatile("nop");
asm volatile("nop");
sysctl->pll2.pll_reset2 = 0;
break;
@ -897,10 +897,10 @@ int sysctl_pll_enable(sysctl_pll_t pll)
int sysctl_pll_disable(sysctl_pll_t pll)
{
if (pll >= SYSCTL_PLL_MAX)
if(pll >= SYSCTL_PLL_MAX)
return -1;
switch (pll)
switch(pll)
{
case SYSCTL_PLL0:
/* Bypass PLL */
@ -948,23 +948,23 @@ uint32_t sysctl_pll_get_freq(sysctl_pll_t pll)
uint32_t nr = 0, nf = 0, od = 0;
uint8_t select = 0;
if (pll >= SYSCTL_PLL_MAX)
if(pll >= SYSCTL_PLL_MAX)
return 0;
switch (pll)
switch(pll)
{
case SYSCTL_PLL0:
freq_in = sysctl_clock_source_get_freq(SYSCTL_SOURCE_IN0);
nr = sysctl->pll0.clkr0 + 1;
nf = sysctl->pll0.clkf0 + 1;
od = sysctl->pll0.clkod0 + 1;
nr = sysctl->pll0.clkr0 + 1;
nf = sysctl->pll0.clkf0 + 1;
od = sysctl->pll0.clkod0 + 1;
break;
case SYSCTL_PLL1:
freq_in = sysctl_clock_source_get_freq(SYSCTL_SOURCE_IN0);
nr = sysctl->pll1.clkr1 + 1;
nf = sysctl->pll1.clkf1 + 1;
od = sysctl->pll1.clkod1 + 1;
nr = sysctl->pll1.clkr1 + 1;
nf = sysctl->pll1.clkf1 + 1;
od = sysctl->pll1.clkod1 + 1;
break;
case SYSCTL_PLL2:
@ -972,14 +972,14 @@ uint32_t sysctl_pll_get_freq(sysctl_pll_t pll)
* Get input freq accroding select register
*/
select = sysctl->pll2.pll_ckin_sel2;
if (select < sizeof(get_source_pll2))
if(select < sizeof(get_source_pll2))
freq_in = sysctl_clock_source_get_freq(get_source_pll2[select]);
else
return 0;
nr = sysctl->pll2.clkr2 + 1;
nf = sysctl->pll2.clkf2 + 1;
od = sysctl->pll2.clkod2 + 1;
nr = sysctl->pll2.clkr2 + 1;
nf = sysctl->pll2.clkf2 + 1;
od = sysctl->pll2.clkod2 + 1;
break;
default:
@ -998,26 +998,26 @@ static uint32_t sysctl_pll_source_set_freq(sysctl_pll_t pll, sysctl_clock_source
{
uint32_t freq_in = 0;
if (pll >= SYSCTL_PLL_MAX)
if(pll >= SYSCTL_PLL_MAX)
return 0;
if (source >= SYSCTL_SOURCE_MAX)
if(source >= SYSCTL_SOURCE_MAX)
return 0;
switch (pll)
switch(pll)
{
case SYSCTL_PLL0:
case SYSCTL_PLL1:
/*
* Check input clock source
*/
if (source != SYSCTL_SOURCE_IN0)
if(source != SYSCTL_SOURCE_IN0)
return 0;
freq_in = sysctl_clock_source_get_freq(SYSCTL_SOURCE_IN0);
/*
* Check input clock freq
*/
if (freq_in == 0)
if(freq_in == 0)
return 0;
break;
@ -1025,12 +1025,12 @@ static uint32_t sysctl_pll_source_set_freq(sysctl_pll_t pll, sysctl_clock_source
/*
* Check input clock source
*/
if (source < sizeof(get_select_pll2))
if(source < sizeof(get_select_pll2))
freq_in = sysctl_clock_source_get_freq(source);
/*
* Check input clock freq
*/
if (freq_in == 0)
if(freq_in == 0)
return 0;
break;
@ -1047,31 +1047,31 @@ static uint32_t sysctl_pll_source_set_freq(sysctl_pll_t pll, sysctl_clock_source
const double vco_max = 1.75e+09;
const double ref_min = 1.36719e+07;
const double ref_max = 1.75e+09;
const int nr_min = 1;
const int nr_max = 16;
const int nf_min = 1;
const int nf_max = 64;
const int no_min = 1;
const int no_max = 16;
const int nb_min = 1;
const int nb_max = 64;
const int max_vco = 1;
const int ref_rng = 1;
const int nr_min = 1;
const int nr_max = 16;
const int nf_min = 1;
const int nf_max = 64;
const int no_min = 1;
const int no_max = 16;
const int nb_min = 1;
const int nb_max = 64;
const int max_vco = 1;
const int ref_rng = 1;
/* variables */
int nr = 0;
int nrx = 0;
int nf = 0;
int nfi = 0;
int no = 0;
int noe = 0;
int not = 0;
int nor = 0;
int nore = 0;
int nb = 0;
int first = 0;
int nr = 0;
int nrx = 0;
int nf = 0;
int nfi = 0;
int no = 0;
int noe = 0;
int not = 0;
int nor = 0;
int nore = 0;
int nb = 0;
int first = 0;
int firstx = 0;
int found = 0;
int found = 0;
long long nfx = 0;
double fin = 0, fout = 0, fvco = 0;
@ -1080,131 +1080,130 @@ static uint32_t sysctl_pll_source_set_freq(sysctl_pll_t pll, sysctl_clock_source
long long x_nfx = 0;
double x_fvco = 0, x_err = 0;
fin = freq_in;
fout = freq;
val = fout / fin;
terr = 0.5 / ((double)(nf_max / 2));
fin = freq_in;
fout = freq;
val = fout / fin;
terr = 0.5 / ((double)(nf_max / 2));
first = firstx = 1;
if (terr != -2)
if(terr != -2)
{
first = 0;
if (terr == 0)
if(terr == 0)
terr = 1e-16;
merr = fabs(terr);
}
found = 0;
for (nfi = val; nfi < nf_max; ++nfi)
for(nfi = val; nfi < nf_max; ++nfi)
{
nr = rint(((double)nfi) / val);
if (nr == 0)
if(nr == 0)
continue;
if ((ref_rng) && (nr < nr_min))
if((ref_rng) && (nr < nr_min))
continue;
if (fin / ((double)nr) > ref_max)
if(fin / ((double)nr) > ref_max)
continue;
nrx = nr;
nf = nfx = nfi;
nval = ((double)nfx) / ((double)nr);
if (nf == 0)
if(nf == 0)
nf = 1;
err = 1 - nval / val;
if ((first) || (fabs(err) < merr * (1 + 1e-6)) || (fabs(err) < 1e-16))
if((first) || (fabs(err) < merr * (1 + 1e-6)) || (fabs(err) < 1e-16))
{
not = floor(vco_max / fout);
for (no = (not > no_max) ? no_max : not; no > no_min; --no)
for(no = (not > no_max) ? no_max : not; no > no_min; --no)
{
if ((ref_rng) && ((nr / no) < nr_min))
if((ref_rng) && ((nr / no) < nr_min))
continue;
if ((nr % no) == 0)
if((nr % no) == 0)
break;
}
if ((nr % no) != 0)
if((nr % no) != 0)
continue;
nor = ((not > no_max) ? no_max : not) / no;
nor = ((not > no_max) ? no_max : not) / no;
nore = nf_max / nf;
if (nor > nore)
if(nor > nore)
nor = nore;
noe = ceil(vco_min / fout);
if (!max_vco)
noe = ceil(vco_min / fout);
if(!max_vco)
{
nore = (noe - 1) / no + 1;
nor = nore;
not = 0; /* force next if to fail */
nor = nore;
not = 0; /* force next if to fail */
}
if ((((no * nor) < (not >> 1)) || ((no * nor) < noe)) && ((no * nor) < (nf_max / nf)))
if((((no * nor) < (not >> 1)) || ((no * nor) < noe)) && ((no * nor) < (nf_max / nf)))
{
no = nf_max / nf;
if (no > no_max)
if(no > no_max)
no = no_max;
if (no > not)
if(no > not)
no = not;
nfx *= no;
nf *= no;
if ((no > 1) && (!firstx))
if((no > 1) && (!firstx))
continue;
/* wait for larger nf in later iterations */
}
else
} else
{
nrx /= no;
nfx *= nor;
nf *= nor;
no *= nor;
if (no > no_max)
if(no > no_max)
continue;
if ((nor > 1) && (!firstx))
if((nor > 1) && (!firstx))
continue;
/* wait for larger nf in later iterations */
}
nb = nfx;
if (nb < nb_min)
if(nb < nb_min)
nb = nb_min;
if (nb > nb_max)
if(nb > nb_max)
continue;
fvco = fin / ((double)nrx) * ((double)nfx);
if (fvco < vco_min)
if(fvco < vco_min)
continue;
if (fvco > vco_max)
if(fvco > vco_max)
continue;
if (nf < nf_min)
if(nf < nf_min)
continue;
if ((ref_rng) && (fin / ((double)nrx) < ref_min))
if((ref_rng) && (fin / ((double)nrx) < ref_min))
continue;
if ((ref_rng) && (nrx > nr_max))
if((ref_rng) && (nrx > nr_max))
continue;
if (!(((firstx) && (terr < 0)) || (fabs(err) < merr * (1 - 1e-6)) || ((max_vco) && (no > x_no))))
if(!(((firstx) && (terr < 0)) || (fabs(err) < merr * (1 - 1e-6)) || ((max_vco) && (no > x_no))))
continue;
if ((!firstx) && (terr >= 0) && (nrx > x_nrx))
if((!firstx) && (terr >= 0) && (nrx > x_nrx))
continue;
found = 1;
x_no = no;
x_nrx = nrx;
x_nfx = nfx;
x_nb = nb;
found = 1;
x_no = no;
x_nrx = nrx;
x_nfx = nfx;
x_nb = nb;
x_fvco = fvco;
x_err = err;
first = firstx = 0;
merr = fabs(err);
if (terr != -1)
x_err = err;
first = firstx = 0;
merr = fabs(err);
if(terr != -1)
continue;
}
}
if (!found)
if(!found)
{
return 0;
}
nrx = x_nrx;
nfx = x_nfx;
no = x_no;
nb = x_nb;
nrx = x_nrx;
nfx = x_nfx;
no = x_no;
nb = x_nb;
fvco = x_fvco;
err = x_err;
if ((terr != -2) && (fabs(err) >= terr * (1 - 1e-6)))
err = x_err;
if((terr != -2) && (fabs(err) >= terr * (1 - 1e-6)))
{
return 0;
}
@ -1217,14 +1216,14 @@ static uint32_t sysctl_pll_source_set_freq(sysctl_pll_t pll, sysctl_clock_source
sysctl_pll1_t pll1;
sysctl_pll2_t pll2;
switch (pll)
switch(pll)
{
case SYSCTL_PLL0:
/* Read register from bus */
pll0 = sysctl->pll0;
/* Set register temporary value */
pll0.clkr0 = nrx - 1;
pll0.clkf0 = nfx - 1;
pll0.clkr0 = nrx - 1;
pll0.clkf0 = nfx - 1;
pll0.clkod0 = no - 1;
pll0.bwadj0 = nb - 1;
/* Write register back to bus */
@ -1235,8 +1234,8 @@ static uint32_t sysctl_pll_source_set_freq(sysctl_pll_t pll, sysctl_clock_source
/* Read register from bus */
pll1 = sysctl->pll1;
/* Set register temporary value */
pll1.clkr1 = nrx - 1;
pll1.clkf1 = nfx - 1;
pll1.clkr1 = nrx - 1;
pll1.clkf1 = nfx - 1;
pll1.clkod1 = no - 1;
pll1.bwadj1 = nb - 1;
/* Write register back to bus */
@ -1247,11 +1246,11 @@ static uint32_t sysctl_pll_source_set_freq(sysctl_pll_t pll, sysctl_clock_source
/* Read register from bus */
pll2 = sysctl->pll2;
/* Set register temporary value */
if (source < sizeof(get_select_pll2))
if(source < sizeof(get_select_pll2))
pll2.pll_ckin_sel2 = get_select_pll2[source];
pll2.clkr2 = nrx - 1;
pll2.clkf2 = nfx - 1;
pll2.clkr2 = nrx - 1;
pll2.clkf2 = nfx - 1;
pll2.clkod2 = no - 1;
pll2.bwadj2 = nb - 1;
/* Write register back to bus */
@ -1270,7 +1269,7 @@ uint32_t sysctl_clock_get_freq(sysctl_clock_t clock)
uint32_t source = 0;
uint32_t result = 0;
switch (clock)
switch(clock)
{
/*
* The clock IN0
@ -1301,14 +1300,14 @@ uint32_t sysctl_clock_get_freq(sysctl_clock_t clock)
* These clock directly under ACLK clock domain
*/
case SYSCTL_CLOCK_CPU:
switch (sysctl_clock_get_clock_select(SYSCTL_CLOCK_SELECT_ACLK))
switch(sysctl_clock_get_clock_select(SYSCTL_CLOCK_SELECT_ACLK))
{
case 0:
source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_IN0);
break;
case 1:
source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_PLL0) /
(2ULL << sysctl_clock_get_threshold(SYSCTL_THRESHOLD_ACLK));
(2ULL << sysctl_clock_get_threshold(SYSCTL_THRESHOLD_ACLK));
break;
default:
break;
@ -1316,14 +1315,14 @@ uint32_t sysctl_clock_get_freq(sysctl_clock_t clock)
result = source;
break;
case SYSCTL_CLOCK_DMA:
switch (sysctl_clock_get_clock_select(SYSCTL_CLOCK_SELECT_ACLK))
switch(sysctl_clock_get_clock_select(SYSCTL_CLOCK_SELECT_ACLK))
{
case 0:
source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_IN0);
break;
case 1:
source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_PLL0) /
(2ULL << sysctl_clock_get_threshold(SYSCTL_THRESHOLD_ACLK));
(2ULL << sysctl_clock_get_threshold(SYSCTL_THRESHOLD_ACLK));
break;
default:
break;
@ -1331,14 +1330,14 @@ uint32_t sysctl_clock_get_freq(sysctl_clock_t clock)
result = source;
break;
case SYSCTL_CLOCK_FFT:
switch (sysctl_clock_get_clock_select(SYSCTL_CLOCK_SELECT_ACLK))
switch(sysctl_clock_get_clock_select(SYSCTL_CLOCK_SELECT_ACLK))
{
case 0:
source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_IN0);
break;
case 1:
source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_PLL0) /
(2ULL << sysctl_clock_get_threshold(SYSCTL_THRESHOLD_ACLK));
(2ULL << sysctl_clock_get_threshold(SYSCTL_THRESHOLD_ACLK));
break;
default:
break;
@ -1346,14 +1345,14 @@ uint32_t sysctl_clock_get_freq(sysctl_clock_t clock)
result = source;
break;
case SYSCTL_CLOCK_ACLK:
switch (sysctl_clock_get_clock_select(SYSCTL_CLOCK_SELECT_ACLK))
switch(sysctl_clock_get_clock_select(SYSCTL_CLOCK_SELECT_ACLK))
{
case 0:
source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_IN0);
break;
case 1:
source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_PLL0) /
(2ULL << sysctl_clock_get_threshold(SYSCTL_THRESHOLD_ACLK));
(2ULL << sysctl_clock_get_threshold(SYSCTL_THRESHOLD_ACLK));
break;
default:
break;
@ -1361,14 +1360,14 @@ uint32_t sysctl_clock_get_freq(sysctl_clock_t clock)
result = source;
break;
case SYSCTL_CLOCK_HCLK:
switch (sysctl_clock_get_clock_select(SYSCTL_CLOCK_SELECT_ACLK))
switch(sysctl_clock_get_clock_select(SYSCTL_CLOCK_SELECT_ACLK))
{
case 0:
source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_IN0);
break;
case 1:
source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_PLL0) /
(2ULL << sysctl_clock_get_threshold(SYSCTL_THRESHOLD_ACLK));
(2ULL << sysctl_clock_get_threshold(SYSCTL_THRESHOLD_ACLK));
break;
default:
break;
@ -1487,7 +1486,7 @@ uint32_t sysctl_clock_get_freq(sysctl_clock_t clock)
* They are using even divider.
*/
case SYSCTL_CLOCK_SPI3:
switch (sysctl_clock_get_clock_select(SYSCTL_CLOCK_SELECT_SPI3))
switch(sysctl_clock_get_clock_select(SYSCTL_CLOCK_SELECT_SPI3))
{
case 0:
source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_IN0);
@ -1502,7 +1501,7 @@ uint32_t sysctl_clock_get_freq(sysctl_clock_t clock)
result = source / ((sysctl_clock_get_threshold(SYSCTL_THRESHOLD_SPI3) + 1) * 2);
break;
case SYSCTL_CLOCK_TIMER0:
switch (sysctl_clock_get_clock_select(SYSCTL_CLOCK_SELECT_TIMER0))
switch(sysctl_clock_get_clock_select(SYSCTL_CLOCK_SELECT_TIMER0))
{
case 0:
source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_IN0);
@ -1517,7 +1516,7 @@ uint32_t sysctl_clock_get_freq(sysctl_clock_t clock)
result = source / ((sysctl_clock_get_threshold(SYSCTL_THRESHOLD_TIMER0) + 1) * 2);
break;
case SYSCTL_CLOCK_TIMER1:
switch (sysctl_clock_get_clock_select(SYSCTL_CLOCK_SELECT_TIMER1))
switch(sysctl_clock_get_clock_select(SYSCTL_CLOCK_SELECT_TIMER1))
{
case 0:
source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_IN0);
@ -1532,7 +1531,7 @@ uint32_t sysctl_clock_get_freq(sysctl_clock_t clock)
result = source / ((sysctl_clock_get_threshold(SYSCTL_THRESHOLD_TIMER1) + 1) * 2);
break;
case SYSCTL_CLOCK_TIMER2:
switch (sysctl_clock_get_clock_select(SYSCTL_CLOCK_SELECT_TIMER2))
switch(sysctl_clock_get_clock_select(SYSCTL_CLOCK_SELECT_TIMER2))
{
case 0:
source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_IN0);
@ -1619,7 +1618,7 @@ int sysctl_dma_select(sysctl_dma_channel_t channel, sysctl_dma_select_t select)
/* Read register from bus */
dma_sel0 = sysctl->dma_sel0;
dma_sel1 = sysctl->dma_sel1;
switch (channel)
switch(channel)
{
case SYSCTL_DMA_CHANNEL_0:
dma_sel0.dma_sel0 = select;
@ -1674,20 +1673,20 @@ uint32_t sysctl_pll_fast_enable_pll(void)
/* PLL VCO MAX freq: 1.8GHz */
/* PLL0: 26M reference clk get 793M output clock */
pll0.clkr0 = 0;
pll0.clkf0 = 60;
pll0.clkr0 = 0;
pll0.clkf0 = 60;
pll0.clkod0 = 1;
pll0.bwadj0 = 60;
/* PLL1: 26M reference clk get 390M output clock */
pll1.clkr1 = 0;
pll1.clkf1 = 59;
pll1.clkr1 = 0;
pll1.clkf1 = 59;
pll1.clkod1 = 3;
pll1.bwadj1 = 59;
/* PLL2: 26M reference clk get 390M output clock */
pll2.clkr2 = 0;
pll2.clkf2 = 59;
pll2.clkr2 = 0;
pll2.clkf2 = 59;
pll2.clkod2 = 3;
pll2.bwadj2 = 59;
@ -1700,11 +1699,11 @@ uint32_t sysctl_pll_fast_enable_pll(void)
sysctl_pll_enable(SYSCTL_PLL1);
sysctl_pll_enable(SYSCTL_PLL2);
while (sysctl_pll_is_lock(SYSCTL_PLL0) == 0)
while(sysctl_pll_is_lock(SYSCTL_PLL0) == 0)
sysctl_pll_clear_slip(SYSCTL_PLL0);
while (sysctl_pll_is_lock(SYSCTL_PLL1) == 0)
while(sysctl_pll_is_lock(SYSCTL_PLL1) == 0)
sysctl_pll_clear_slip(SYSCTL_PLL1);
while (sysctl_pll_is_lock(SYSCTL_PLL2) == 0)
while(sysctl_pll_is_lock(SYSCTL_PLL2) == 0)
sysctl_pll_clear_slip(SYSCTL_PLL2);
sysctl_clock_enable(SYSCTL_CLOCK_PLL0);
@ -1783,7 +1782,7 @@ uint32_t sysctl_pll_set_freq(sysctl_pll_t pll, uint32_t pll_freq)
v_pll_t->pll_reset = 0;
/* 7. Get lock status, wait PLL stable */
while (sysctl_pll_is_lock(pll) == 0)
while(sysctl_pll_is_lock(pll) == 0)
sysctl_pll_clear_slip(pll);
/* 8. Enable PLL output */
@ -1843,16 +1842,13 @@ sysctl_reset_enum_status_t sysctl_get_reset_status(void)
if(sysctl->reset_status.wdt0_reset_sts)
{
s_reset_status = SYSCTL_RESET_STATUS_WDT0;
}
else if(sysctl->reset_status.wdt1_reset_sts)
} else if(sysctl->reset_status.wdt1_reset_sts)
{
s_reset_status = SYSCTL_RESET_STATUS_WDT1;
}
else if(sysctl->reset_status.soft_reset_sts)
} else if(sysctl->reset_status.soft_reset_sts)
{
s_reset_status = SYSCTL_RESET_STATUS_SOFT;
}
else
} else
{
s_reset_status = SYSCTL_RESET_STATUS_HARD;
}
@ -1860,4 +1856,3 @@ sysctl_reset_enum_status_t sysctl_get_reset_status(void)
return s_reset_status;
}

97
lib/drivers/timer.c
View File

@ -14,12 +14,12 @@
*/
#include <syslog.h>
#include "timer.h"
#include "sysctl.h"
#include "stddef.h"
#include "utils.h"
#include "plic.h"
#include "io.h"
#include "plic.h"
#include "stddef.h"
#include "sysctl.h"
#include "timer.h"
#include "utils.h"
/**
* @brief Private definitions for the timer instance
@ -34,18 +34,17 @@ typedef struct timer_instance
volatile timer_instance_t timer_instance[TIMER_DEVICE_MAX][TIMER_CHANNEL_MAX];
volatile kendryte_timer_t *const timer[3] =
{
(volatile kendryte_timer_t *)TIMER0_BASE_ADDR,
(volatile kendryte_timer_t *)TIMER1_BASE_ADDR,
(volatile kendryte_timer_t *)TIMER2_BASE_ADDR
};
{
(volatile kendryte_timer_t *)TIMER0_BASE_ADDR,
(volatile kendryte_timer_t *)TIMER1_BASE_ADDR,
(volatile kendryte_timer_t *)TIMER2_BASE_ADDR};
void timer_init(timer_device_number_t timer_number)
{
for(size_t i = 0; i < TIMER_CHANNEL_MAX; i++)
timer_instance[timer_number][i] = (const timer_instance_t) {
.callback = NULL,
.ctx = NULL,
timer_instance[timer_number][i] = (const timer_instance_t){
.callback = NULL,
.ctx = NULL,
.single_shot = 0,
};
@ -54,9 +53,7 @@ void timer_init(timer_device_number_t timer_number)
void timer_set_clock_div(timer_device_number_t timer_number, uint32_t div)
{
sysctl_clock_set_threshold(timer_number == 0 ? SYSCTL_THRESHOLD_TIMER0 :
timer_number == 1 ? SYSCTL_THRESHOLD_TIMER1 :
SYSCTL_THRESHOLD_TIMER2, div);
sysctl_clock_set_threshold(timer_number == 0 ? SYSCTL_THRESHOLD_TIMER0 : timer_number == 1 ? SYSCTL_THRESHOLD_TIMER1 : SYSCTL_THRESHOLD_TIMER2, div);
}
void timer_enable(timer_device_number_t timer_number, timer_channel_number_t channel)
@ -147,7 +144,7 @@ void timer_channel_clear_interrupt(timer_device_number_t timer_number, timer_cha
void timer_set_enable(timer_device_number_t timer_number, timer_channel_number_t channel, uint32_t enable)
{
if (enable)
if(enable)
timer[timer_number]->channel[channel].control = TIMER_CR_USER_MODE | TIMER_CR_ENABLE;
else
timer[timer_number]->channel[channel].control = TIMER_CR_INTERRUPT_MASK;
@ -164,25 +161,25 @@ size_t timer_set_interval(timer_device_number_t timer_number, timer_channel_numb
return (size_t)(min_step * value);
}
typedef void(*timer_ontick)();
timer_ontick time_irq[3][4] = { NULL };
typedef void (*timer_ontick)();
timer_ontick time_irq[3][4] = {NULL};
static int timer_isr(void *parm)
{
uint32_t timer_number;
for (timer_number = 0; timer_number < 3; timer_number++)
for(timer_number = 0; timer_number < 3; timer_number++)
{
if (parm == timer[timer_number])
if(parm == timer[timer_number])
break;
}
uint32_t channel = timer[timer_number]->intr_stat;
size_t i = 0;
for (i = 0; i < 4; i++)
for(i = 0; i < 4; i++)
{
if (channel & 1)
if(channel & 1)
{
if (time_irq[timer_number][i])
if(time_irq[timer_number][i])
(time_irq[timer_number][i])();
break;
}
@ -194,16 +191,15 @@ static int timer_isr(void *parm)
return 0;
}
void timer_set_irq(timer_device_number_t timer_number, timer_channel_number_t channel, void(*func)(), uint32_t priority)
void timer_set_irq(timer_device_number_t timer_number, timer_channel_number_t channel, void (*func)(), uint32_t priority)
{
time_irq[timer_number][channel] = func;
if (channel < 2)
if(channel < 2)
{
plic_set_priority(IRQN_TIMER0A_INTERRUPT + timer_number * 2, priority);
plic_irq_register(IRQN_TIMER0A_INTERRUPT + timer_number * 2, timer_isr, (void *)timer[timer_number]);
plic_irq_enable(IRQN_TIMER0A_INTERRUPT + timer_number * 2);
}
else
} else
{
plic_set_priority(IRQN_TIMER0B_INTERRUPT + timer_number * 2, priority);
plic_irq_register(IRQN_TIMER0B_INTERRUPT + timer_number * 2, timer_isr, (void *)timer[timer_number]);
@ -221,7 +217,8 @@ void timer_set_irq(timer_device_number_t timer_number, timer_channel_number_t ch
*/
static plic_irq_t get_timer_irqn_by_device_and_channel(timer_device_number_t device, timer_channel_number_t channel)
{
if (device < TIMER_DEVICE_MAX && channel < TIMER_CHANNEL_MAX) {
if(device < TIMER_DEVICE_MAX && channel < TIMER_CHANNEL_MAX)
{
/*
* Select timer interrupt part
* Hierarchy of Timer interrupt to PLIC
@ -256,11 +253,12 @@ static plic_irq_t get_timer_irqn_by_device_and_channel(timer_device_number_t dev
* +---------+ +-----------+
*
*/
if (channel < 2) {
if(channel < 2)
{
/* It is part A interrupt, offset + 0 */
return IRQN_TIMER0A_INTERRUPT + device * 2;
}
else {
} else
{
/* It is part B interrupt, offset + 1 */
return IRQN_TIMER0B_INTERRUPT + device * 2;
}
@ -280,16 +278,18 @@ static int timer_interrupt_handler(timer_device_number_t device, void *ctx)
{
uint32_t channel_int_stat = timer[device]->intr_stat;
for (size_t i = 0; i < TIMER_CHANNEL_MAX; i++)
for(size_t i = 0; i < TIMER_CHANNEL_MAX; i++)
{
/* Check every bit for interrupt status */
if (channel_int_stat & 1)
if(channel_int_stat & 1)
{
if (timer_instance[device][i].callback) {
if(timer_instance[device][i].callback)
{
/* Process user callback function */
timer_instance[device][i].callback(timer_instance[device][i].ctx);
/* Check if this timer is a single shot timer */
if (timer_instance[device][i].single_shot) {
if(timer_instance[device][i].single_shot)
{
/* Single shot timer, disable it */
timer_set_enable(device, i, 0);
}
@ -347,7 +347,8 @@ static int timer2_interrupt_callback(void *ctx)
int timer_irq_register(timer_device_number_t device, timer_channel_number_t channel, int is_single_shot, uint32_t priority, timer_callback_t callback, void *ctx)
{
if (device < TIMER_DEVICE_MAX && channel < TIMER_CHANNEL_MAX) {
if(device < TIMER_DEVICE_MAX && channel < TIMER_CHANNEL_MAX)
{
plic_irq_t irq_number = get_timer_irqn_by_device_and_channel(device, channel);
plic_irq_callback_t plic_irq_callback[TIMER_DEVICE_MAX] = {
timer0_interrupt_callback,
@ -355,9 +356,9 @@ int timer_irq_register(timer_device_number_t device, timer_channel_number_t chan
timer2_interrupt_callback,
};
timer_instance[device][channel] = (const timer_instance_t) {
.callback = callback,
.ctx = ctx,
timer_instance[device][channel] = (const timer_instance_t){
.callback = callback,
.ctx = ctx,
.single_shot = is_single_shot,
};
plic_set_priority(irq_number, priority);
@ -370,18 +371,20 @@ int timer_irq_register(timer_device_number_t device, timer_channel_number_t chan
int timer_irq_unregister(timer_device_number_t device, timer_channel_number_t channel)
{
if (device < TIMER_DEVICE_MAX && channel < TIMER_CHANNEL_MAX) {
timer_instance[device][channel] = (const timer_instance_t) {
.callback = NULL,
.ctx = NULL,
if(device < TIMER_DEVICE_MAX && channel < TIMER_CHANNEL_MAX)
{
timer_instance[device][channel] = (const timer_instance_t){
.callback = NULL,
.ctx = NULL,
.single_shot = 0,
};
/* Combine 0 and 1 to A interrupt, 2 and 3 to B interrupt */
if ((!(timer_instance[device][TIMER_CHANNEL_0].callback ||
if((!(timer_instance[device][TIMER_CHANNEL_0].callback ||
timer_instance[device][TIMER_CHANNEL_1].callback)) ||
(!(timer_instance[device][TIMER_CHANNEL_2].callback ||
timer_instance[device][TIMER_CHANNEL_3].callback))) {
(!(timer_instance[device][TIMER_CHANNEL_2].callback ||
timer_instance[device][TIMER_CHANNEL_3].callback)))
{
plic_irq_t irq_number = get_timer_irqn_by_device_and_channel(device, channel);
plic_irq_unregister(irq_number);
}

95
lib/drivers/uart.c
View File

@ -12,27 +12,26 @@
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include <stdlib.h>
#include <stdint.h>
#include <stdlib.h>
#include "atomic.h"
#include "plic.h"
#include "syscalls.h"
#include "sysctl.h"
#include "uart.h"
#include "utils.h"
#include "atomic.h"
#include "syscalls.h"
#define __UART_BRATE_CONST 16
#define __UART_BRATE_CONST 16
volatile uart_t* const uart[3] =
{
(volatile uart_t*)UART1_BASE_ADDR,
(volatile uart_t*)UART2_BASE_ADDR,
(volatile uart_t*)UART3_BASE_ADDR
};
volatile uart_t *const uart[3] =
{
(volatile uart_t *)UART1_BASE_ADDR,
(volatile uart_t *)UART2_BASE_ADDR,
(volatile uart_t *)UART3_BASE_ADDR};
#define UART_INTERRUPT_SEND 0x02U
#define UART_INTERRUPT_RECEIVE 0x04U
#define UART_INTERRUPT_CHARACTER_TIMEOUT 0x0CU
#define UART_INTERRUPT_SEND 0x02U
#define UART_INTERRUPT_RECEIVE 0x04U
#define UART_INTERRUPT_CHARACTER_TIMEOUT 0x0CU
typedef struct _uart_interrupt_instance
{
@ -87,8 +86,7 @@ static int uart_irq_callback(void *param)
{
if(uart_instance->uart_send_instance.callback != NULL)
uart_instance->uart_send_instance.callback(uart_instance->uart_send_instance.ctx);
}
else if(v_int_status == UART_INTERRUPT_RECEIVE || v_int_status == UART_INTERRUPT_CHARACTER_TIMEOUT)
} else if(v_int_status == UART_INTERRUPT_RECEIVE || v_int_status == UART_INTERRUPT_CHARACTER_TIMEOUT)
{
if(uart_instance->uart_receive_instance.callback != NULL)
uart_instance->uart_receive_instance.callback(uart_instance->uart_receive_instance.ctx);
@ -100,7 +98,7 @@ static uart_device_number_t s_uart_debug_channel = UART_DEVICE_3;
static int uart_channel_putc(char c, uart_device_number_t channel)
{
while (uart[channel]->LSR & (1u << 5))
while(uart[channel]->LSR & (1u << 5))
continue;
uart[channel]->THR = c;
return c & 0xff;
@ -109,7 +107,7 @@ static int uart_channel_putc(char c, uart_device_number_t channel)
static int uart_channel_getc(uart_device_number_t channel)
{
/* If received empty */
if (!(uart[channel]->LSR & 1))
if(!(uart[channel]->LSR & 1))
return EOF;
else
return (char)(uart[channel]->RBR & 0xff);
@ -140,8 +138,7 @@ void uart_debug_init(uart_device_number_t uart_channel)
{
sys_register_getchar(uart_debug_getchar);
sys_register_putchar(uart_debug_putchar);
}
else
} else
{
if(sys_getchar == NULL)
sys_register_getchar(uart_debug_getchar);
@ -175,7 +172,7 @@ static int uart_dma_callback(void *ctx)
int uart_receive_data(uart_device_number_t channel, char *buffer, size_t buf_len)
{
size_t i = 0;
for(i = 0;i < buf_len; i++)
for(i = 0; i < buf_len; i++)
{
if(uart[channel]->LSR & 1)
buffer[i] = (char)(uart[channel]->RBR & 0xff);
@ -188,11 +185,11 @@ int uart_receive_data(uart_device_number_t channel, char *buffer, size_t buf_len
void uart_receive_data_dma(uart_device_number_t uart_channel, dmac_channel_number_t dmac_channel, uint8_t *buffer, size_t buf_len)
{
uint32_t *v_recv_buf = malloc(buf_len * sizeof(uint32_t));
configASSERT(v_recv_buf!=NULL);
configASSERT(v_recv_buf != NULL);
sysctl_dma_select((sysctl_dma_channel_t)dmac_channel, SYSCTL_DMA_SELECT_UART1_RX_REQ + uart_channel * 2);
dmac_set_single_mode(dmac_channel, (void *)(&uart[uart_channel]->RBR), v_recv_buf, DMAC_ADDR_NOCHANGE, DMAC_ADDR_INCREMENT,
DMAC_MSIZE_1, DMAC_TRANS_WIDTH_32, buf_len);
DMAC_MSIZE_1, DMAC_TRANS_WIDTH_32, buf_len);
dmac_wait_done(dmac_channel);
for(uint32_t i = 0; i < buf_len; i++)
{
@ -202,11 +199,11 @@ void uart_receive_data_dma(uart_device_number_t uart_channel, dmac_channel_numbe
}
void uart_receive_data_dma_irq(uart_device_number_t uart_channel, dmac_channel_number_t dmac_channel,
uint8_t *buffer, size_t buf_len, plic_irq_callback_t uart_callback,
void *ctx, uint32_t priority)
uint8_t *buffer, size_t buf_len, plic_irq_callback_t uart_callback,
void *ctx, uint32_t priority)
{
uint32_t *v_recv_buf = malloc(buf_len * sizeof(uint32_t));
configASSERT(v_recv_buf!=NULL);
configASSERT(v_recv_buf != NULL);
uart_recv_dma_instance[uart_channel].dmac_channel = dmac_channel;
uart_recv_dma_instance[uart_channel].uart_num = uart_channel;
@ -220,13 +217,13 @@ void uart_receive_data_dma_irq(uart_device_number_t uart_channel, dmac_channel_n
dmac_irq_register(dmac_channel, uart_dma_callback, &uart_recv_dma_instance[uart_channel], priority);
sysctl_dma_select((sysctl_dma_channel_t)dmac_channel, SYSCTL_DMA_SELECT_UART1_RX_REQ + uart_channel * 2);
dmac_set_single_mode(dmac_channel, (void *)(&uart[uart_channel]->RBR), v_recv_buf, DMAC_ADDR_NOCHANGE, DMAC_ADDR_INCREMENT,
DMAC_MSIZE_1, DMAC_TRANS_WIDTH_32, buf_len);
DMAC_MSIZE_1, DMAC_TRANS_WIDTH_32, buf_len);
}
int uart_send_data(uart_device_number_t channel, const char *buffer, size_t buf_len)
{
g_write_count = 0;
while (g_write_count < buf_len)
while(g_write_count < buf_len)
{
uart_channel_putc(*buffer++, channel);
g_write_count++;
@ -237,12 +234,12 @@ int uart_send_data(uart_device_number_t channel, const char *buffer, size_t buf_
void uart_send_data_dma(uart_device_number_t uart_channel, dmac_channel_number_t dmac_channel, const uint8_t *buffer, size_t buf_len)
{
uint32_t *v_send_buf = malloc(buf_len * sizeof(uint32_t));
configASSERT(v_send_buf!=NULL);
configASSERT(v_send_buf != NULL);
for(uint32_t i = 0; i < buf_len; i++)
v_send_buf[i] = buffer[i];
sysctl_dma_select((sysctl_dma_channel_t)dmac_channel, SYSCTL_DMA_SELECT_UART1_TX_REQ + uart_channel * 2);
dmac_set_single_mode(dmac_channel, v_send_buf, (void *)(&uart[uart_channel]->THR), DMAC_ADDR_INCREMENT, DMAC_ADDR_NOCHANGE,
DMAC_MSIZE_1, DMAC_TRANS_WIDTH_32, buf_len);
DMAC_MSIZE_1, DMAC_TRANS_WIDTH_32, buf_len);
dmac_wait_done(dmac_channel);
free((void *)v_send_buf);
}
@ -252,9 +249,9 @@ void uart_send_data_dma_irq(uart_device_number_t uart_channel, dmac_channel_numb
void *ctx, uint32_t priority)
{
uint32_t *v_send_buf = malloc(buf_len * sizeof(uint32_t));
configASSERT(v_send_buf!=NULL);
configASSERT(v_send_buf != NULL);
uart_send_dma_instance[uart_channel] = (uart_dma_instance_t) {
uart_send_dma_instance[uart_channel] = (uart_dma_instance_t){
.dmac_channel = dmac_channel,
.uart_num = uart_channel,
.malloc_buffer = v_send_buf,
@ -270,25 +267,23 @@ void uart_send_data_dma_irq(uart_device_number_t uart_channel, dmac_channel_numb
dmac_irq_register(dmac_channel, uart_dma_callback, &uart_send_dma_instance[uart_channel], priority);
sysctl_dma_select((sysctl_dma_channel_t)dmac_channel, SYSCTL_DMA_SELECT_UART1_TX_REQ + uart_channel * 2);
dmac_set_single_mode(dmac_channel, v_send_buf, (void *)(&uart[uart_channel]->THR), DMAC_ADDR_INCREMENT, DMAC_ADDR_NOCHANGE,
DMAC_MSIZE_1, DMAC_TRANS_WIDTH_32, buf_len);
DMAC_MSIZE_1, DMAC_TRANS_WIDTH_32, buf_len);
}
void uart_configure(uart_device_number_t channel, uint32_t baud_rate, uart_bitwidth_t data_width, uart_stopbit_t stopbit, uart_parity_t parity)
{
configASSERT(data_width >= 5 && data_width <= 8);
if (data_width == 5)
if(data_width == 5)
{
configASSERT(stopbit != UART_STOP_2);
}
else
} else
{
configASSERT(stopbit != UART_STOP_1_5);
}
uint32_t stopbit_val = stopbit == UART_STOP_1 ? 0 : 1;
uint32_t parity_val;
switch (parity)
switch(parity)
{
case UART_PARITY_NONE:
parity_val = 0;
@ -349,8 +344,7 @@ void uart_irq_register(uart_device_number_t channel, uart_interrupt_mode_t inter
uart[channel]->IER |= 0x2;
g_uart_instance[channel].uart_send_instance.callback = uart_callback;
g_uart_instance[channel].uart_send_instance.ctx = ctx;
}
else if(interrupt_mode == UART_RECEIVE)
} else if(interrupt_mode == UART_RECEIVE)
{
uart[channel]->IER |= 0x1;
g_uart_instance[channel].uart_receive_instance.callback = uart_callback;
@ -369,8 +363,7 @@ void uart_irq_unregister(uart_device_number_t channel, uart_interrupt_mode_t int
uart[channel]->IER &= ~(0x2);
g_uart_instance[channel].uart_send_instance.callback = NULL;
g_uart_instance[channel].uart_send_instance.ctx = NULL;
}
else if(interrupt_mode == UART_RECEIVE)
} else if(interrupt_mode == UART_RECEIVE)
{
uart[channel]->IER &= ~(0x1);
g_uart_instance[channel].uart_receive_instance.callback = NULL;
@ -388,7 +381,8 @@ int uart_dma_irq(void *ctx)
dmac_irq_unregister(v_instance->dmac_channel);
if(v_instance->transfer_mode == UART_SEND)
{
while(!(uart[v_instance->uart_num]->LSR & (1u << 6)));
while(!(uart[v_instance->uart_num]->LSR & (1u << 6)))
;
}
spinlock_unlock(&v_instance->lock);
if(v_instance->uart_int_instance.callback)
@ -398,7 +392,7 @@ int uart_dma_irq(void *ctx)
return 0;
}
void uart_handle_data_dma(uart_device_number_t uart_channel ,uart_data_t data, plic_interrupt_t *cb)
void uart_handle_data_dma(uart_device_number_t uart_channel, uart_data_t data, plic_interrupt_t *cb)
{
configASSERT(uart_channel < UART_DEVICE_MAX);
if(data.transfer_mode == UART_SEND)
@ -415,15 +409,15 @@ void uart_handle_data_dma(uart_device_number_t uart_channel ,uart_data_t data, p
}
sysctl_dma_select((sysctl_dma_channel_t)data.tx_channel, SYSCTL_DMA_SELECT_UART1_TX_REQ + uart_channel * 2);
dmac_set_single_mode(data.tx_channel, data.tx_buf, (void *)(&uart[uart_channel]->THR), DMAC_ADDR_INCREMENT, DMAC_ADDR_NOCHANGE,
DMAC_MSIZE_1, DMAC_TRANS_WIDTH_32, data.tx_len);
DMAC_MSIZE_1, DMAC_TRANS_WIDTH_32, data.tx_len);
if(!cb)
{
dmac_wait_done(data.tx_channel);
while(!(uart[uart_channel]->LSR & (1u << 6)));
while(!(uart[uart_channel]->LSR & (1u << 6)))
;
spinlock_unlock(&g_uart_send_instance_dma[uart_channel].lock);
}
}
else
} else
{
configASSERT(data.rx_buf && data.rx_len && data.rx_channel < DMAC_CHANNEL_MAX);
spinlock_lock(&g_uart_recv_instance_dma[uart_channel].lock);
@ -437,7 +431,7 @@ void uart_handle_data_dma(uart_device_number_t uart_channel ,uart_data_t data, p
}
sysctl_dma_select((sysctl_dma_channel_t)data.rx_channel, SYSCTL_DMA_SELECT_UART1_RX_REQ + uart_channel * 2);
dmac_set_single_mode(data.rx_channel, (void *)(&uart[uart_channel]->RBR), data.rx_buf, DMAC_ADDR_NOCHANGE, DMAC_ADDR_INCREMENT,
DMAC_MSIZE_1, DMAC_TRANS_WIDTH_32, data.rx_len);
DMAC_MSIZE_1, DMAC_TRANS_WIDTH_32, data.rx_len);
if(!cb)
{
dmac_wait_done(data.rx_channel);
@ -518,13 +512,13 @@ void uart_set_det(uart_device_number_t uart_channel, uart_det_mode_t det_mode, s
switch(det_mode)
{
case UART_DE_ASSERTION:
det ->de_assertion_time = v_clk_cnt;
det->de_assertion_time = v_clk_cnt;
break;
case UART_DE_DE_ASSERTION:
det->de_de_assertion_time = v_clk_cnt;
break;
default:
det ->de_assertion_time = v_clk_cnt;
det->de_assertion_time = v_clk_cnt;
det->de_de_assertion_time = v_clk_cnt;
break;
}
@ -551,4 +545,3 @@ void uart_set_tat(uart_device_number_t uart_channel, uart_tat_mode_t tat_mode, s
break;
}
}

17
lib/drivers/uarths.c
View File

@ -15,9 +15,9 @@
#include <stdint.h>
#include <stdio.h>
#include "uarths.h"
#include "sysctl.h"
#include "encoding.h"
#include "sysctl.h"
#include "uarths.h"
volatile uarths_t *const uarths = (volatile uarths_t *)UARTHS_BASE_ADDR;
@ -93,7 +93,7 @@ void uarths_set_irq(uarths_interrupt_mode_t interrupt_mode, plic_irq_callback_t
int uarths_putchar(char c)
{
while (uarths->txdata.full)
while(uarths->txdata.full)
continue;
uarths->txdata.data = (uint8_t)c;
@ -105,14 +105,14 @@ int uarths_getchar(void)
/* while not empty */
uarths_rxdata_t recv = uarths->rxdata;
if (recv.empty)
if(recv.empty)
return EOF;
else
return (recv.data & 0xff);
}
/* [Deprecated] this function will remove in future */
int uarths_getc(void) __attribute__ ((weak, alias ("uarths_getchar")));
int uarths_getc(void) __attribute__((weak, alias("uarths_getchar")));
size_t uarths_receive_data(uint8_t *buf, size_t buf_len)
{
@ -131,7 +131,7 @@ size_t uarths_receive_data(uint8_t *buf, size_t buf_len)
size_t uarths_send_data(const uint8_t *buf, size_t buf_len)
{
size_t write = 0;
while (write < buf_len)
while(write < buf_len)
{
uarths_putchar(*buf++);
write++;
@ -141,8 +141,8 @@ size_t uarths_send_data(const uint8_t *buf, size_t buf_len)
int uarths_puts(const char *s)
{
while (*s)
if (uarths_putchar(*s++) != 0)
while(*s)
if(uarths_putchar(*s++) != 0)
return -1;
return 0;
}
@ -171,4 +171,3 @@ void uarths_config(uint32_t baud_rate, uarths_stopbit_t stopbit)
uarths->div.div = div;
uarths->txctrl.nstop = stopbit;
}

1
lib/drivers/utils.c
View File

@ -41,4 +41,3 @@ uint32_t get_gpio_bit(volatile uint32_t *bits, size_t offset)
{
return get_bit(bits, 1, offset);
}

24
lib/drivers/wdt.c
View File

@ -12,19 +12,18 @@
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "wdt.h"
#include "platform.h"
#include "stddef.h"
#include "utils.h"
#include "sysctl.h"
#include "plic.h"
#include "math.h"
#include "platform.h"
#include "plic.h"
#include "stddef.h"
#include "sysctl.h"
#include "utils.h"
#include "wdt.h"
volatile wdt_t *const wdt[2] =
{
(volatile wdt_t *)WDT0_BASE_ADDR,
(volatile wdt_t *)WDT1_BASE_ADDR
};
{
(volatile wdt_t *)WDT0_BASE_ADDR,
(volatile wdt_t *)WDT1_BASE_ADDR};
static void wdt_enable(wdt_device_number_t id)
{
@ -58,9 +57,9 @@ static uint8_t wdt_get_top(wdt_device_number_t id, uint64_t timeout_ms)
{
uint64_t wdt_clk = wdt_get_pclk(id);
uint64_t ret = (timeout_ms * wdt_clk / 1000) >> 16;
if (ret)
if(ret)
ret = (uint32_t)log2(ret);
if (ret > 0xf)
if(ret > 0xf)
ret = 0xf;
return (uint8_t)ret;
}
@ -112,4 +111,3 @@ void wdt_stop(wdt_device_number_t id)
{
wdt_disable(id);
}

43
lib/utils/include/syslog.h
View File

@ -17,8 +17,8 @@
#include <stdint.h>
#include <stdio.h>
#include "printf.h"
#include "encoding.h"
#include "printf.h"
#ifdef __cplusplus
extern "C" {
@ -105,7 +105,7 @@ typedef enum _kendryte_log_level
#endif /* CONFIG_LOG_COLORS */
/* clang-format on */
#define LOG_FORMAT(letter, format) LOG_COLOR_ ## letter #letter " (%lu) %s: " format LOG_RESET_COLOR "\n"
#define LOG_FORMAT(letter, format) LOG_COLOR_##letter #letter " (%lu) %s: " format LOG_RESET_COLOR "\n"
#ifdef LOG_LEVEL
#undef CONFIG_LOG_LEVEL
@ -119,23 +119,46 @@ typedef enum _kendryte_log_level
#endif
#ifdef CONFIG_LOG_ENABLE
#define LOGE(tag, format, ...) do {if (CONFIG_LOG_LEVEL >= LOG_ERROR) LOG_PRINTF(LOG_FORMAT(E, format), read_cycle(), tag, ##__VA_ARGS__); } while (0)
#define LOGW(tag, format, ...) do {if (CONFIG_LOG_LEVEL >= LOG_WARN) LOG_PRINTF(LOG_FORMAT(W, format), read_cycle(), tag, ##__VA_ARGS__); } while (0)
#define LOGI(tag, format, ...) do {if (CONFIG_LOG_LEVEL >= LOG_INFO) LOG_PRINTF(LOG_FORMAT(I, format), read_cycle(), tag, ##__VA_ARGS__); } while (0)
#define LOGD(tag, format, ...) do {if (CONFIG_LOG_LEVEL >= LOG_DEBUG) LOG_PRINTF(LOG_FORMAT(D, format), read_cycle(), tag, ##__VA_ARGS__); } while (0)
#define LOGV(tag, format, ...) do {if (CONFIG_LOG_LEVEL >= LOG_VERBOSE) LOG_PRINTF(LOG_FORMAT(V, format), read_cycle(), tag, ##__VA_ARGS__); } while (0)
#define LOGE(tag, format, ...) \
do \
{ \
if(CONFIG_LOG_LEVEL >= LOG_ERROR) \
LOG_PRINTF(LOG_FORMAT(E, format), read_cycle(), tag, ##__VA_ARGS__); \
} while(0)
#define LOGW(tag, format, ...) \
do \
{ \
if(CONFIG_LOG_LEVEL >= LOG_WARN) \
LOG_PRINTF(LOG_FORMAT(W, format), read_cycle(), tag, ##__VA_ARGS__); \
} while(0)
#define LOGI(tag, format, ...) \
do \
{ \
if(CONFIG_LOG_LEVEL >= LOG_INFO) \
LOG_PRINTF(LOG_FORMAT(I, format), read_cycle(), tag, ##__VA_ARGS__); \
} while(0)
#define LOGD(tag, format, ...) \
do \
{ \
if(CONFIG_LOG_LEVEL >= LOG_DEBUG) \
LOG_PRINTF(LOG_FORMAT(D, format), read_cycle(), tag, ##__VA_ARGS__); \
} while(0)
#define LOGV(tag, format, ...) \
do \
{ \
if(CONFIG_LOG_LEVEL >= LOG_VERBOSE) \
LOG_PRINTF(LOG_FORMAT(V, format), read_cycle(), tag, ##__VA_ARGS__); \
} while(0)
#else
#define LOGE(tag, format, ...)
#define LOGW(tag, format, ...)
#define LOGI(tag, format, ...)
#define LOGD(tag, format, ...)
#define LOGV(tag, format, ...)
#endif /* LOG_ENABLE */
#endif /* LOG_ENABLE */
#ifdef __cplusplus
}
#endif
#endif /* _SYSLOG_H */

22
scripts/reformat-all.sh Executable file
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#!/bin/bash
_CLANG_FORMAT=${CLANG_FORMAT-"clang-format"}
if ! command -v "$_CLANG_FORMAT" &>/dev/null ; then
echo "You must install clang-format and add it to your PATH." >&2
echo " See: http://releases.llvm.org/download.html" >&2
echo "Use CLANG_FORMAT=/path/to/clang-format if you do not want it in PATH. " >&2
exit 1
fi
cd "$(dirname "$(realpath "${BASH_SOURCE[0]}")")"
cd ..
DIFF_BEFORE=$(git diff | wc -l)
echo "Difference before format: $DIFF_BEFORE"
find lib -iname *.h -o -iname *.c -o -iname *.cpp -o -iname *.hpp | xargs "$_CLANG_FORMAT" -i
DIFF_AFTER=$(git diff | wc -l)
echo "Difference after format: $DIFF_AFTER (delta: $(($DIFF_BEFORE - $DIFF_AFTER)))"