create format rule and reformat
parent
e2dd551e09
commit
804a11f92d
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@ -0,0 +1,42 @@
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---
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Language: Cpp
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BasedOnStyle: LLVM
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UseTab: Never
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#AlignConsecutiveMacros: true
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AlignTrailingComments: true
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IndentWidth: 4
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TabWidth: 4
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AllowShortIfStatementsOnASingleLine: false
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IndentCaseLabels: false
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ColumnLimit: 0
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AccessModifierOffset: -4
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BreakBeforeBraces: Custom
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IncludeCategories:
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- Regex: '^<'
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Priority: 1
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- Regex: '.*'
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Priority: 50
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- Regex: '^"'
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Priority: 99
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IncludeIsMainRegex: "^$"
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IndentCaseLabels: true
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SpaceBeforeParens: Never
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BraceWrapping:
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# AfterCaseLabel: true
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AfterClass: true
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AfterControlStatement: true
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AfterEnum: true
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AfterFunction: true
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AfterNamespace: true
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AfterObjCDeclaration: true
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AfterStruct: true
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AfterUnion: true
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AfterExternBlock: false
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BeforeCatch: false
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BeforeElse: false
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IndentBraces: false
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SplitEmptyFunction: true
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SplitEmptyRecord: true
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SplitEmptyNamespace: true
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...
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@ -34,4 +34,3 @@ void __attribute__((weak)) _fini(void)
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* These don't have to do anything since we use init_array/fini_array.
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*/
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}
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@ -21,23 +21,24 @@
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#include "fpioa.h"
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#include "platform.h"
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#include "plic.h"
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#include "syscalls.h"
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#include "sysctl.h"
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#include "syslog.h"
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#include "uart.h"
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#include "syscalls.h"
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extern volatile uint64_t g_wake_up[2];
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core_instance_t core1_instance;
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volatile char * const ram = (volatile char*)RAM_BASE_ADDR;
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volatile char *const ram = (volatile char *)RAM_BASE_ADDR;
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extern char _heap_start[];
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extern char _heap_end[];
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void thread_entry(int core_id)
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{
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while (!atomic_read(&g_wake_up[core_id]));
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while(!atomic_read(&g_wake_up[core_id]))
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;
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}
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void core_enable(int core_id)
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@ -56,7 +57,7 @@ int register_core1(core_function func, void *ctx)
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return 0;
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}
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int __attribute__((weak)) os_entry(int core_id, int number_of_cores, int (*user_main)(int, char**))
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int __attribute__((weak)) os_entry(int core_id, int number_of_cores, int (*user_main)(int, char **))
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{
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/* Call main if there is no OS */
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return user_main(0, 0);
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@ -64,11 +65,11 @@ int __attribute__((weak)) os_entry(int core_id, int number_of_cores, int (*user_
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void _init_bsp(int core_id, int number_of_cores)
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{
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extern int main(int argc, char* argv[]);
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extern int main(int argc, char *argv[]);
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extern void __libc_init_array(void);
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extern void __libc_fini_array(void);
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if (core_id == 0)
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if(core_id == 0)
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{
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/* Initialize bss data to 0 */
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init_bss();
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@ -91,19 +92,18 @@ void _init_bsp(int core_id, int number_of_cores)
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}
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int ret = 0;
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if (core_id == 0)
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if(core_id == 0)
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{
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core1_instance.callback = NULL;
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core1_instance.ctx = NULL;
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ret = os_entry(core_id, number_of_cores, main);
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}
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else
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} else
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{
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plic_init();
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sysctl_enable_irq();
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thread_entry(core_id);
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if(core1_instance.callback == NULL)
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asm volatile ("wfi");
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asm volatile("wfi");
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else
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ret = core1_instance.callback(core1_instance.ctx);
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}
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@ -114,4 +114,3 @@ int pthread_setcancelstate(int __state, int *__oldstate)
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{
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return 0;
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}
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@ -20,7 +20,6 @@
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extern "C" {
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#endif
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#define SPINLOCK_INIT \
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{ \
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0 \
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@ -33,7 +32,6 @@ extern "C" {
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.core = -1 \
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}
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/* Defination of memory barrier macro */
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#define mb() \
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{ \
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@ -41,8 +39,8 @@ extern "C" {
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: "memory"); \
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}
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#define atomic_set(ptr, val) (*(volatile typeof(*(ptr))*)(ptr) = val)
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#define atomic_read(ptr) (*(volatile typeof(*(ptr))*)(ptr))
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#define atomic_set(ptr, val) (*(volatile typeof(*(ptr)) *)(ptr) = val)
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#define atomic_read(ptr) (*(volatile typeof(*(ptr)) *)(ptr))
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#ifndef __riscv_atomic
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#error "atomic extension is required."
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@ -64,7 +62,6 @@ typedef struct _semaphore
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int waiting;
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} semaphore_t;
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typedef struct _corelock
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{
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spinlock_t lock;
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@ -82,7 +79,8 @@ static inline int spinlock_trylock(spinlock_t *lock)
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static inline void spinlock_lock(spinlock_t *lock)
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{
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while (spinlock_trylock(lock));
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while(spinlock_trylock(lock))
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;
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}
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static inline void spinlock_unlock(spinlock_t *lock)
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@ -90,7 +88,7 @@ static inline void spinlock_unlock(spinlock_t *lock)
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/* Use memory barrier to keep coherency */
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mb();
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atomic_set(&lock->lock, 0);
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asm volatile ("nop");
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asm volatile("nop");
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}
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static inline void semaphore_signal(semaphore_t *semaphore, int i)
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@ -103,10 +101,10 @@ static inline void semaphore_signal(semaphore_t *semaphore, int i)
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static inline void semaphore_wait(semaphore_t *semaphore, int i)
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{
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atomic_add(&(semaphore->waiting), 1);
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while (1)
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while(1)
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{
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spinlock_lock(&(semaphore->lock));
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if (semaphore->count >= i)
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if(semaphore->count >= i)
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{
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semaphore->count -= i;
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atomic_add(&(semaphore->waiting), -1);
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@ -144,20 +142,18 @@ static inline int corelock_trylock(corelock_t *lock)
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return -1;
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}
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if (lock->count == 0)
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if(lock->count == 0)
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{
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/* First time get lock */
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lock->count++;
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lock->core = core;
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res = 0;
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}
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else if (lock->core == core)
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} else if(lock->core == core)
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{
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/* Same core get lock */
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lock->count++;
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res = 0;
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}
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else
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} else
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{
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/* Different core get lock */
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res = -1;
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@ -175,27 +171,25 @@ static inline void corelock_lock(corelock_t *lock)
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: "=r"(core));
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spinlock_lock(&lock->lock);
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if (lock->count == 0)
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if(lock->count == 0)
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{
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/* First time get lock */
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lock->count++;
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lock->core = core;
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}
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else if (lock->core == core)
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} else if(lock->core == core)
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{
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/* Same core get lock */
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lock->count++;
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}
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else
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} else
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{
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/* Different core get lock */
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spinlock_unlock(&lock->lock);
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do
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{
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while (atomic_read(&lock->count))
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while(atomic_read(&lock->count))
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;
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} while (corelock_trylock(lock));
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} while(corelock_trylock(lock));
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return;
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}
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spinlock_unlock(&lock->lock);
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: "=r"(core));
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spinlock_lock(&lock->lock);
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if (lock->core == core)
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if(lock->core == core)
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{
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/* Same core release lock */
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lock->count--;
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if (lock->count <= 0)
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if(lock->count <= 0)
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{
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lock->core = -1;
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lock->count = 0;
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}
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}
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else
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} else
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{
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/* Different core release lock */
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spinlock_unlock(&lock->lock);
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#endif
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#endif /* _BSP_ATOMIC_H */
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@ -1,9 +1,9 @@
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#ifndef _KENDRYTE_BSP_H
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#define _KENDRYTE_BSP_H
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#include "atomic.h"
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#include "entry.h"
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#include "sleep.h"
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#include "encoding.h"
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#include "syscalls.h"
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#include "entry.h"
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#include "printf.h"
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#include "sleep.h"
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#include "syscalls.h"
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#endif
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@ -102,18 +102,18 @@ dump_core(const char *reason, uintptr_t cause, uintptr_t epc, uintptr_t regs[32]
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{"ft11", "FP Temporaries Caller"},
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};
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if (CONFIG_LOG_LEVEL >= LOG_ERROR)
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if(CONFIG_LOG_LEVEL >= LOG_ERROR)
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{
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const char unknown_reason[] = "unknown";
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if (!reason)
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if(!reason)
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reason = unknown_reason;
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DUMP_PRINTF("core dump: %s\r\n", reason);
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DUMP_PRINTF("Cause 0x%016lx, EPC 0x%016lx\r\n", cause, epc);
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int i = 0;
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for (i = 0; i < 32 / 2; i++)
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for(i = 0; i < 32 / 2; i++)
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{
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DUMP_PRINTF(
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"reg[%02d](%s) = 0x%016lx, reg[%02d](%s) = 0x%016lx\r\n",
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i * 2 + 1, reg_usage[i * 2 + 1][0], regs[i * 2 + 1]);
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}
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for (i = 0; i < 32 / 2; i++)
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for(i = 0; i < 32 / 2; i++)
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{
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DUMP_PRINTF(
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"freg[%02d](%s) = 0x%016lx(%f), freg[%02d](%s) = 0x%016lx(%f)\r\n",
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@ -138,4 +138,3 @@ dump_core(const char *reason, uintptr_t cause, uintptr_t epc, uintptr_t regs[32]
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#endif
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#endif /* _BSP_DUMP_H */
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@ -46,20 +46,20 @@
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#define SSTATUS32_SD 0x80000000U
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#define SSTATUS64_SD 0x8000000000000000U
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#define DCSR_XDEBUGVER (3U<<30)
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#define DCSR_NDRESET (1U<<29)
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#define DCSR_FULLRESET (1U<<28)
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#define DCSR_EBREAKM (1U<<15)
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#define DCSR_EBREAKH (1U<<14)
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#define DCSR_EBREAKS (1U<<13)
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#define DCSR_EBREAKU (1U<<12)
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#define DCSR_STOPCYCLE (1U<<10)
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#define DCSR_STOPTIME (1U<<9)
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#define DCSR_CAUSE (7U<<6)
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#define DCSR_DEBUGINT (1U<<5)
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#define DCSR_HALT (1U<<3)
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#define DCSR_STEP (1U<<2)
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#define DCSR_PRV (3U<<0)
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#define DCSR_XDEBUGVER (3U << 30)
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#define DCSR_NDRESET (1U << 29)
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#define DCSR_FULLRESET (1U << 28)
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#define DCSR_EBREAKM (1U << 15)
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#define DCSR_EBREAKH (1U << 14)
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#define DCSR_EBREAKS (1U << 13)
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#define DCSR_EBREAKU (1U << 12)
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#define DCSR_STOPCYCLE (1U << 10)
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#define DCSR_STOPTIME (1U << 9)
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#define DCSR_CAUSE (7U << 6)
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#define DCSR_DEBUGINT (1U << 5)
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#define DCSR_HALT (1U << 3)
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#define DCSR_STEP (1U << 2)
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#define DCSR_PRV (3U << 0)
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#define DCSR_CAUSE_NONE 0
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#define DCSR_CAUSE_SWBP 1
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@ -68,18 +68,18 @@
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#define DCSR_CAUSE_STEP 4
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#define DCSR_CAUSE_HALT 5
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#define MCONTROL_SELECT (1U<<19)
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#define MCONTROL_TIMING (1U<<18)
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#define MCONTROL_ACTION (0x3fU<<12)
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#define MCONTROL_CHAIN (1U<<11)
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#define MCONTROL_MATCH (0xfU<<7)
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#define MCONTROL_M (1U<<6)
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#define MCONTROL_H (1U<<5)
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#define MCONTROL_S (1U<<4)
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#define MCONTROL_U (1U<<3)
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#define MCONTROL_EXECUTE (1U<<2)
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#define MCONTROL_STORE (1U<<1)
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#define MCONTROL_LOAD (1U<<0)
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#define MCONTROL_SELECT (1U << 19)
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#define MCONTROL_TIMING (1U << 18)
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#define MCONTROL_ACTION (0x3fU << 12)
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#define MCONTROL_CHAIN (1U << 11)
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#define MCONTROL_MATCH (0xfU << 7)
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#define MCONTROL_M (1U << 6)
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#define MCONTROL_H (1U << 5)
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#define MCONTROL_S (1U << 4)
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#define MCONTROL_U (1U << 3)
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#define MCONTROL_EXECUTE (1U << 2)
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#define MCONTROL_STORE (1U << 1)
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#define MCONTROL_LOAD (1U << 0)
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#define MCONTROL_TYPE_NONE 0
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#define MCONTROL_TYPE_MATCH 2
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|
@ -154,22 +154,22 @@
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#define PTE_PPN_SHIFT 10
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#define MCONTROL_TYPE(xlen) (0xfULL<<((xlen)-4))
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#define MCONTROL_DMODE(xlen) (1ULL<<((xlen)-5))
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#define MCONTROL_MASKMAX(xlen) (0x3fULL<<((xlen)-11))
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#define MCONTROL_TYPE(xlen) (0xfULL << ((xlen)-4))
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#define MCONTROL_DMODE(xlen) (1ULL << ((xlen)-5))
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#define MCONTROL_MASKMAX(xlen) (0x3fULL << ((xlen)-11))
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#define PTE_TABLE(PTE) (((PTE) & (PTE_V | PTE_R | PTE_W | PTE_X)) == PTE_V)
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#if defined(__riscv)
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#if defined(__riscv64)
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# define MSTATUS_SD MSTATUS64_SD
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# define SSTATUS_SD SSTATUS64_SD
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# define RISCV_PGLEVEL_BITS 9
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#define MSTATUS_SD MSTATUS64_SD
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#define SSTATUS_SD SSTATUS64_SD
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#define RISCV_PGLEVEL_BITS 9
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#else
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# define MSTATUS_SD MSTATUS32_SD
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# define SSTATUS_SD SSTATUS32_SD
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# define RISCV_PGLEVEL_BITS 10
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#define MSTATUS_SD MSTATUS32_SD
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#define SSTATUS_SD SSTATUS32_SD
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#define RISCV_PGLEVEL_BITS 10
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#endif
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#define RISCV_PGSHIFT 12
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#define RISCV_PGSIZE (1 << RISCV_PGSHIFT)
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|
@ -1323,4 +1323,3 @@ DECLARE_CAUSE("supervisor_ecall", CAUSE_SUPERVISOR_ECALL)
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DECLARE_CAUSE("hypervisor_ecall", CAUSE_HYPERVISOR_ECALL)
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DECLARE_CAUSE("machine_ecall", CAUSE_MACHINE_ECALL)
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#endif
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@ -42,7 +42,7 @@ static inline void init_lma(void)
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src = &_data_lma;
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dst = &_data;
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while (dst < &_edata)
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while(dst < &_edata)
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*dst++ = *src++;
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}
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@ -53,7 +53,7 @@ static inline void init_bss(void)
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unsigned int *dst;
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dst = &_bss;
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while (dst < &_ebss)
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while(dst < &_ebss)
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*dst++ = 0;
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}
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|
@ -78,4 +78,3 @@ static inline void init_tls(void)
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#endif
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#endif /* _BSP_ENTRY_H */
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|
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|
@ -44,4 +44,3 @@ extern "C" {
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#endif
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#endif /* _BSP_INTERRUPT_H */
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|
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|
@ -96,4 +96,3 @@ extern "C" {
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#endif
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#endif /* _BSP_PLATFORM_H */
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|
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|
@ -151,7 +151,7 @@
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extern "C" {
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#endif
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||||
typedef void (*putcf)(void*, char);
|
||||
typedef void (*putcf)(void *, char);
|
||||
|
||||
/**
|
||||
* 'tfp_format' really is the central function for all tinyprintf. For
|
||||
|
@ -189,12 +189,12 @@ void tfp_printf(char *fmt, ...) _TFP_SPECIFY_PRINTF_FMT(1, 2);
|
|||
#include <forward_list>
|
||||
namespace std
|
||||
{
|
||||
template <typename... Args>
|
||||
auto tfp_printf(Args&&... args) -> decltype(::tfp_printf(std::forward<Args>(args)...))
|
||||
{
|
||||
template <typename... Args>
|
||||
auto tfp_printf(Args &&... args) -> decltype(::tfp_printf(std::forward<Args>(args)...))
|
||||
{
|
||||
return ::tfp_printf(std::forward<Args>(args)...);
|
||||
}
|
||||
}
|
||||
} // namespace std
|
||||
#endif
|
||||
#endif
|
||||
#endif
|
||||
|
@ -206,4 +206,3 @@ int printk(const char *format, ...) _TFP_SPECIFY_PRINTF_FMT(1, 2);
|
|||
#endif
|
||||
|
||||
#endif /* _BSP_PRINTF_H */
|
||||
|
||||
|
|
|
@ -16,8 +16,8 @@
|
|||
#ifndef _BSP_SLEEP_H
|
||||
#define _BSP_SLEEP_H
|
||||
|
||||
#include "encoding.h"
|
||||
#include "clint.h"
|
||||
#include "encoding.h"
|
||||
#include "syscalls.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
|
@ -33,4 +33,3 @@ unsigned int sleep(unsigned int seconds);
|
|||
#endif
|
||||
|
||||
#endif /* _BSP_SLEEP_H */
|
||||
|
||||
|
|
|
@ -88,4 +88,3 @@ size_t get_free_heap_size(void);
|
|||
#endif
|
||||
|
||||
#endif /* _BSP_SYSCALLS_H */
|
||||
|
||||
|
|
|
@ -16,7 +16,6 @@
|
|||
#ifndef _BSP_UTIL_H
|
||||
#define _BSP_UTIL_H
|
||||
|
||||
|
||||
#include <stdint.h>
|
||||
#if defined(__riscv)
|
||||
#include "encoding.h"
|
||||
|
@ -55,15 +54,9 @@ extern "C" {
|
|||
#define PREALLOCATE 0
|
||||
#endif
|
||||
|
||||
|
||||
#define static_assert(cond) \
|
||||
{ \
|
||||
switch (0) \
|
||||
{ \
|
||||
case 0: \
|
||||
case !!(long)(cond):; \
|
||||
} \
|
||||
}
|
||||
#define static_assert(cond){ \
|
||||
switch(0){ \
|
||||
case 0 : case !!(long)(cond):; } }
|
||||
|
||||
#define stringify_1(s) #s
|
||||
#define stringify(s) stringify_1(s)
|
||||
|
@ -73,11 +66,10 @@ extern "C" {
|
|||
unsigned long _c = -read_cycle(), _i = -read_csr(minstret); \
|
||||
code; \
|
||||
_c += read_cycle(), _i += read_csr(minstret); \
|
||||
if (cid == 0) \
|
||||
if(cid == 0) \
|
||||
printf("\r\n%s: %ld cycles, %ld.%ld cycles/iter, %ld.%ld CPI\r\n", \
|
||||
stringify(code), _c, _c / iter, 10 * _c / iter % 10, _c / _i, 10 * _c / _i % 10); \
|
||||
} while (0)
|
||||
|
||||
} while(0)
|
||||
|
||||
/**
|
||||
* Set SET_STATS to 1 if you want to carve out the piece that actually
|
||||
|
@ -86,19 +78,20 @@ extern "C" {
|
|||
|
||||
#if HOST_DEBUG
|
||||
#include <stdio.h>
|
||||
static void setStats(int enable) {}
|
||||
static void setStats(int enable)
|
||||
{
|
||||
}
|
||||
#else
|
||||
extern void setStats(int enable);
|
||||
#endif
|
||||
|
||||
|
||||
static void printArray(const char name[], int n, const int arr[])
|
||||
{
|
||||
#if HOST_DEBUG
|
||||
int i;
|
||||
|
||||
printf(" %10s :", name);
|
||||
for (i = 0; i < n; i++)
|
||||
for(i = 0; i < n; i++)
|
||||
printf(" %3d ", arr[i]);
|
||||
printf("\r\n");
|
||||
#endif
|
||||
|
@ -110,7 +103,7 @@ static void printDoubleArray(const char name[], int n, const double arr[])
|
|||
int i;
|
||||
|
||||
printf(" %10s :", name);
|
||||
for (i = 0; i < n; i++)
|
||||
for(i = 0; i < n; i++)
|
||||
printf(" %g ", arr[i]);
|
||||
printf("\r\n");
|
||||
#endif
|
||||
|
@ -120,17 +113,17 @@ static int verify(int n, const volatile int *test, const int *verify)
|
|||
{
|
||||
int i;
|
||||
/* Unrolled for faster verification */
|
||||
for (i = 0; i < n / 2 * 2; i += 2)
|
||||
for(i = 0; i < n / 2 * 2; i += 2)
|
||||
{
|
||||
int t0 = test[i], t1 = test[i + 1];
|
||||
int v0 = verify[i], v1 = verify[i + 1];
|
||||
|
||||
if (t0 != v0)
|
||||
if(t0 != v0)
|
||||
return i + 1;
|
||||
if (t1 != v1)
|
||||
if(t1 != v1)
|
||||
return i + 2;
|
||||
}
|
||||
if (n % 2 != 0 && test[n - 1] != verify[n - 1])
|
||||
if(n % 2 != 0 && test[n - 1] != verify[n - 1])
|
||||
return n;
|
||||
return 0;
|
||||
}
|
||||
|
@ -139,16 +132,16 @@ static int verifyDouble(int n, const volatile double *test, const double *verify
|
|||
{
|
||||
int i;
|
||||
/* Unrolled for faster verification */
|
||||
for (i = 0; i < n / 2 * 2; i += 2)
|
||||
for(i = 0; i < n / 2 * 2; i += 2)
|
||||
{
|
||||
double t0 = test[i], t1 = test[i + 1];
|
||||
double v0 = verify[i], v1 = verify[i + 1];
|
||||
int eq1 = t0 == v0, eq2 = t1 == v1;
|
||||
|
||||
if (!(eq1 & eq2))
|
||||
if(!(eq1 & eq2))
|
||||
return i + 1 + eq1;
|
||||
}
|
||||
if (n % 2 != 0 && test[n - 1] != verify[n - 1])
|
||||
if(n % 2 != 0 && test[n - 1] != verify[n - 1])
|
||||
return n;
|
||||
return 0;
|
||||
}
|
||||
|
@ -163,14 +156,13 @@ static void __attribute__((noinline)) barrier(int ncores)
|
|||
__sync_synchronize();
|
||||
|
||||
threadsense = !threadsense;
|
||||
if (__sync_fetch_and_add(&count, 1) == ncores - 1)
|
||||
if(__sync_fetch_and_add(&count, 1) == ncores - 1)
|
||||
{
|
||||
count = 0;
|
||||
sense = threadsense;
|
||||
}
|
||||
else
|
||||
} else
|
||||
{
|
||||
while (sense != threadsense)
|
||||
while(sense != threadsense)
|
||||
;
|
||||
}
|
||||
|
||||
|
@ -184,7 +176,6 @@ static uint64_t lfsr(uint64_t x)
|
|||
return (x >> 1) | (bit << 62);
|
||||
}
|
||||
|
||||
|
||||
#if defined(__GNUC__)
|
||||
#pragma GCC diagnostic warning "-Wunused-parameter"
|
||||
#pragma GCC diagnostic warning "-Wunused-function"
|
||||
|
@ -195,4 +186,3 @@ static uint64_t lfsr(uint64_t x)
|
|||
#endif
|
||||
|
||||
#endif /* _BSP_UTIL_H */
|
||||
|
||||
|
|
|
@ -17,8 +17,8 @@
|
|||
|
||||
#include <stdint.h>
|
||||
#include <stdlib.h>
|
||||
#include "interrupt.h"
|
||||
#include "dump.h"
|
||||
#include "interrupt.h"
|
||||
#include "syscalls.h"
|
||||
#include "syslog.h"
|
||||
|
||||
|
@ -63,4 +63,3 @@ handle_irq(uintptr_t cause, uintptr_t epc, uintptr_t regs[32], uintptr_t fregs[3
|
|||
#endif
|
||||
return irq_table[cause & CAUSE_MACHINE_IRQ_REASON_MASK](cause, epc, regs, fregs);
|
||||
}
|
||||
|
||||
|
|
|
@ -1,5 +1,5 @@
|
|||
#include <sys/lock.h>
|
||||
#include <stdlib.h>
|
||||
#include <sys/lock.h>
|
||||
#include "bsp.h"
|
||||
|
||||
#define LOCK_MAX_NUM (1024)
|
||||
|
@ -37,7 +37,8 @@ static inline long lock_trylock(_lock_t *lock)
|
|||
|
||||
static inline void lock_lock(_lock_t *lock)
|
||||
{
|
||||
while (lock_trylock(lock));
|
||||
while(lock_trylock(lock))
|
||||
;
|
||||
}
|
||||
|
||||
static inline void lock_unlock(_lock_t *lock)
|
||||
|
@ -45,7 +46,7 @@ static inline void lock_unlock(_lock_t *lock)
|
|||
/* Use memory barrier to keep coherency */
|
||||
mb();
|
||||
atomic_swap(lock, 0);
|
||||
asm volatile ("nop");
|
||||
asm volatile("nop");
|
||||
}
|
||||
|
||||
static reculock_t *get_reculock(_lock_t *lock)
|
||||
|
@ -77,8 +78,7 @@ static reculock_t *reculock_init(_lock_t *lock)
|
|||
{
|
||||
return NULL;
|
||||
}
|
||||
*v_reculock = (reculock_t)
|
||||
{
|
||||
*v_reculock = (reculock_t){
|
||||
.lock = lock,
|
||||
.counter = 0,
|
||||
.core = 0,
|
||||
|
@ -92,8 +92,7 @@ static void reculock_deinit(_lock_t *lock)
|
|||
reculock_t *v_reculock = get_reculock(lock);
|
||||
if(v_reculock)
|
||||
{
|
||||
*v_reculock = (reculock_t)
|
||||
{
|
||||
*v_reculock = (reculock_t){
|
||||
.lock = NULL,
|
||||
.counter = 0,
|
||||
.core = 0,
|
||||
|
@ -125,20 +124,18 @@ static inline int reculock_trylock(_lock_t *lock)
|
|||
}
|
||||
}
|
||||
|
||||
if (v_reculock->counter == 0)
|
||||
if(v_reculock->counter == 0)
|
||||
{
|
||||
/* First time get lock */
|
||||
v_reculock->counter++;
|
||||
v_reculock->core = core;
|
||||
res = 0;
|
||||
}
|
||||
else if (v_reculock->core == core)
|
||||
} else if(v_reculock->core == core)
|
||||
{
|
||||
/* Same core get lock */
|
||||
v_reculock->counter++;
|
||||
res = 0;
|
||||
}
|
||||
else
|
||||
} else
|
||||
{
|
||||
/* Different core get lock */
|
||||
res = -1;
|
||||
|
@ -167,26 +164,24 @@ static inline void reculock_lock(_lock_t *lock)
|
|||
}
|
||||
}
|
||||
|
||||
if (v_reculock->counter == 0)
|
||||
if(v_reculock->counter == 0)
|
||||
{
|
||||
/* First time get lock */
|
||||
v_reculock->counter++;
|
||||
v_reculock->core = core;
|
||||
}
|
||||
else if (v_reculock->core == core)
|
||||
} else if(v_reculock->core == core)
|
||||
{
|
||||
/* Same core get lock */
|
||||
v_reculock->counter++;
|
||||
}
|
||||
else
|
||||
} else
|
||||
{
|
||||
/* Different core get lock */
|
||||
lock_unlock(lock);
|
||||
do
|
||||
{
|
||||
while (atomic_read(&reculock->counter))
|
||||
while(atomic_read(&reculock->counter))
|
||||
;
|
||||
} while (reculock_trylock(lock));
|
||||
} while(reculock_trylock(lock));
|
||||
return;
|
||||
}
|
||||
lock_unlock(lock);
|
||||
|
@ -207,18 +202,17 @@ static inline void reculock_unlock(_lock_t *lock)
|
|||
show_error();
|
||||
}
|
||||
|
||||
if (v_reculock->core == core)
|
||||
if(v_reculock->core == core)
|
||||
{
|
||||
/* Same core release lock */
|
||||
v_reculock->counter--;
|
||||
if (v_reculock->counter <= 0)
|
||||
if(v_reculock->counter <= 0)
|
||||
{
|
||||
v_reculock->core = 0;
|
||||
v_reculock->counter = 0;
|
||||
v_reculock->lock = NULL;
|
||||
}
|
||||
}
|
||||
else
|
||||
} else
|
||||
{
|
||||
/* Different core release lock */
|
||||
lock_unlock(lock);
|
||||
|
@ -276,4 +270,3 @@ void _lock_release_recursive(_lock_t *lock)
|
|||
{
|
||||
reculock_unlock(lock);
|
||||
}
|
||||
|
||||
|
|
157
lib/bsp/printf.c
157
lib/bsp/printf.c
|
@ -28,8 +28,8 @@
|
|||
*/
|
||||
|
||||
#include <stddef.h>
|
||||
#include "printf.h"
|
||||
#include "atomic.h"
|
||||
#include "printf.h"
|
||||
#include "syscalls.h"
|
||||
|
||||
/**
|
||||
|
@ -72,21 +72,17 @@
|
|||
#define _TFP_GCC_NO_INLINE_
|
||||
#endif
|
||||
|
||||
|
||||
#if defined(PRINTF_LONG_SUPPORT)
|
||||
#define BF_MAX 20 /* long = 64b on some architectures */
|
||||
#else
|
||||
#define BF_MAX 10 /* int = 32b on some architectures */
|
||||
#endif
|
||||
|
||||
|
||||
#define IS_DIGIT(x) ((x) >= '0' && (x) <= '9')
|
||||
|
||||
/* Clear unused warnings for actually unused variables */
|
||||
#define UNUSED(x) (void)(x)
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* Implementation
|
||||
*/
|
||||
|
@ -106,20 +102,18 @@ struct param
|
|||
|
||||
static corelock_t lock = CORELOCK_INIT;
|
||||
|
||||
|
||||
|
||||
#if defined(PRINTF_LONG_LONG_SUPPORT)
|
||||
static void _TFP_GCC_NO_INLINE_ ulli2a(unsigned long long int num, struct param *p)
|
||||
{
|
||||
unsigned long long int d = 1;
|
||||
char *bf = p->bf;
|
||||
if ((p->prec == 0) && (num == 0))
|
||||
if((p->prec == 0) && (num == 0))
|
||||
return;
|
||||
while (num / d >= p->base)
|
||||
while(num / d >= p->base)
|
||||
{
|
||||
d *= p->base;
|
||||
}
|
||||
while (d != 0)
|
||||
while(d != 0)
|
||||
{
|
||||
int dgt = num / d;
|
||||
num %= d;
|
||||
|
@ -131,7 +125,7 @@ static void _TFP_GCC_NO_INLINE_ ulli2a(unsigned long long int num, struct param
|
|||
|
||||
static void lli2a(long long int num, struct param *p)
|
||||
{
|
||||
if (num < 0)
|
||||
if(num < 0)
|
||||
{
|
||||
num = -num;
|
||||
p->sign = '-';
|
||||
|
@ -145,13 +139,13 @@ static void uli2a(unsigned long int num, struct param *p)
|
|||
{
|
||||
unsigned long int d = 1;
|
||||
char *bf = p->bf;
|
||||
if ((p->prec == 0) && (num == 0))
|
||||
if((p->prec == 0) && (num == 0))
|
||||
return;
|
||||
while (num / d >= p->base)
|
||||
while(num / d >= p->base)
|
||||
{
|
||||
d *= p->base;
|
||||
}
|
||||
while (d != 0)
|
||||
while(d != 0)
|
||||
{
|
||||
int dgt = num / d;
|
||||
num %= d;
|
||||
|
@ -163,7 +157,7 @@ static void uli2a(unsigned long int num, struct param *p)
|
|||
|
||||
static void li2a(long num, struct param *p)
|
||||
{
|
||||
if (num < 0)
|
||||
if(num < 0)
|
||||
{
|
||||
num = -num;
|
||||
p->sign = '-';
|
||||
|
@ -176,13 +170,13 @@ static void ui2a(unsigned int num, struct param *p)
|
|||
{
|
||||
unsigned int d = 1;
|
||||
char *bf = p->bf;
|
||||
if ((p->prec == 0) && (num == 0))
|
||||
if((p->prec == 0) && (num == 0))
|
||||
return;
|
||||
while (num / d >= p->base)
|
||||
while(num / d >= p->base)
|
||||
{
|
||||
d *= p->base;
|
||||
}
|
||||
while (d != 0)
|
||||
while(d != 0)
|
||||
{
|
||||
int dgt = num / d;
|
||||
num %= d;
|
||||
|
@ -194,7 +188,7 @@ static void ui2a(unsigned int num, struct param *p)
|
|||
|
||||
static void i2a(int num, struct param *p)
|
||||
{
|
||||
if (num < 0)
|
||||
if(num < 0)
|
||||
{
|
||||
num = -num;
|
||||
p->sign = '-';
|
||||
|
@ -204,11 +198,11 @@ static void i2a(int num, struct param *p)
|
|||
|
||||
static int a2d(char ch)
|
||||
{
|
||||
if (IS_DIGIT(ch))
|
||||
if(IS_DIGIT(ch))
|
||||
return ch - '0';
|
||||
else if (ch >= 'a' && ch <= 'f')
|
||||
else if(ch >= 'a' && ch <= 'f')
|
||||
return ch - 'a' + 10;
|
||||
else if (ch >= 'A' && ch <= 'F')
|
||||
else if(ch >= 'A' && ch <= 'F')
|
||||
return ch - 'A' + 10;
|
||||
else
|
||||
return -1;
|
||||
|
@ -219,9 +213,9 @@ static char a2u(char ch, const char **src, int base, unsigned int *nump)
|
|||
const char *p = *src;
|
||||
unsigned int num = 0;
|
||||
int digit;
|
||||
while ((digit = a2d(ch)) >= 0)
|
||||
while((digit = a2d(ch)) >= 0)
|
||||
{
|
||||
if (digit > base)
|
||||
if(digit > base)
|
||||
break;
|
||||
num = num * base + digit;
|
||||
ch = *p++;
|
||||
|
@ -242,54 +236,53 @@ static void putchw(void *putp, putcf putf, struct param *p)
|
|||
/* Number of filling characters */
|
||||
width -= bf_len;
|
||||
prec -= bf_len;
|
||||
if (p->sign)
|
||||
if(p->sign)
|
||||
width--;
|
||||
if (p->alt && p->base == 16)
|
||||
if(p->alt && p->base == 16)
|
||||
width -= 2;
|
||||
else if (p->alt && p->base == 8)
|
||||
else if(p->alt && p->base == 8)
|
||||
width--;
|
||||
if (prec > 0)
|
||||
if(prec > 0)
|
||||
width -= prec;
|
||||
|
||||
/* Fill with space to align to the right, before alternate or sign */
|
||||
if (!p->lz && !p->align_left)
|
||||
if(!p->lz && !p->align_left)
|
||||
{
|
||||
while (width-- > 0)
|
||||
while(width-- > 0)
|
||||
putf(putp, ' ');
|
||||
}
|
||||
|
||||
/* print sign */
|
||||
if (p->sign)
|
||||
if(p->sign)
|
||||
putf(putp, p->sign);
|
||||
|
||||
/* Alternate */
|
||||
if (p->alt && p->base == 16)
|
||||
if(p->alt && p->base == 16)
|
||||
{
|
||||
putf(putp, '0');
|
||||
putf(putp, (p->uc ? 'X' : 'x'));
|
||||
}
|
||||
else if (p->alt && p->base == 8)
|
||||
} else if(p->alt && p->base == 8)
|
||||
{
|
||||
putf(putp, '0');
|
||||
}
|
||||
|
||||
/* Fill with zeros, after alternate or sign */
|
||||
while (prec-- > 0)
|
||||
while(prec-- > 0)
|
||||
putf(putp, '0');
|
||||
if (p->lz)
|
||||
if(p->lz)
|
||||
{
|
||||
while (width-- > 0)
|
||||
while(width-- > 0)
|
||||
putf(putp, '0');
|
||||
}
|
||||
|
||||
/* Put actual buffer */
|
||||
while ((bf_len-- > 0) && (ch = *bf++))
|
||||
while((bf_len-- > 0) && (ch = *bf++))
|
||||
putf(putp, ch);
|
||||
|
||||
/* Fill with space to align to the left, after string */
|
||||
if (!p->lz && p->align_left)
|
||||
if(!p->lz && p->align_left)
|
||||
{
|
||||
while (width-- > 0)
|
||||
while(width-- > 0)
|
||||
putf(putp, ' ');
|
||||
}
|
||||
}
|
||||
|
@ -300,13 +293,12 @@ void tfp_format(void *putp, putcf putf, const char *fmt, va_list va)
|
|||
char bf[BF_MAX];
|
||||
char ch;
|
||||
|
||||
while ((ch = *(fmt++)))
|
||||
while((ch = *(fmt++)))
|
||||
{
|
||||
if (ch != '%')
|
||||
if(ch != '%')
|
||||
{
|
||||
putf(putp, ch);
|
||||
}
|
||||
else
|
||||
} else
|
||||
{
|
||||
#if defined(PRINTF_LONG_SUPPORT)
|
||||
char lng = 0; /* 1 for long, 2 for long long */
|
||||
|
@ -323,9 +315,9 @@ void tfp_format(void *putp, putcf putf, const char *fmt, va_list va)
|
|||
p.bf_len = 0;
|
||||
|
||||
/* Flags */
|
||||
while ((ch = *(fmt++)))
|
||||
while((ch = *(fmt++)))
|
||||
{
|
||||
switch (ch)
|
||||
switch(ch)
|
||||
{
|
||||
case '-':
|
||||
p.align_left = 1;
|
||||
|
@ -342,21 +334,20 @@ void tfp_format(void *putp, putcf putf, const char *fmt, va_list va)
|
|||
break;
|
||||
}
|
||||
|
||||
if (p.align_left)
|
||||
if(p.align_left)
|
||||
p.lz = 0;
|
||||
|
||||
/* Width */
|
||||
if (ch == '*')
|
||||
if(ch == '*')
|
||||
{
|
||||
ch = *(fmt++);
|
||||
p.width = va_arg(va, int);
|
||||
if (p.width < 0)
|
||||
if(p.width < 0)
|
||||
{
|
||||
p.align_left = 1;
|
||||
p.width = -p.width;
|
||||
}
|
||||
}
|
||||
else if (IS_DIGIT(ch))
|
||||
} else if(IS_DIGIT(ch))
|
||||
{
|
||||
unsigned int width;
|
||||
ch = a2u(ch, &fmt, 10, &(width));
|
||||
|
@ -364,59 +355,56 @@ void tfp_format(void *putp, putcf putf, const char *fmt, va_list va)
|
|||
}
|
||||
|
||||
/* Precision */
|
||||
if (ch == '.')
|
||||
if(ch == '.')
|
||||
{
|
||||
ch = *(fmt++);
|
||||
if (ch == '*')
|
||||
if(ch == '*')
|
||||
{
|
||||
int prec;
|
||||
ch = *(fmt++);
|
||||
prec = va_arg(va, int);
|
||||
if (prec < 0)
|
||||
if(prec < 0)
|
||||
/* act as if precision was
|
||||
* omitted */
|
||||
p.prec = -1;
|
||||
else
|
||||
p.prec = prec;
|
||||
}
|
||||
else if (IS_DIGIT(ch))
|
||||
} else if(IS_DIGIT(ch))
|
||||
{
|
||||
unsigned int prec;
|
||||
ch = a2u(ch, &fmt, 10, &(prec));
|
||||
p.prec = prec;
|
||||
}
|
||||
else
|
||||
} else
|
||||
{
|
||||
p.prec = 0;
|
||||
}
|
||||
}
|
||||
if (p.prec >= 0)
|
||||
if(p.prec >= 0)
|
||||
/* precision causes zero pad to be ignored */
|
||||
p.lz = 0;
|
||||
|
||||
#if defined(PRINTF_SIZE_T_SUPPORT)
|
||||
#if defined(PRINTF_LONG_SUPPORT)
|
||||
if (ch == 'z')
|
||||
if(ch == 'z')
|
||||
{
|
||||
ch = *(fmt++);
|
||||
if (sizeof(size_t) == sizeof(unsigned long int))
|
||||
if(sizeof(size_t) == sizeof(unsigned long int))
|
||||
lng = 1;
|
||||
#if defined(PRINTF_LONG_LONG_SUPPORT)
|
||||
else if (sizeof(size_t) == sizeof(unsigned long long int))
|
||||
else if(sizeof(size_t) == sizeof(unsigned long long int))
|
||||
lng = 2;
|
||||
#endif
|
||||
}
|
||||
else
|
||||
} else
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#if defined(PRINTF_LONG_SUPPORT)
|
||||
if (ch == 'l')
|
||||
if(ch == 'l')
|
||||
{
|
||||
ch = *(fmt++);
|
||||
lng = 1;
|
||||
#if defined(PRINTF_LONG_LONG_SUPPORT)
|
||||
if (ch == 'l')
|
||||
if(ch == 'l')
|
||||
{
|
||||
ch = *(fmt++);
|
||||
lng = 2;
|
||||
|
@ -424,21 +412,21 @@ void tfp_format(void *putp, putcf putf, const char *fmt, va_list va)
|
|||
#endif
|
||||
}
|
||||
#endif
|
||||
switch (ch)
|
||||
switch(ch)
|
||||
{
|
||||
case 0:
|
||||
goto abort;
|
||||
case 'u':
|
||||
p.base = 10;
|
||||
if (p.prec < 0)
|
||||
if(p.prec < 0)
|
||||
p.prec = 1;
|
||||
#if defined(PRINTF_LONG_SUPPORT)
|
||||
#if defined(PRINTF_LONG_LONG_SUPPORT)
|
||||
if (2 == lng)
|
||||
if(2 == lng)
|
||||
ulli2a(va_arg(va, unsigned long long int), &p);
|
||||
else
|
||||
#endif
|
||||
if (1 == lng)
|
||||
if(1 == lng)
|
||||
uli2a(va_arg(va, unsigned long int), &p);
|
||||
else
|
||||
#endif
|
||||
|
@ -448,15 +436,15 @@ void tfp_format(void *putp, putcf putf, const char *fmt, va_list va)
|
|||
case 'd': /* No break */
|
||||
case 'i':
|
||||
p.base = 10;
|
||||
if (p.prec < 0)
|
||||
if(p.prec < 0)
|
||||
p.prec = 1;
|
||||
#if defined(PRINTF_LONG_SUPPORT)
|
||||
#if defined(PRINTF_LONG_LONG_SUPPORT)
|
||||
if (2 == lng)
|
||||
if(2 == lng)
|
||||
lli2a(va_arg(va, long long int), &p);
|
||||
else
|
||||
#endif
|
||||
if (1 == lng)
|
||||
if(1 == lng)
|
||||
li2a(va_arg(va, long int), &p);
|
||||
else
|
||||
#endif
|
||||
|
@ -479,15 +467,15 @@ void tfp_format(void *putp, putcf putf, const char *fmt, va_list va)
|
|||
case 'X':
|
||||
p.base = 16;
|
||||
p.uc = (ch == 'X') ? 1 : 0;
|
||||
if (p.prec < 0)
|
||||
if(p.prec < 0)
|
||||
p.prec = 1;
|
||||
#if defined(PRINTF_LONG_SUPPORT)
|
||||
#if defined(PRINTF_LONG_LONG_SUPPORT)
|
||||
if (2 == lng)
|
||||
if(2 == lng)
|
||||
ulli2a(va_arg(va, unsigned long long int), &p);
|
||||
else
|
||||
#endif
|
||||
if (1 == lng)
|
||||
if(1 == lng)
|
||||
uli2a(va_arg(va, unsigned long int), &p);
|
||||
else
|
||||
#endif
|
||||
|
@ -496,7 +484,7 @@ void tfp_format(void *putp, putcf putf, const char *fmt, va_list va)
|
|||
break;
|
||||
case 'o':
|
||||
p.base = 8;
|
||||
if (p.prec < 0)
|
||||
if(p.prec < 0)
|
||||
p.prec = 1;
|
||||
ui2a(va_arg(va, unsigned int), &p);
|
||||
putchw(putp, putf, &p);
|
||||
|
@ -508,9 +496,9 @@ void tfp_format(void *putp, putcf putf, const char *fmt, va_list va)
|
|||
{
|
||||
unsigned int prec = p.prec;
|
||||
char *b;
|
||||
p.bf = va_arg(va, char*);
|
||||
p.bf = va_arg(va, char *);
|
||||
b = p.bf;
|
||||
while ((prec-- != 0) && *b++)
|
||||
while((prec-- != 0) && *b++)
|
||||
{
|
||||
p.bf_len++;
|
||||
}
|
||||
|
@ -558,8 +546,8 @@ struct _vsnprintf_putcf_data
|
|||
|
||||
static void _vsnprintf_putcf(void *p, char c)
|
||||
{
|
||||
struct _vsnprintf_putcf_data *data = (struct _vsnprintf_putcf_data*)p;
|
||||
if (data->num_chars < data->dest_capacity)
|
||||
struct _vsnprintf_putcf_data *data = (struct _vsnprintf_putcf_data *)p;
|
||||
if(data->num_chars < data->dest_capacity)
|
||||
data->dest[data->num_chars] = c;
|
||||
data->num_chars++;
|
||||
}
|
||||
|
@ -568,7 +556,7 @@ int tfp_vsnprintf(char *str, size_t size, const char *format, va_list ap)
|
|||
{
|
||||
struct _vsnprintf_putcf_data data;
|
||||
|
||||
if (size < 1)
|
||||
if(size < 1)
|
||||
return 0;
|
||||
|
||||
data.dest = str;
|
||||
|
@ -576,7 +564,7 @@ int tfp_vsnprintf(char *str, size_t size, const char *format, va_list ap)
|
|||
data.num_chars = 0;
|
||||
tfp_format(&data, _vsnprintf_putcf, format, ap);
|
||||
|
||||
if (data.num_chars < data.dest_capacity)
|
||||
if(data.num_chars < data.dest_capacity)
|
||||
data.dest[data.num_chars] = '\0';
|
||||
else
|
||||
data.dest[data.dest_capacity] = '\0';
|
||||
|
@ -603,7 +591,7 @@ struct _vsprintf_putcf_data
|
|||
|
||||
static void _vsprintf_putcf(void *p, char c)
|
||||
{
|
||||
struct _vsprintf_putcf_data *data = (struct _vsprintf_putcf_data*)p;
|
||||
struct _vsprintf_putcf_data *data = (struct _vsprintf_putcf_data *)p;
|
||||
data->dest[data->num_chars++] = c;
|
||||
}
|
||||
|
||||
|
@ -650,4 +638,3 @@ int printk(const char *format, ...)
|
|||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
@ -19,7 +19,7 @@ int usleep(uint64_t usec)
|
|||
{
|
||||
uint64_t cycle = read_cycle();
|
||||
uint64_t nop_all = usec * sysctl_clock_get_freq(SYSCTL_CLOCK_CPU) / 1000000UL;
|
||||
while (1)
|
||||
while(1)
|
||||
{
|
||||
if(read_cycle() - cycle >= nop_all)
|
||||
break;
|
||||
|
@ -36,4 +36,3 @@ unsigned int sleep(unsigned int seconds)
|
|||
{
|
||||
return (unsigned int)msleep(seconds * 1000);
|
||||
}
|
||||
|
||||
|
|
|
@ -15,27 +15,27 @@
|
|||
|
||||
/* Enable kernel-mode log API */
|
||||
|
||||
#include <sys/stat.h>
|
||||
#include <sys/time.h>
|
||||
#include <sys/unistd.h>
|
||||
#include <machine/syscall.h>
|
||||
#include <stdbool.h>
|
||||
#include <errno.h>
|
||||
#include <limits.h>
|
||||
#include <machine/syscall.h>
|
||||
#include <stdarg.h>
|
||||
#include <stdbool.h>
|
||||
#include <stdint.h>
|
||||
#include <stdio.h>
|
||||
#include <stdlib.h>
|
||||
#include <string.h>
|
||||
#include "syscalls.h"
|
||||
#include <sys/stat.h>
|
||||
#include <sys/time.h>
|
||||
#include <sys/unistd.h>
|
||||
#include "atomic.h"
|
||||
#include "clint.h"
|
||||
#include "dump.h"
|
||||
#include "fpioa.h"
|
||||
#include "interrupt.h"
|
||||
#include "syscalls.h"
|
||||
#include "sysctl.h"
|
||||
#include "util.h"
|
||||
#include "syslog.h"
|
||||
#include "dump.h"
|
||||
#include "util.h"
|
||||
|
||||
/**
|
||||
* @note System call list
|
||||
|
@ -113,8 +113,8 @@ void sys_register_getchar(sys_getchar_t getchar)
|
|||
|
||||
void sys_stdin_flush(void)
|
||||
{
|
||||
if (sys_getchar)
|
||||
while (sys_getchar() != EOF)
|
||||
if(sys_getchar)
|
||||
while(sys_getchar() != EOF)
|
||||
continue;
|
||||
}
|
||||
|
||||
|
@ -124,7 +124,7 @@ void __attribute__((noreturn)) sys_exit(int code)
|
|||
unsigned long core_id = current_coreid();
|
||||
/* First print some diagnostic information. */
|
||||
LOGW(TAG, "sys_exit called by core %ld with 0x%lx\r\n", core_id, (uint64_t)code);
|
||||
while (1)
|
||||
while(1)
|
||||
continue;
|
||||
}
|
||||
|
||||
|
@ -135,7 +135,7 @@ static int sys_nosys(long a0, long a1, long a2, long a3, long a4, long a5, unsig
|
|||
UNUSED(a5);
|
||||
|
||||
LOGE(TAG, "Unsupported syscall %ld: a0=%lx, a1=%lx, a2=%lx!\r\n", n, a0, a1, a2);
|
||||
while (1)
|
||||
while(1)
|
||||
continue;
|
||||
return -ENOSYS;
|
||||
}
|
||||
|
@ -174,24 +174,22 @@ static size_t sys_brk(size_t pos)
|
|||
* Otherwise throw out of memory error, return -1.
|
||||
*/
|
||||
|
||||
if (pos)
|
||||
if(pos)
|
||||
{
|
||||
/* Call again */
|
||||
if ((uintptr_t)pos > (uintptr_t)&_heap_end[0])
|
||||
if((uintptr_t)pos > (uintptr_t)&_heap_end[0])
|
||||
{
|
||||
/* Memory out, return -ENOMEM */
|
||||
LOGE(TAG, "Out of memory\r\n");
|
||||
res = -ENOMEM;
|
||||
}
|
||||
else
|
||||
} else
|
||||
{
|
||||
/* Adjust brk pointer. */
|
||||
_heap_cur = (char *)(uintptr_t)pos;
|
||||
/* Return current address. */
|
||||
res = (uintptr_t)_heap_cur;
|
||||
}
|
||||
}
|
||||
else
|
||||
} else
|
||||
{
|
||||
/* First call, return initial address */
|
||||
res = (uintptr_t)&_heap_start[0];
|
||||
|
@ -217,18 +215,18 @@ static ssize_t sys_write(int file, const void *ptr, size_t len)
|
|||
/* Get data pointer */
|
||||
register char *data = (char *)ptr;
|
||||
|
||||
if (STDOUT_FILENO == file || STDERR_FILENO == file)
|
||||
if(STDOUT_FILENO == file || STDERR_FILENO == file)
|
||||
{
|
||||
/* Write data */
|
||||
while (length-- > 0 && data != NULL) {
|
||||
if (sys_putchar)
|
||||
while(length-- > 0 && data != NULL)
|
||||
{
|
||||
if(sys_putchar)
|
||||
sys_putchar(*(data++));
|
||||
}
|
||||
|
||||
/* Return the actual size written */
|
||||
res = len;
|
||||
}
|
||||
else
|
||||
} else
|
||||
{
|
||||
/* Not support yet */
|
||||
res = -ENOSYS;
|
||||
|
@ -257,37 +255,40 @@ static ssize_t sys_read(int file, void *ptr, size_t len)
|
|||
/* Actual size to read */
|
||||
register size_t actual_length = 0;
|
||||
|
||||
if (STDIN_FILENO == file)
|
||||
if(STDIN_FILENO == file)
|
||||
{
|
||||
/* Read data */
|
||||
actual_length = 0;
|
||||
while (length-- > 0 && data != NULL) {
|
||||
if (sys_getchar) {
|
||||
while(length-- > 0 && data != NULL)
|
||||
{
|
||||
if(sys_getchar)
|
||||
{
|
||||
int getchar_result = sys_getchar();
|
||||
/* Get char until not EOF */
|
||||
while (getchar_result == EOF)
|
||||
while(getchar_result == EOF)
|
||||
getchar_result = sys_getchar();
|
||||
if (getchar_result != EOF) {
|
||||
if(getchar_result != EOF)
|
||||
{
|
||||
/* Not EOF, read data to buffer */
|
||||
*(data++) = (char)getchar_result;
|
||||
actual_length++;
|
||||
/* Echo back this char to user */
|
||||
if (sys_putchar)
|
||||
if(sys_putchar)
|
||||
sys_putchar((char)getchar_result);
|
||||
/* User press RETURN, break. This is the last step in stdin */
|
||||
if ((char)getchar_result == '\r')
|
||||
if((char)getchar_result == '\r')
|
||||
break;
|
||||
if ((char)getchar_result == '\n')
|
||||
if((char)getchar_result == '\n')
|
||||
break;
|
||||
} else {
|
||||
} else
|
||||
{
|
||||
/* EOF, do nothing */
|
||||
}
|
||||
}
|
||||
}
|
||||
/* Return the actual size read */
|
||||
res = actual_length;
|
||||
}
|
||||
else
|
||||
} else
|
||||
{
|
||||
/* Not support yet */
|
||||
res = -ENOSYS;
|
||||
|
@ -315,7 +316,7 @@ static int sys_fstat(int file, struct stat *st)
|
|||
|
||||
UNUSED(file);
|
||||
|
||||
if (st != NULL)
|
||||
if(st != NULL)
|
||||
memset(st, 0, sizeof(struct stat));
|
||||
/* Return the result */
|
||||
res = -ENOSYS;
|
||||
|
@ -364,7 +365,7 @@ static int sys_gettimeofday(struct timeval *tp, void *tzp)
|
|||
*/
|
||||
UNUSED(tzp);
|
||||
|
||||
if (tp != NULL)
|
||||
if(tp != NULL)
|
||||
{
|
||||
uint64_t clint_usec = clint->mtime / (sysctl_clock_get_freq(SYSCTL_CLOCK_CPU) / CLINT_CLOCK_DIV / 1000000UL);
|
||||
|
||||
|
@ -394,7 +395,7 @@ handle_ecall(uintptr_t cause, uintptr_t epc, uintptr_t regs[32], uintptr_t fregs
|
|||
SYS_ID_MAX
|
||||
};
|
||||
|
||||
static uintptr_t (* const syscall_table[])(long a0, long a1, long a2, long a3, long a4, long a5, unsigned long n) =
|
||||
static uintptr_t (*const syscall_table[])(long a0, long a1, long a2, long a3, long a4, long a5, unsigned long n) =
|
||||
{
|
||||
[SYS_ID_NOSYS] = (void *)sys_nosys,
|
||||
[SYS_ID_SUCCESS] = (void *)sys_success,
|
||||
|
@ -413,54 +414,94 @@ handle_ecall(uintptr_t cause, uintptr_t epc, uintptr_t regs[32], uintptr_t fregs
|
|||
static const uint8_t syscall_id_table[0x100] =
|
||||
{
|
||||
[0x00 ... 0xFF] = SYS_ID_NOSYS,
|
||||
[0xFF & SYS_exit] = SYS_ID_EXIT,
|
||||
[0xFF & SYS_exit_group] = SYS_ID_EXIT,
|
||||
[0xFF & SYS_getpid] = SYS_ID_NOSYS,
|
||||
[0xFF & SYS_kill] = SYS_ID_NOSYS,
|
||||
[0xFF & SYS_read] = SYS_ID_READ,
|
||||
[0xFF & SYS_write] = SYS_ID_WRITE,
|
||||
[0xFF & SYS_open] = SYS_ID_NOSYS,
|
||||
[0xFF & SYS_openat] = SYS_ID_NOSYS,
|
||||
[0xFF & SYS_close] = SYS_ID_CLOSE,
|
||||
[0xFF & SYS_lseek] = SYS_ID_NOSYS,
|
||||
[0xFF & SYS_brk] = SYS_ID_BRK,
|
||||
[0xFF & SYS_link] = SYS_ID_NOSYS,
|
||||
[0xFF & SYS_unlink] = SYS_ID_NOSYS,
|
||||
[0xFF & SYS_mkdir] = SYS_ID_NOSYS,
|
||||
[0xFF & SYS_chdir] = SYS_ID_NOSYS,
|
||||
[0xFF & SYS_getcwd] = SYS_ID_NOSYS,
|
||||
[0xFF & SYS_stat] = SYS_ID_NOSYS,
|
||||
[0xFF & SYS_fstat] = SYS_ID_FSTAT,
|
||||
[0xFF & SYS_lstat] = SYS_ID_NOSYS,
|
||||
[0xFF & SYS_fstatat] = SYS_ID_NOSYS,
|
||||
[0xFF & SYS_access] = SYS_ID_NOSYS,
|
||||
[0xFF & SYS_faccessat] = SYS_ID_NOSYS,
|
||||
[0xFF & SYS_pread] = SYS_ID_NOSYS,
|
||||
[0xFF & SYS_pwrite] = SYS_ID_NOSYS,
|
||||
[0xFF & SYS_uname] = SYS_ID_NOSYS,
|
||||
[0xFF & SYS_getuid] = SYS_ID_NOSYS,
|
||||
[0xFF & SYS_geteuid] = SYS_ID_NOSYS,
|
||||
[0xFF & SYS_getgid] = SYS_ID_NOSYS,
|
||||
[0xFF & SYS_getegid] = SYS_ID_NOSYS,
|
||||
[0xFF & SYS_mmap] = SYS_ID_NOSYS,
|
||||
[0xFF & SYS_munmap] = SYS_ID_NOSYS,
|
||||
[0xFF & SYS_mremap] = SYS_ID_NOSYS,
|
||||
[0xFF & SYS_time] = SYS_ID_NOSYS,
|
||||
[0xFF & SYS_getmainvars] = SYS_ID_NOSYS,
|
||||
[0xFF & SYS_rt_sigaction] = SYS_ID_NOSYS,
|
||||
[0xFF & SYS_writev] = SYS_ID_NOSYS,
|
||||
[0xFF & SYS_gettimeofday] = SYS_ID_GETTIMEOFDAY,
|
||||
[0xFF & SYS_times] = SYS_ID_NOSYS,
|
||||
[0xFF & SYS_fcntl] = SYS_ID_NOSYS,
|
||||
[0xFF & SYS_getdents] = SYS_ID_NOSYS,
|
||||
[0xFF & SYS_dup] = SYS_ID_NOSYS,
|
||||
[0xFF &
|
||||
SYS_exit] = SYS_ID_EXIT,
|
||||
[0xFF &
|
||||
SYS_exit_group] = SYS_ID_EXIT,
|
||||
[0xFF &
|
||||
SYS_getpid] = SYS_ID_NOSYS,
|
||||
[0xFF &
|
||||
SYS_kill] = SYS_ID_NOSYS,
|
||||
[0xFF &
|
||||
SYS_read] = SYS_ID_READ,
|
||||
[0xFF &
|
||||
SYS_write] = SYS_ID_WRITE,
|
||||
[0xFF &
|
||||
SYS_open] = SYS_ID_NOSYS,
|
||||
[0xFF &
|
||||
SYS_openat] = SYS_ID_NOSYS,
|
||||
[0xFF &
|
||||
SYS_close] = SYS_ID_CLOSE,
|
||||
[0xFF &
|
||||
SYS_lseek] = SYS_ID_NOSYS,
|
||||
[0xFF &
|
||||
SYS_brk] = SYS_ID_BRK,
|
||||
[0xFF &
|
||||
SYS_link] = SYS_ID_NOSYS,
|
||||
[0xFF &
|
||||
SYS_unlink] = SYS_ID_NOSYS,
|
||||
[0xFF &
|
||||
SYS_mkdir] = SYS_ID_NOSYS,
|
||||
[0xFF &
|
||||
SYS_chdir] = SYS_ID_NOSYS,
|
||||
[0xFF &
|
||||
SYS_getcwd] = SYS_ID_NOSYS,
|
||||
[0xFF &
|
||||
SYS_stat] = SYS_ID_NOSYS,
|
||||
[0xFF &
|
||||
SYS_fstat] = SYS_ID_FSTAT,
|
||||
[0xFF &
|
||||
SYS_lstat] = SYS_ID_NOSYS,
|
||||
[0xFF &
|
||||
SYS_fstatat] = SYS_ID_NOSYS,
|
||||
[0xFF &
|
||||
SYS_access] = SYS_ID_NOSYS,
|
||||
[0xFF &
|
||||
SYS_faccessat] = SYS_ID_NOSYS,
|
||||
[0xFF &
|
||||
SYS_pread] = SYS_ID_NOSYS,
|
||||
[0xFF &
|
||||
SYS_pwrite] = SYS_ID_NOSYS,
|
||||
[0xFF &
|
||||
SYS_uname] = SYS_ID_NOSYS,
|
||||
[0xFF &
|
||||
SYS_getuid] = SYS_ID_NOSYS,
|
||||
[0xFF &
|
||||
SYS_geteuid] = SYS_ID_NOSYS,
|
||||
[0xFF &
|
||||
SYS_getgid] = SYS_ID_NOSYS,
|
||||
[0xFF &
|
||||
SYS_getegid] = SYS_ID_NOSYS,
|
||||
[0xFF &
|
||||
SYS_mmap] = SYS_ID_NOSYS,
|
||||
[0xFF &
|
||||
SYS_munmap] = SYS_ID_NOSYS,
|
||||
[0xFF &
|
||||
SYS_mremap] = SYS_ID_NOSYS,
|
||||
[0xFF &
|
||||
SYS_time] = SYS_ID_NOSYS,
|
||||
[0xFF &
|
||||
SYS_getmainvars] = SYS_ID_NOSYS,
|
||||
[0xFF &
|
||||
SYS_rt_sigaction] = SYS_ID_NOSYS,
|
||||
[0xFF &
|
||||
SYS_writev] = SYS_ID_NOSYS,
|
||||
[0xFF &
|
||||
SYS_gettimeofday] = SYS_ID_GETTIMEOFDAY,
|
||||
[0xFF &
|
||||
SYS_times] = SYS_ID_NOSYS,
|
||||
[0xFF &
|
||||
SYS_fcntl] = SYS_ID_NOSYS,
|
||||
[0xFF &
|
||||
SYS_getdents] = SYS_ID_NOSYS,
|
||||
[0xFF &
|
||||
SYS_dup] = SYS_ID_NOSYS,
|
||||
};
|
||||
#if defined(__GNUC__)
|
||||
#pragma GCC diagnostic warning "-Woverride-init"
|
||||
#endif
|
||||
|
||||
regs[10] = syscall_table[syscall_id_table[0xFF & regs[17]]]
|
||||
(
|
||||
regs[10] = syscall_table[syscall_id_table[0xFF & regs[17]]](
|
||||
regs[10], /* a0 */
|
||||
regs[11], /* a1 */
|
||||
regs[12], /* a2 */
|
||||
|
@ -530,29 +571,28 @@ handle_misaligned_load(uintptr_t cause, uintptr_t epc, uintptr_t regs[32], uintp
|
|||
uint8_t len = 0; /* data length */
|
||||
int offset = 0; /* addr offset to addr in reg */
|
||||
bool unsigned_ = 0; /* unsigned */
|
||||
uint64_t data_load = 0;/* real data load */
|
||||
uint64_t data_load = 0; /* real data load */
|
||||
|
||||
if (compressed)
|
||||
if(compressed)
|
||||
{
|
||||
/* compressed instruction should not get this fault. */
|
||||
goto on_error;
|
||||
}
|
||||
else
|
||||
} else
|
||||
{
|
||||
uint32_t instruct = *(uint32_t *)epc;
|
||||
uint8_t opcode = instruct&0x7F;
|
||||
uint8_t opcode = instruct & 0x7F;
|
||||
|
||||
dst = (instruct >> 7)&0x1F;
|
||||
len = (instruct >> 12)&3;
|
||||
unsigned_ = (instruct >> 14)&1;
|
||||
src = (instruct >> 15)&0x1F;
|
||||
dst = (instruct >> 7) & 0x1F;
|
||||
len = (instruct >> 12) & 3;
|
||||
unsigned_ = (instruct >> 14) & 1;
|
||||
src = (instruct >> 15) & 0x1F;
|
||||
offset = (instruct >> 20);
|
||||
len = 1 << len;
|
||||
switch (opcode)
|
||||
switch(opcode)
|
||||
{
|
||||
case 3:/* load */
|
||||
case 3: /* load */
|
||||
break;
|
||||
case 7:/* fpu load */
|
||||
case 7: /* fpu load */
|
||||
fpu = 1;
|
||||
break;
|
||||
default:
|
||||
|
@ -560,19 +600,18 @@ handle_misaligned_load(uintptr_t cause, uintptr_t epc, uintptr_t regs[32], uintp
|
|||
}
|
||||
}
|
||||
|
||||
if (offset >> 11)
|
||||
if(offset >> 11)
|
||||
offset = -((offset & 0x3FF) + 1);
|
||||
|
||||
addr = (uint64_t)((uint64_t)regs[src] + offset);
|
||||
|
||||
for (int i = 0; i < len; ++i)
|
||||
data_load |= ((uint64_t)*((uint8_t *)addr + i)) << (8 * i);
|
||||
for(int i = 0; i < len; ++i)
|
||||
data_load |= ((uint64_t) * ((uint8_t *)addr + i)) << (8 * i);
|
||||
|
||||
|
||||
if (!unsigned_ & !fpu)
|
||||
if(!unsigned_ & !fpu)
|
||||
{
|
||||
/* adjust sign */
|
||||
switch (len)
|
||||
switch(len)
|
||||
{
|
||||
case 1:
|
||||
data_load = (uint64_t)(int64_t)((int8_t)data_load);
|
||||
|
@ -588,7 +627,7 @@ handle_misaligned_load(uintptr_t cause, uintptr_t epc, uintptr_t regs[32], uintp
|
|||
}
|
||||
}
|
||||
|
||||
if (fpu)
|
||||
if(fpu)
|
||||
fregs[dst] = data_load;
|
||||
else
|
||||
regs[dst] = data_load;
|
||||
|
@ -622,28 +661,27 @@ handle_misaligned_store(uintptr_t cause, uintptr_t epc, uintptr_t regs[32], uint
|
|||
uint8_t dst = 0; /* dst register*/
|
||||
uint8_t len = 0; /* data length*/
|
||||
int offset = 0; /* addr offset to addr in reg*/
|
||||
uint64_t data_store = 0;/* real data store*/
|
||||
uint64_t data_store = 0; /* real data store*/
|
||||
|
||||
if (compressed)
|
||||
if(compressed)
|
||||
{
|
||||
/* compressed instruction should not get this fault. */
|
||||
goto on_error;
|
||||
}
|
||||
else
|
||||
} else
|
||||
{
|
||||
uint32_t instruct = *(uint32_t *)epc;
|
||||
uint8_t opcode = instruct&0x7F;
|
||||
uint8_t opcode = instruct & 0x7F;
|
||||
|
||||
len = (instruct >> 12)&7;
|
||||
dst = (instruct >> 15)&0x1F;
|
||||
src = (instruct >> 20)&0x1F;
|
||||
offset = ((instruct >> 7)&0x1F) | ((instruct >> 20)&0xFE0);
|
||||
len = (instruct >> 12) & 7;
|
||||
dst = (instruct >> 15) & 0x1F;
|
||||
src = (instruct >> 20) & 0x1F;
|
||||
offset = ((instruct >> 7) & 0x1F) | ((instruct >> 20) & 0xFE0);
|
||||
len = 1 << len;
|
||||
switch (opcode)
|
||||
switch(opcode)
|
||||
{
|
||||
case 0x23:/* store */
|
||||
case 0x23: /* store */
|
||||
break;
|
||||
case 0x27:/* fpu store */
|
||||
case 0x27: /* fpu store */
|
||||
fpu = 1;
|
||||
break;
|
||||
default:
|
||||
|
@ -651,19 +689,18 @@ handle_misaligned_store(uintptr_t cause, uintptr_t epc, uintptr_t regs[32], uint
|
|||
}
|
||||
}
|
||||
|
||||
if (offset >> 11)
|
||||
if(offset >> 11)
|
||||
offset = -((offset & 0x3FF) + 1);
|
||||
|
||||
addr = (uint64_t)((uint64_t)regs[dst] + offset);
|
||||
|
||||
|
||||
if (fpu)
|
||||
if(fpu)
|
||||
data_store = fregs[src];
|
||||
else
|
||||
data_store = regs[src];
|
||||
|
||||
for (int i = 0; i < len; ++i)
|
||||
*((uint8_t *)addr + i) = (data_store >> (i*8)) & 0xFF;
|
||||
for(int i = 0; i < len; ++i)
|
||||
*((uint8_t *)addr + i) = (data_store >> (i * 8)) & 0xFF;
|
||||
|
||||
LOGV(TAG, "misaligned store recovered at %08lx. len:%02d,addr:%08lx,reg:%02d,data:%016lx,float:%1d", (uint64_t)epc, len, (uint64_t)addr, src, data_store, fpu);
|
||||
|
||||
|
@ -685,7 +722,7 @@ handle_fault_store(uintptr_t cause, uintptr_t epc, uintptr_t regs[32], uintptr_t
|
|||
uintptr_t handle_syscall(uintptr_t cause, uintptr_t epc, uintptr_t regs[32], uintptr_t fregs[32])
|
||||
{
|
||||
|
||||
static uintptr_t (* const cause_table[])(uintptr_t cause, uintptr_t epc, uintptr_t regs[32], uintptr_t fregs[32]) =
|
||||
static uintptr_t (*const cause_table[])(uintptr_t cause, uintptr_t epc, uintptr_t regs[32], uintptr_t fregs[32]) =
|
||||
{
|
||||
[CAUSE_MISALIGNED_FETCH] = handle_misaligned_fetch,
|
||||
[CAUSE_FAULT_FETCH] = handle_fault_fetch,
|
||||
|
@ -708,4 +745,3 @@ size_t get_free_heap_size(void)
|
|||
{
|
||||
return (size_t)(&_heap_end[0] - _heap_cur);
|
||||
}
|
||||
|
||||
|
|
|
@ -14,8 +14,8 @@
|
|||
*/
|
||||
#include <stdlib.h>
|
||||
#include <string.h>
|
||||
#include "sysctl.h"
|
||||
#include "aes.h"
|
||||
#include "sysctl.h"
|
||||
#include "utils.h"
|
||||
|
||||
volatile aes_t *const aes = (volatile aes_t *)AES_BASE_ADDR;
|
||||
|
@ -76,17 +76,16 @@ static void gcm_clear_chk_tag(void)
|
|||
|
||||
static uint32_t gcm_check_tag(uint32_t *gcm_tag)
|
||||
{
|
||||
while (!gcm_get_tag_in_flag())
|
||||
while(!gcm_get_tag_in_flag())
|
||||
;
|
||||
gcm_write_tag(gcm_tag);
|
||||
while (!gcm_get_tag_chk())
|
||||
while(!gcm_get_tag_chk())
|
||||
;
|
||||
if (gcm_get_tag_chk() == 0x2)
|
||||
if(gcm_get_tag_chk() == 0x2)
|
||||
{
|
||||
gcm_clear_chk_tag();
|
||||
return 1;
|
||||
}
|
||||
else
|
||||
} else
|
||||
{
|
||||
gcm_clear_chk_tag();
|
||||
return 0;
|
||||
|
@ -125,8 +124,7 @@ void gcm_get_tag(uint8_t *gcm_tag)
|
|||
gcm_check_tag((uint32_t *)gcm_tag);
|
||||
}
|
||||
|
||||
|
||||
void aes_init(uint8_t *input_key, size_t input_key_len, uint8_t *iv,size_t iv_len, uint8_t *gcm_aad,
|
||||
void aes_init(uint8_t *input_key, size_t input_key_len, uint8_t *iv, size_t iv_len, uint8_t *gcm_aad,
|
||||
aes_cipher_mode_t cipher_mode, aes_encrypt_sel_t encrypt_sel, size_t gcm_aad_len, size_t input_data_len)
|
||||
{
|
||||
size_t remainder, uint32_num, uint8_num, i;
|
||||
|
@ -134,20 +132,20 @@ void aes_init(uint8_t *input_key, size_t input_key_len, uint8_t *iv,size_t iv_le
|
|||
uint8_t uint8_data[4] = {0};
|
||||
size_t padding_len = input_data_len;
|
||||
aes_clk_init();
|
||||
if ((cipher_mode == AES_ECB) || (cipher_mode == AES_CBC))
|
||||
if((cipher_mode == AES_ECB) || (cipher_mode == AES_CBC))
|
||||
padding_len = ((input_data_len + 15) / 16) * 16;
|
||||
aes->aes_endian |= 1;
|
||||
uint32_num = input_key_len / 4;
|
||||
for (i = 0; i < uint32_num; i++)
|
||||
for(i = 0; i < uint32_num; i++)
|
||||
{
|
||||
if (i < 4)
|
||||
if(i < 4)
|
||||
aes->aes_key[i] = *((uint32_t *)(&input_key[input_key_len - (4 * i) - 4]));
|
||||
else
|
||||
aes->aes_key_ext[i - 4] = *((uint32_t *)(&input_key[input_key_len - (4 * i) - 4]));
|
||||
}
|
||||
|
||||
uint32_num = iv_len / 4;
|
||||
for (i = 0; i < uint32_num; i++)
|
||||
for(i = 0; i < uint32_num; i++)
|
||||
aes->aes_iv[i] = *((uint32_t *)(&iv[iv_len - (4 * i) - 4]));
|
||||
|
||||
aes->mode_ctl.kmode = input_key_len / 8 - 2; /* b'00:AES_128 b'01:AES_192 b'10:AES_256 b'11:RESERVED */
|
||||
|
@ -157,21 +155,21 @@ void aes_init(uint8_t *input_key, size_t input_key_len, uint8_t *iv,size_t iv_le
|
|||
aes->gb_pc_num = padding_len - 1;
|
||||
aes->gb_aes_en |= 1;
|
||||
|
||||
if (cipher_mode == AES_GCM)
|
||||
if(cipher_mode == AES_GCM)
|
||||
{
|
||||
uint32_num = gcm_aad_len / 4;
|
||||
for (i = 0; i < uint32_num; i++)
|
||||
for(i = 0; i < uint32_num; i++)
|
||||
{
|
||||
uint32_data = *((uint32_t *)(&gcm_aad[i * 4]));
|
||||
while (!aes_get_data_in_flag())
|
||||
while(!aes_get_data_in_flag())
|
||||
;
|
||||
aes_write_aad(uint32_data);
|
||||
}
|
||||
uint8_num = 4 * uint32_num;
|
||||
remainder = gcm_aad_len % 4;
|
||||
if (remainder)
|
||||
if(remainder)
|
||||
{
|
||||
switch (remainder)
|
||||
switch(remainder)
|
||||
{
|
||||
case 1:
|
||||
uint8_data[0] = gcm_aad[uint8_num];
|
||||
|
@ -189,7 +187,7 @@ void aes_init(uint8_t *input_key, size_t input_key_len, uint8_t *iv,size_t iv_le
|
|||
break;
|
||||
}
|
||||
uint32_data = *((uint32_t *)(&uint8_data[0]));
|
||||
while (!aes_get_data_in_flag())
|
||||
while(!aes_get_data_in_flag())
|
||||
;
|
||||
aes_write_aad(uint32_data);
|
||||
}
|
||||
|
@ -204,18 +202,18 @@ static void aes_input_bytes(const uint8_t *input_data, size_t input_data_len, ae
|
|||
|
||||
padding_len = ((input_data_len + 15) / 16) * 16;
|
||||
uint32_num = input_data_len / 4;
|
||||
for (i = 0; i < uint32_num; i++)
|
||||
for(i = 0; i < uint32_num; i++)
|
||||
{
|
||||
uint32_data = *((uint32_t *)(&input_data[i * 4]));
|
||||
while (!aes_get_data_in_flag())
|
||||
while(!aes_get_data_in_flag())
|
||||
;
|
||||
aes_write_text(uint32_data);
|
||||
}
|
||||
uint8_num = 4 * uint32_num;
|
||||
remainder = input_data_len % 4;
|
||||
if (remainder)
|
||||
if(remainder)
|
||||
{
|
||||
switch (remainder)
|
||||
switch(remainder)
|
||||
{
|
||||
case 1:
|
||||
uint8_data[0] = input_data[uint8_num];
|
||||
|
@ -233,16 +231,16 @@ static void aes_input_bytes(const uint8_t *input_data, size_t input_data_len, ae
|
|||
break;
|
||||
}
|
||||
uint32_data = *((uint32_t *)(&uint8_data[0]));
|
||||
while (!aes_get_data_in_flag())
|
||||
while(!aes_get_data_in_flag())
|
||||
;
|
||||
aes_write_text(uint32_data);
|
||||
}
|
||||
if ((cipher_mode == AES_ECB) || (cipher_mode == AES_CBC))
|
||||
if((cipher_mode == AES_ECB) || (cipher_mode == AES_CBC))
|
||||
{
|
||||
uint32_num = (padding_len - input_data_len) / 4;
|
||||
for (i = 0; i < uint32_num; i++)
|
||||
for(i = 0; i < uint32_num; i++)
|
||||
{
|
||||
while (!aes_get_data_in_flag())
|
||||
while(!aes_get_data_in_flag())
|
||||
;
|
||||
aes_write_text(0);
|
||||
}
|
||||
|
@ -258,18 +256,18 @@ static void process_less_80_bytes(uint8_t *input_data, uint8_t *output_data, siz
|
|||
|
||||
padding_len = ((input_data_len + 15) / 16) * 16;
|
||||
uint32_num = input_data_len / 4;
|
||||
for (i = 0; i < uint32_num; i++)
|
||||
for(i = 0; i < uint32_num; i++)
|
||||
{
|
||||
uint32_data = *((uint32_t *)(&input_data[i * 4]));
|
||||
while (!aes_get_data_in_flag())
|
||||
while(!aes_get_data_in_flag())
|
||||
;
|
||||
aes_write_text(uint32_data);
|
||||
}
|
||||
uint8_num = 4 * uint32_num;
|
||||
remainder = input_data_len % 4;
|
||||
if (remainder)
|
||||
if(remainder)
|
||||
{
|
||||
switch (remainder)
|
||||
switch(remainder)
|
||||
{
|
||||
case 1:
|
||||
uint8_data[0] = input_data[uint8_num];
|
||||
|
@ -287,33 +285,33 @@ static void process_less_80_bytes(uint8_t *input_data, uint8_t *output_data, siz
|
|||
break;
|
||||
}
|
||||
uint32_data = *((uint32_t *)(&uint8_data[0]));
|
||||
while (!aes_get_data_in_flag())
|
||||
while(!aes_get_data_in_flag())
|
||||
;
|
||||
aes_write_text(uint32_data);
|
||||
}
|
||||
if ((cipher_mode == AES_ECB) || (cipher_mode == AES_CBC))
|
||||
if((cipher_mode == AES_ECB) || (cipher_mode == AES_CBC))
|
||||
{
|
||||
uint32_num = (padding_len - input_data_len) / 4;
|
||||
for (i = 0; i < uint32_num; i++)
|
||||
for(i = 0; i < uint32_num; i++)
|
||||
{
|
||||
while (!aes_get_data_in_flag())
|
||||
while(!aes_get_data_in_flag())
|
||||
;
|
||||
aes_write_text(0);
|
||||
}
|
||||
uint32_num = padding_len / 4;
|
||||
}
|
||||
for (i = 0; i < uint32_num; i++)
|
||||
for(i = 0; i < uint32_num; i++)
|
||||
{
|
||||
while (!aes_get_data_out_flag())
|
||||
while(!aes_get_data_out_flag())
|
||||
;
|
||||
*((uint32_t *)(&output_data[i * 4])) = aes_read_out_data();
|
||||
}
|
||||
if ((cipher_mode == AES_GCM) && (remainder))
|
||||
if((cipher_mode == AES_GCM) && (remainder))
|
||||
{
|
||||
while (!aes_get_data_out_flag())
|
||||
while(!aes_get_data_out_flag())
|
||||
;
|
||||
*((uint32_t *)(&uint8_data[0])) = aes_read_out_data();
|
||||
switch (remainder)
|
||||
switch(remainder)
|
||||
{
|
||||
case 1:
|
||||
output_data[uint32_num * 4] = uint8_data[0];
|
||||
|
@ -338,13 +336,13 @@ void aes_process(uint8_t *input_data, uint8_t *output_data, size_t input_data_le
|
|||
size_t temp_len = 0;
|
||||
uint32_t i = 0;
|
||||
|
||||
if (input_data_len >= 80)
|
||||
if(input_data_len >= 80)
|
||||
{
|
||||
for (i = 0; i < (input_data_len / 80); i++)
|
||||
for(i = 0; i < (input_data_len / 80); i++)
|
||||
process_less_80_bytes(&input_data[i * 80], &output_data[i * 80], 80, cipher_mode);
|
||||
}
|
||||
temp_len = input_data_len % 80;
|
||||
if (temp_len)
|
||||
if(temp_len)
|
||||
process_less_80_bytes(&input_data[i * 80], &output_data[i * 80], temp_len, cipher_mode);
|
||||
}
|
||||
|
||||
|
@ -492,7 +490,6 @@ void aes_ecb128_hard_decrypt_dma(dmac_channel_number_t dma_receive_channel_num,
|
|||
dmac_wait_done(dma_receive_channel_num);
|
||||
}
|
||||
|
||||
|
||||
void aes_ecb128_hard_encrypt_dma(dmac_channel_number_t dma_receive_channel_num,
|
||||
uint8_t *input_key,
|
||||
uint8_t *input_data,
|
||||
|
@ -800,4 +797,3 @@ void aes_gcm256_hard_encrypt_dma(dmac_channel_number_t dma_receive_channel_num,
|
|||
|
||||
gcm_get_tag(gcm_tag);
|
||||
}
|
||||
|
||||
|
|
|
@ -12,12 +12,12 @@
|
|||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
#include <math.h>
|
||||
#include <stddef.h>
|
||||
#include <stdint.h>
|
||||
#include <math.h>
|
||||
#include "apu.h"
|
||||
#include "syscalls.h"
|
||||
#include "sysctl.h"
|
||||
#include "apu.h"
|
||||
|
||||
#define BEAFORMING_BASE_ADDR (0x50250200)
|
||||
#ifndef M_PI
|
||||
|
@ -126,20 +126,16 @@ void apu_set_src_mode(uint8_t src_mode)
|
|||
*/
|
||||
void apu_set_direction_delay(uint8_t dir_num, uint8_t *dir_bidx)
|
||||
{
|
||||
apu->bf_dir_bidx[dir_num][0] =(apu_dir_bidx_t)
|
||||
{
|
||||
apu->bf_dir_bidx[dir_num][0] = (apu_dir_bidx_t){
|
||||
.dir_rd_idx0 = dir_bidx[0],
|
||||
.dir_rd_idx1 = dir_bidx[1],
|
||||
.dir_rd_idx2 = dir_bidx[2],
|
||||
.dir_rd_idx3 = dir_bidx[3]
|
||||
};
|
||||
apu->bf_dir_bidx[dir_num][1] =(apu_dir_bidx_t)
|
||||
{
|
||||
.dir_rd_idx3 = dir_bidx[3]};
|
||||
apu->bf_dir_bidx[dir_num][1] = (apu_dir_bidx_t){
|
||||
.dir_rd_idx0 = dir_bidx[4],
|
||||
.dir_rd_idx1 = dir_bidx[5],
|
||||
.dir_rd_idx2 = dir_bidx[6],
|
||||
.dir_rd_idx3 = dir_bidx[7]
|
||||
};
|
||||
.dir_rd_idx3 = dir_bidx[7]};
|
||||
}
|
||||
|
||||
/*
|
||||
|
@ -148,12 +144,12 @@ void apu_set_direction_delay(uint8_t dir_num, uint8_t *dir_bidx)
|
|||
void apu_set_delay(float radius, uint8_t mic_num_a_circle, uint8_t center)
|
||||
{
|
||||
uint8_t offsets[16][8];
|
||||
int i,j;
|
||||
int i, j;
|
||||
float seta[8], delay[8], hudu_jiao;
|
||||
float cm_tick = (float)SOUND_SPEED * 100 / I2S_FS;/*distance per tick (cm)*/
|
||||
float cm_tick = (float)SOUND_SPEED * 100 / I2S_FS; /*distance per tick (cm)*/
|
||||
float min;
|
||||
|
||||
for (i = 0; i < mic_num_a_circle; ++i)
|
||||
for(i = 0; i < mic_num_a_circle; ++i)
|
||||
{
|
||||
seta[i] = 360 * i / mic_num_a_circle;
|
||||
hudu_jiao = 2 * M_PI * seta[i] / 360;
|
||||
|
@ -162,17 +158,16 @@ void apu_set_delay(float radius, uint8_t mic_num_a_circle, uint8_t center)
|
|||
if(center)
|
||||
delay[mic_num_a_circle] = radius / cm_tick;
|
||||
|
||||
for (i = 0; i < mic_num_a_circle + center; ++i)
|
||||
for(i = 0; i < mic_num_a_circle + center; ++i)
|
||||
{
|
||||
offsets[0][i] = (int)(delay[i] + 0.5);
|
||||
}
|
||||
for(; i < 8; i++)
|
||||
offsets[0][i] = 0;
|
||||
|
||||
|
||||
for (j = 1; j < DIRECTION_RES; ++j)
|
||||
for(j = 1; j < DIRECTION_RES; ++j)
|
||||
{
|
||||
for (i = 0; i < mic_num_a_circle; ++i)
|
||||
for(i = 0; i < mic_num_a_circle; ++i)
|
||||
{
|
||||
seta[i] -= 360 / DIRECTION_RES;
|
||||
hudu_jiao = 2 * M_PI * seta[i] / 360;
|
||||
|
@ -182,27 +177,27 @@ void apu_set_delay(float radius, uint8_t mic_num_a_circle, uint8_t center)
|
|||
delay[mic_num_a_circle] = radius / cm_tick;
|
||||
|
||||
min = 2 * radius;
|
||||
for (i = 0; i < mic_num_a_circle; ++i)
|
||||
for(i = 0; i < mic_num_a_circle; ++i)
|
||||
{
|
||||
if(delay[i] < min)
|
||||
min = delay[i];
|
||||
}
|
||||
if(min)
|
||||
{
|
||||
for (i = 0; i < mic_num_a_circle + center; ++i)
|
||||
for(i = 0; i < mic_num_a_circle + center; ++i)
|
||||
{
|
||||
delay[i] = delay[i] - min;
|
||||
}
|
||||
}
|
||||
|
||||
for (i = 0; i < mic_num_a_circle + center; ++i)
|
||||
for(i = 0; i < mic_num_a_circle + center; ++i)
|
||||
{
|
||||
offsets[j][i] = (int)(delay[i] + 0.5);
|
||||
}
|
||||
for(; i < 8; i++)
|
||||
offsets[0][i] = 0;
|
||||
}
|
||||
for (size_t i = 0; i < DIRECTION_RES; i++)
|
||||
for(size_t i = 0; i < DIRECTION_RES; i++)
|
||||
{
|
||||
apu_set_direction_delay(i, offsets[i]);
|
||||
}
|
||||
|
@ -289,12 +284,12 @@ void apu_dir_set_prev_fir(uint16_t *fir_coef)
|
|||
{
|
||||
uint8_t i = 0;
|
||||
|
||||
for (i = 0; i < 9; i++) {
|
||||
for(i = 0; i < 9; i++)
|
||||
{
|
||||
apu->bf_pre_fir0_coef[i] =
|
||||
(apu_fir_coef_t){
|
||||
.fir_tap0 = fir_coef[i * 2],
|
||||
.fir_tap1 = i == 8 ? 0 : fir_coef[i * 2 + 1]
|
||||
};
|
||||
.fir_tap1 = i == 8 ? 0 : fir_coef[i * 2 + 1]};
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -302,12 +297,12 @@ void apu_dir_set_post_fir(uint16_t *fir_coef)
|
|||
{
|
||||
uint8_t i = 0;
|
||||
|
||||
for (i = 0; i < 9; i++) {
|
||||
for(i = 0; i < 9; i++)
|
||||
{
|
||||
apu->bf_post_fir0_coef[i] =
|
||||
(apu_fir_coef_t){
|
||||
.fir_tap0 = fir_coef[i * 2],
|
||||
.fir_tap1 = i == 8 ? 0 : fir_coef[i * 2 + 1]
|
||||
};
|
||||
.fir_tap1 = i == 8 ? 0 : fir_coef[i * 2 + 1]};
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -315,12 +310,12 @@ void apu_voc_set_prev_fir(uint16_t *fir_coef)
|
|||
{
|
||||
uint8_t i = 0;
|
||||
|
||||
for (i = 0; i < 9; i++) {
|
||||
for(i = 0; i < 9; i++)
|
||||
{
|
||||
apu->bf_pre_fir1_coef[i] =
|
||||
(apu_fir_coef_t){
|
||||
.fir_tap0 = fir_coef[i * 2],
|
||||
.fir_tap1 = i == 8 ? 0 : fir_coef[i * 2 + 1]
|
||||
};
|
||||
.fir_tap1 = i == 8 ? 0 : fir_coef[i * 2 + 1]};
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -328,12 +323,12 @@ void apu_voc_set_post_fir(uint16_t *fir_coef)
|
|||
{
|
||||
uint8_t i = 0;
|
||||
|
||||
for (i = 0; i < 9; i++) {
|
||||
for(i = 0; i < 9; i++)
|
||||
{
|
||||
apu->bf_post_fir1_coef[i] =
|
||||
(apu_fir_coef_t){
|
||||
.fir_tap0 = fir_coef[i * 2],
|
||||
.fir_tap1 = i == 8 ? 0 : fir_coef[i * 2 + 1]
|
||||
};
|
||||
.fir_tap1 = i == 8 ? 0 : fir_coef[i * 2 + 1]};
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -342,8 +337,7 @@ void apu_set_fft_shift_factor(uint8_t enable_flag, uint16_t shift_factor)
|
|||
apu->bf_fft_cfg_reg =
|
||||
(apu_fft_cfg_t){
|
||||
.fft_enable = enable_flag,
|
||||
.fft_shift_factor = shift_factor
|
||||
};
|
||||
.fft_shift_factor = shift_factor};
|
||||
|
||||
apu_ch_cfg_t ch_cfg = apu->bf_ch_cfg_reg;
|
||||
|
||||
|
@ -398,30 +392,27 @@ void apu_set_interrupt_mask(uint8_t dir_int_mask, uint8_t voc_int_mask)
|
|||
apu->bf_int_mask_reg =
|
||||
(apu_int_mask_t){
|
||||
.dir_data_rdy_msk = dir_int_mask,
|
||||
.voc_buf_rdy_msk = voc_int_mask
|
||||
};
|
||||
.voc_buf_rdy_msk = voc_int_mask};
|
||||
}
|
||||
|
||||
void apu_dir_clear_int_state(void)
|
||||
{
|
||||
apu->bf_int_stat_reg =
|
||||
(apu_int_stat_t){
|
||||
.dir_search_data_rdy = 1
|
||||
};
|
||||
.dir_search_data_rdy = 1};
|
||||
}
|
||||
|
||||
void apu_voc_clear_int_state(void)
|
||||
{
|
||||
apu->bf_int_stat_reg =
|
||||
(apu_int_stat_t){
|
||||
.voc_buf_data_rdy = 1
|
||||
};
|
||||
.voc_buf_data_rdy = 1};
|
||||
}
|
||||
|
||||
/* reset saturation_counter */
|
||||
void apu_voc_reset_saturation_counter(void)
|
||||
{
|
||||
apu->saturation_counter = 1<<31;
|
||||
apu->saturation_counter = 1 << 31;
|
||||
}
|
||||
|
||||
/*get saturation counter*/
|
||||
|
@ -434,7 +425,7 @@ uint32_t apu_voc_get_saturation_counter(void)
|
|||
/*set saturation limit*/
|
||||
void apu_voc_set_saturation_limit(uint16_t upper, uint16_t bottom)
|
||||
{
|
||||
apu->saturation_limits = (uint32_t)bottom<<16 | upper;
|
||||
apu->saturation_limits = (uint32_t)bottom << 16 | upper;
|
||||
}
|
||||
|
||||
/*get saturation limit*/
|
||||
|
@ -447,7 +438,8 @@ uint32_t apu_voc_get_saturation_limit(void)
|
|||
static void print_fir(const char *member_name, volatile apu_fir_coef_t *pfir)
|
||||
{
|
||||
printf(" for(int i = 0; i < 9; i++){\n");
|
||||
for (int i = 0; i < 9; i++) {
|
||||
for(int i = 0; i < 9; i++)
|
||||
{
|
||||
apu_fir_coef_t fir = pfir[i];
|
||||
|
||||
printf(" apu->%s[%d] = (apu_fir_coef_t){\n", member_name, i);
|
||||
|
@ -478,7 +470,8 @@ void apu_print_setting(void)
|
|||
printf(" };\n");
|
||||
|
||||
printf(" for(int i = 0; i < 16; i++){\n");
|
||||
for (int i = 0; i < 16; i++) {
|
||||
for(int i = 0; i < 16; i++)
|
||||
{
|
||||
apu_dir_bidx_t bidx0 = apu->bf_dir_bidx[i][0];
|
||||
apu_dir_bidx_t bidx1 = apu->bf_dir_bidx[i][1];
|
||||
|
||||
|
@ -502,7 +495,6 @@ void apu_print_setting(void)
|
|||
print_fir("bf_pre_fir1_coef", apu->bf_pre_fir1_coef);
|
||||
print_fir("bf_post_fir1_coef", apu->bf_post_fir1_coef);
|
||||
|
||||
|
||||
apu_dwsz_cfg_t bf_dwsz_cfg_reg = apu->bf_dwsz_cfg_reg;
|
||||
|
||||
printf(" apu->bf_dwsz_cfg_reg = (apu_dwsz_cfg_t){\n");
|
||||
|
@ -526,4 +518,3 @@ void apu_print_setting(void)
|
|||
|
||||
printf("}\n");
|
||||
}
|
||||
|
||||
|
|
|
@ -14,11 +14,11 @@
|
|||
*/
|
||||
#include <stddef.h>
|
||||
#include <stdint.h>
|
||||
#include "encoding.h"
|
||||
#include "clint.h"
|
||||
#include "encoding.h"
|
||||
#include "sysctl.h"
|
||||
|
||||
volatile clint_t* const clint = (volatile clint_t*)CLINT_BASE_ADDR;
|
||||
volatile clint_t *const clint = (volatile clint_t *)CLINT_BASE_ADDR;
|
||||
static clint_timer_instance_t clint_timer_instance[CLINT_NUM_CORES];
|
||||
static clint_ipi_instance_t clint_ipi_instance[CLINT_NUM_CORES];
|
||||
|
||||
|
@ -68,16 +68,16 @@ int clint_timer_start(uint64_t interval, int single_shot)
|
|||
/* Read core id */
|
||||
unsigned long core_id = current_coreid();
|
||||
/* Set timer interval */
|
||||
if (clint_timer_set_interval(interval) != 0)
|
||||
if(clint_timer_set_interval(interval) != 0)
|
||||
return -1;
|
||||
/* Set timer single shot */
|
||||
if (clint_timer_set_single_shot(single_shot) != 0)
|
||||
if(clint_timer_set_single_shot(single_shot) != 0)
|
||||
return -1;
|
||||
/* Check settings to prevent interval is 0 */
|
||||
if (clint_timer_instance[core_id].interval == 0)
|
||||
if(clint_timer_instance[core_id].interval == 0)
|
||||
return -1;
|
||||
/* Check settings to prevent cycles is 0 */
|
||||
if (clint_timer_instance[core_id].cycles == 0)
|
||||
if(clint_timer_instance[core_id].cycles == 0)
|
||||
return -1;
|
||||
/* Add cycle interval to mtimecmp */
|
||||
uint64_t now = clint->mtime;
|
||||
|
@ -103,7 +103,7 @@ int clint_timer_set_interval(uint64_t interval)
|
|||
/* Read core id */
|
||||
unsigned long core_id = current_coreid();
|
||||
/* Check parameter */
|
||||
if (interval == 0)
|
||||
if(interval == 0)
|
||||
return -1;
|
||||
|
||||
/* Assign user interval with Millisecond(ms) */
|
||||
|
@ -182,7 +182,7 @@ int clint_ipi_disable(void)
|
|||
|
||||
int clint_ipi_send(size_t core_id)
|
||||
{
|
||||
if (core_id >= CLINT_NUM_CORES)
|
||||
if(core_id >= CLINT_NUM_CORES)
|
||||
return -1;
|
||||
clint->msip[core_id].msip = 1;
|
||||
return 0;
|
||||
|
@ -190,9 +190,9 @@ int clint_ipi_send(size_t core_id)
|
|||
|
||||
int clint_ipi_clear(size_t core_id)
|
||||
{
|
||||
if (core_id >= CLINT_NUM_CORES)
|
||||
if(core_id >= CLINT_NUM_CORES)
|
||||
return -1;
|
||||
if (clint->msip[core_id].msip)
|
||||
if(clint->msip[core_id].msip)
|
||||
{
|
||||
clint->msip[core_id].msip = 0;
|
||||
return 1;
|
||||
|
@ -225,19 +225,18 @@ uintptr_t handle_irq_m_timer(uintptr_t cause, uintptr_t epc)
|
|||
|
||||
clear_csr(mie, MIP_MTIP | MIP_MSIP);
|
||||
set_csr(mstatus, MSTATUS_MIE);
|
||||
if (clint_timer_instance[core_id].callback != NULL)
|
||||
if(clint_timer_instance[core_id].callback != NULL)
|
||||
clint_timer_instance[core_id].callback(
|
||||
clint_timer_instance[core_id].ctx);
|
||||
clear_csr(mstatus, MSTATUS_MIE);
|
||||
set_csr(mstatus, MSTATUS_MPIE | MSTATUS_MPP);
|
||||
write_csr(mie, ie_flag);
|
||||
/* If not single shot and cycle interval is not 0, repeat this timer */
|
||||
if (!clint_timer_instance[core_id].single_shot && clint_timer_instance[core_id].cycles != 0)
|
||||
if(!clint_timer_instance[core_id].single_shot && clint_timer_instance[core_id].cycles != 0)
|
||||
{
|
||||
/* Set mtimecmp by core id */
|
||||
clint->mtimecmp[core_id] += clint_timer_instance[core_id].cycles;
|
||||
}
|
||||
else
|
||||
} else
|
||||
clear_csr(mie, MIP_MTIP);
|
||||
return epc;
|
||||
}
|
||||
|
@ -251,11 +250,10 @@ uintptr_t handle_irq_m_soft(uintptr_t cause, uintptr_t epc)
|
|||
set_csr(mstatus, MSTATUS_MIE);
|
||||
/* Clear ipi flag */
|
||||
clint_ipi_clear(core_id);
|
||||
if (clint_ipi_instance[core_id].callback != NULL)
|
||||
if(clint_ipi_instance[core_id].callback != NULL)
|
||||
clint_ipi_instance[core_id].callback(clint_ipi_instance[core_id].ctx);
|
||||
clear_csr(mstatus, MSTATUS_MIE);
|
||||
set_csr(mstatus, MSTATUS_MPIE | MSTATUS_MPP);
|
||||
set_csr(mie, MIP_MSIP);
|
||||
return epc;
|
||||
}
|
||||
|
||||
|
|
|
@ -12,15 +12,15 @@
|
|||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
#include <stdint.h>
|
||||
#include <stddef.h>
|
||||
#include <stdint.h>
|
||||
#include <stdio.h>
|
||||
#include "dmac.h"
|
||||
#include "sysctl.h"
|
||||
#include "fpioa.h"
|
||||
#include "utils.h"
|
||||
#include "plic.h"
|
||||
#include "stdlib.h"
|
||||
#include "sysctl.h"
|
||||
#include "utils.h"
|
||||
|
||||
volatile dmac_t *const dmac = (dmac_t *)DMAC_BASE_ADDR;
|
||||
|
||||
|
@ -35,7 +35,8 @@ dmac_context_t dmac_context[6];
|
|||
|
||||
static int is_memory(uintptr_t address)
|
||||
{
|
||||
enum {
|
||||
enum
|
||||
{
|
||||
mem_len = 6 * 1024 * 1024,
|
||||
mem_no_cache_len = 8 * 1024 * 1024,
|
||||
};
|
||||
|
@ -93,7 +94,8 @@ void dmac_channel_enable(dmac_channel_number_t channel_num)
|
|||
|
||||
chen.data = readq(&dmac->chen);
|
||||
|
||||
switch (channel_num) {
|
||||
switch(channel_num)
|
||||
{
|
||||
case DMAC_CHANNEL0:
|
||||
chen.dmac_chen.ch1_en = 1;
|
||||
chen.dmac_chen.ch1_en_we = 1;
|
||||
|
@ -131,7 +133,7 @@ void dmac_channel_disable(dmac_channel_number_t channel_num)
|
|||
|
||||
chen.data = readq(&dmac->chen);
|
||||
|
||||
switch (channel_num)
|
||||
switch(channel_num)
|
||||
{
|
||||
case DMAC_CHANNEL0:
|
||||
chen.dmac_chen.ch1_en = 0;
|
||||
|
@ -170,29 +172,30 @@ int32_t dmac_check_channel_busy(dmac_channel_number_t channel_num)
|
|||
dmac_chen_u_t chen_u;
|
||||
|
||||
chen_u.data = readq(&dmac->chen);
|
||||
switch (channel_num) {
|
||||
switch(channel_num)
|
||||
{
|
||||
case DMAC_CHANNEL0:
|
||||
if (chen_u.dmac_chen.ch1_en == 1)
|
||||
if(chen_u.dmac_chen.ch1_en == 1)
|
||||
ret = 1;
|
||||
break;
|
||||
case DMAC_CHANNEL1:
|
||||
if (chen_u.dmac_chen.ch2_en == 1)
|
||||
if(chen_u.dmac_chen.ch2_en == 1)
|
||||
ret = 1;
|
||||
break;
|
||||
case DMAC_CHANNEL2:
|
||||
if (chen_u.dmac_chen.ch3_en == 1)
|
||||
if(chen_u.dmac_chen.ch3_en == 1)
|
||||
ret = 1;
|
||||
break;
|
||||
case DMAC_CHANNEL3:
|
||||
if (chen_u.dmac_chen.ch4_en == 1)
|
||||
if(chen_u.dmac_chen.ch4_en == 1)
|
||||
ret = 1;
|
||||
break;
|
||||
case DMAC_CHANNEL4:
|
||||
if (chen_u.dmac_chen.ch5_en == 1)
|
||||
if(chen_u.dmac_chen.ch5_en == 1)
|
||||
ret = 1;
|
||||
break;
|
||||
case DMAC_CHANNEL5:
|
||||
if (chen_u.dmac_chen.ch6_en == 1)
|
||||
if(chen_u.dmac_chen.ch6_en == 1)
|
||||
ret = 1;
|
||||
break;
|
||||
default:
|
||||
|
@ -213,11 +216,12 @@ int32_t dmac_set_list_master_select(dmac_channel_number_t channel_num,
|
|||
|
||||
ctl.data = readq(&dmac->channel[channel_num].ctl);
|
||||
ret = dmac_check_channel_busy(channel_num);
|
||||
if (ret == 0) {
|
||||
if (sd_sel == DMAC_SRC || sd_sel == DMAC_SRC_DST)
|
||||
if(ret == 0)
|
||||
{
|
||||
if(sd_sel == DMAC_SRC || sd_sel == DMAC_SRC_DST)
|
||||
ctl.ch_ctl.sms = mst_num;
|
||||
|
||||
if (sd_sel == DMAC_DST || sd_sel == DMAC_SRC_DST)
|
||||
if(sd_sel == DMAC_DST || sd_sel == DMAC_SRC_DST)
|
||||
ctl.ch_ctl.dms = mst_num;
|
||||
tmp |= *(uint64_t *)&dmac->channel[channel_num].ctl;
|
||||
writeq(ctl.data, &dmac->channel[channel_num].ctl);
|
||||
|
@ -277,13 +281,13 @@ int dmac_set_channel_config(dmac_channel_number_t channel_num,
|
|||
dmac_ch_cfg_u_t cfg;
|
||||
dmac_ch_llp_u_t ch_llp;
|
||||
|
||||
if (cfg_param->ctl_sms > DMAC_MASTER2)
|
||||
if(cfg_param->ctl_sms > DMAC_MASTER2)
|
||||
return -1;
|
||||
if (cfg_param->ctl_dms > DMAC_MASTER2)
|
||||
if(cfg_param->ctl_dms > DMAC_MASTER2)
|
||||
return -1;
|
||||
if (cfg_param->ctl_src_msize > DMAC_MSIZE_256)
|
||||
if(cfg_param->ctl_src_msize > DMAC_MSIZE_256)
|
||||
return -1;
|
||||
if (cfg_param->ctl_drc_msize > DMAC_MSIZE_256)
|
||||
if(cfg_param->ctl_drc_msize > DMAC_MSIZE_256)
|
||||
return -1;
|
||||
|
||||
/**
|
||||
|
@ -351,12 +355,12 @@ int dmac_set_channel_param(dmac_channel_number_t channel_num,
|
|||
|
||||
int mem_type_src = is_memory((uintptr_t)src), mem_type_dest = is_memory((uintptr_t)dest);
|
||||
dmac_transfer_flow_t flow_control;
|
||||
if (mem_type_src == 0 && mem_type_dest == 0)
|
||||
if(mem_type_src == 0 && mem_type_dest == 0)
|
||||
{
|
||||
flow_control = DMAC_PRF2PRF_DMA;
|
||||
}else if (mem_type_src == 1 && mem_type_dest == 0)
|
||||
} else if(mem_type_src == 1 && mem_type_dest == 0)
|
||||
flow_control = DMAC_MEM2PRF_DMA;
|
||||
else if (mem_type_src == 0 && mem_type_dest == 1)
|
||||
else if(mem_type_src == 0 && mem_type_dest == 1)
|
||||
flow_control = DMAC_PRF2MEM_DMA;
|
||||
else
|
||||
flow_control = DMAC_MEM2MEM_DMA;
|
||||
|
@ -408,9 +412,9 @@ int dmac_get_channel_config(dmac_channel_number_t channel_num,
|
|||
dmac_ch_cfg_u_t cfg;
|
||||
dmac_ch_llp_u_t ch_llp;
|
||||
|
||||
if (cfg_param == 0)
|
||||
if(cfg_param == 0)
|
||||
return -1;
|
||||
if (channel_num < DMAC_CHANNEL0 ||
|
||||
if(channel_num < DMAC_CHANNEL0 ||
|
||||
channel_num > DMAC_CHANNEL3)
|
||||
return -1;
|
||||
|
||||
|
@ -559,7 +563,7 @@ void dmac_init(void)
|
|||
dmac_reset.data = readq(&dmac->reset);
|
||||
dmac_reset.reset.rst = 1;
|
||||
writeq(dmac_reset.data, &dmac->reset);
|
||||
while (dmac_reset.reset.rst)
|
||||
while(dmac_reset.reset.rst)
|
||||
dmac_reset.data = readq(&dmac->reset);
|
||||
|
||||
/*reset dmac */
|
||||
|
@ -579,7 +583,7 @@ void dmac_init(void)
|
|||
writeq(dmac_cfg.data, &dmac->cfg);
|
||||
/* disable dmac and disable interrupt */
|
||||
|
||||
while (readq(&dmac->cfg))
|
||||
while(readq(&dmac->cfg))
|
||||
;
|
||||
tmp = readq(&dmac->chen);
|
||||
tmp &= ~0xf;
|
||||
|
@ -631,10 +635,12 @@ void dmac_link_list_item(dmac_channel_number_t channel_num,
|
|||
ctl.ch_ctl.src_stat_en = cfg_param->ctl_src_stat_en;
|
||||
ctl.ch_ctl.dst_stat_en = cfg_param->ctl_dst_stat_en;
|
||||
|
||||
if (LLI_last_row != LAST_ROW) {
|
||||
if(LLI_last_row != LAST_ROW)
|
||||
{
|
||||
ctl.ch_ctl.shadowreg_or_lli_valid = 1;
|
||||
ctl.ch_ctl.shadowreg_or_lli_last = 0;
|
||||
} else {
|
||||
} else
|
||||
{
|
||||
ctl.ch_ctl.shadowreg_or_lli_valid = 1;
|
||||
ctl.ch_ctl.shadowreg_or_lli_last = 1;
|
||||
}
|
||||
|
@ -647,7 +653,7 @@ void dmac_link_list_item(dmac_channel_number_t channel_num,
|
|||
|
||||
llp_u.data = readq(&dmac->channel[channel_num].llp);
|
||||
|
||||
if (LLI_last_row != LAST_ROW)
|
||||
if(LLI_last_row != LAST_ROW)
|
||||
llp_u.llp.loc = ((uint64_t)&lli_item[LLI_row_num + 1]) >> 6;
|
||||
else
|
||||
llp_u.llp.loc = 0;
|
||||
|
@ -660,9 +666,10 @@ void dmac_update_shandow_register(dmac_channel_number_t channel_num,
|
|||
{
|
||||
dmac_ch_ctl_u_t ctl_u;
|
||||
|
||||
do {
|
||||
do
|
||||
{
|
||||
ctl_u.data = readq(&dmac->channel[channel_num].ctl);
|
||||
} while (ctl_u.ch_ctl.shadowreg_or_lli_valid);
|
||||
} while(ctl_u.ch_ctl.shadowreg_or_lli_valid);
|
||||
|
||||
writeq(cfg_param->sar, &dmac->channel[channel_num].sar);
|
||||
writeq(cfg_param->dar, &dmac->channel[channel_num].dar);
|
||||
|
@ -678,11 +685,12 @@ void dmac_update_shandow_register(dmac_channel_number_t channel_num,
|
|||
ctl_u.ch_ctl.dst_msize = cfg_param->ctl_drc_msize;
|
||||
ctl_u.ch_ctl.src_stat_en = cfg_param->ctl_src_stat_en;
|
||||
ctl_u.ch_ctl.dst_stat_en = cfg_param->ctl_dst_stat_en;
|
||||
if (last_block != LAST_ROW)
|
||||
if(last_block != LAST_ROW)
|
||||
{
|
||||
ctl_u.ch_ctl.shadowreg_or_lli_valid = 1;
|
||||
ctl_u.ch_ctl.shadowreg_or_lli_last = 0;
|
||||
} else {
|
||||
} else
|
||||
{
|
||||
ctl_u.ch_ctl.shadowreg_or_lli_valid = 1;
|
||||
ctl_u.ch_ctl.shadowreg_or_lli_last = 1;
|
||||
}
|
||||
|
@ -706,7 +714,8 @@ void dmac_set_single_mode(dmac_channel_number_t channel_num,
|
|||
dmac_address_increment_t dest_inc,
|
||||
dmac_burst_trans_length_t dmac_burst_size,
|
||||
dmac_transfer_width_t dmac_trans_width,
|
||||
size_t block_size) {
|
||||
size_t block_size)
|
||||
{
|
||||
dmac_chanel_interrupt_clear(channel_num);
|
||||
dmac_channel_disable(channel_num);
|
||||
dmac_wait_idle(channel_num);
|
||||
|
@ -741,7 +750,8 @@ int dmac_is_idle(dmac_channel_number_t channel_num)
|
|||
|
||||
void dmac_wait_idle(dmac_channel_number_t channel_num)
|
||||
{
|
||||
while(!dmac_is_idle(channel_num));
|
||||
while(!dmac_is_idle(channel_num))
|
||||
;
|
||||
dmac_chanel_interrupt_clear(channel_num); /* clear interrupt */
|
||||
}
|
||||
|
||||
|
@ -767,7 +777,7 @@ static int dmac_irq_callback(void *ctx)
|
|||
return 0;
|
||||
}
|
||||
|
||||
void dmac_irq_register(dmac_channel_number_t channel_num , plic_irq_callback_t dmac_callback, void *ctx, uint32_t priority)
|
||||
void dmac_irq_register(dmac_channel_number_t channel_num, plic_irq_callback_t dmac_callback, void *ctx, uint32_t priority)
|
||||
{
|
||||
dmac_context[channel_num].dmac_channel = channel_num;
|
||||
dmac_context[channel_num].callback = dmac_callback;
|
||||
|
@ -778,7 +788,7 @@ void dmac_irq_register(dmac_channel_number_t channel_num , plic_irq_callback_t d
|
|||
plic_irq_enable(IRQN_DMA0_INTERRUPT + channel_num);
|
||||
}
|
||||
|
||||
void __attribute__((weak, alias("dmac_irq_register"))) dmac_set_irq(dmac_channel_number_t channel_num , plic_irq_callback_t dmac_callback, void *ctx, uint32_t priority);
|
||||
void __attribute__((weak, alias("dmac_irq_register"))) dmac_set_irq(dmac_channel_number_t channel_num, plic_irq_callback_t dmac_callback, void *ctx, uint32_t priority);
|
||||
|
||||
void dmac_irq_unregister(dmac_channel_number_t channel_num)
|
||||
{
|
||||
|
@ -789,4 +799,3 @@ void dmac_irq_unregister(dmac_channel_number_t channel_num)
|
|||
}
|
||||
|
||||
void __attribute__((weak, alias("dmac_irq_unregister"))) dmac_free_irq(dmac_channel_number_t channel_num);
|
||||
|
||||
|
|
|
@ -12,24 +12,24 @@
|
|||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
#include <math.h>
|
||||
#include <stddef.h>
|
||||
#include <stdint.h>
|
||||
#include "dvp.h"
|
||||
#include "utils.h"
|
||||
#include "fpioa.h"
|
||||
#include "sysctl.h"
|
||||
#include <math.h>
|
||||
#include "utils.h"
|
||||
|
||||
volatile dvp_t* const dvp = (volatile dvp_t*)DVP_BASE_ADDR;
|
||||
volatile dvp_t *const dvp = (volatile dvp_t *)DVP_BASE_ADDR;
|
||||
static uint8_t g_sccb_reg_len = 8;
|
||||
|
||||
static void mdelay(uint32_t ms)
|
||||
{
|
||||
uint32_t i;
|
||||
|
||||
while (ms && ms--)
|
||||
while(ms && ms--)
|
||||
{
|
||||
for (i = 0; i < 25000; i++)
|
||||
for(i = 0; i < 25000; i++)
|
||||
__asm__ __volatile__("nop");
|
||||
}
|
||||
}
|
||||
|
@ -61,10 +61,10 @@ uint32_t dvp_sccb_set_clk_rate(uint32_t clk_rate)
|
|||
|
||||
static void dvp_sccb_start_transfer(void)
|
||||
{
|
||||
while (dvp->sts & DVP_STS_SCCB_EN)
|
||||
while(dvp->sts & DVP_STS_SCCB_EN)
|
||||
;
|
||||
dvp->sts = DVP_STS_SCCB_EN | DVP_STS_SCCB_EN_WE;
|
||||
while (dvp->sts & DVP_STS_SCCB_EN)
|
||||
while(dvp->sts & DVP_STS_SCCB_EN)
|
||||
;
|
||||
}
|
||||
|
||||
|
@ -78,11 +78,10 @@ void dvp_sccb_send_data(uint8_t dev_addr, uint16_t reg_addr, uint8_t reg_data)
|
|||
|
||||
dvp->sccb_cfg = tmp;
|
||||
|
||||
if (g_sccb_reg_len == 8)
|
||||
if(g_sccb_reg_len == 8)
|
||||
{
|
||||
dvp->sccb_ctl = DVP_SCCB_WRITE_DATA_ENABLE | DVP_SCCB_DEVICE_ADDRESS(dev_addr) | DVP_SCCB_REG_ADDRESS(reg_addr) | DVP_SCCB_WDATA_BYTE0(reg_data);
|
||||
}
|
||||
else
|
||||
} else
|
||||
{
|
||||
dvp->sccb_ctl = DVP_SCCB_WRITE_DATA_ENABLE | DVP_SCCB_DEVICE_ADDRESS(dev_addr) | DVP_SCCB_REG_ADDRESS(reg_addr >> 8) | DVP_SCCB_WDATA_BYTE0(reg_addr & 0xff) | DVP_SCCB_WDATA_BYTE1(reg_data);
|
||||
}
|
||||
|
@ -95,18 +94,17 @@ uint8_t dvp_sccb_receive_data(uint8_t dev_addr, uint16_t reg_addr)
|
|||
|
||||
tmp = dvp->sccb_cfg & (~DVP_SCCB_BYTE_NUM_MASK);
|
||||
|
||||
if (g_sccb_reg_len == 8)
|
||||
if(g_sccb_reg_len == 8)
|
||||
tmp |= DVP_SCCB_BYTE_NUM_2;
|
||||
else
|
||||
tmp |= DVP_SCCB_BYTE_NUM_3;
|
||||
|
||||
dvp->sccb_cfg = tmp;
|
||||
|
||||
if (g_sccb_reg_len == 8)
|
||||
if(g_sccb_reg_len == 8)
|
||||
{
|
||||
dvp->sccb_ctl = DVP_SCCB_WRITE_DATA_ENABLE | DVP_SCCB_DEVICE_ADDRESS(dev_addr) | DVP_SCCB_REG_ADDRESS(reg_addr);
|
||||
}
|
||||
else
|
||||
} else
|
||||
{
|
||||
dvp->sccb_ctl = DVP_SCCB_WRITE_DATA_ENABLE | DVP_SCCB_DEVICE_ADDRESS(dev_addr) | DVP_SCCB_REG_ADDRESS(reg_addr >> 8) | DVP_SCCB_WDATA_BYTE0(reg_addr & 0xff);
|
||||
}
|
||||
|
@ -116,7 +114,7 @@ uint8_t dvp_sccb_receive_data(uint8_t dev_addr, uint16_t reg_addr)
|
|||
|
||||
dvp_sccb_start_transfer();
|
||||
|
||||
return (uint8_t) DVP_SCCB_RDATA_BYTE(dvp->sccb_cfg);
|
||||
return (uint8_t)DVP_SCCB_RDATA_BYTE(dvp->sccb_cfg);
|
||||
}
|
||||
|
||||
static void dvp_reset(void)
|
||||
|
@ -193,7 +191,7 @@ void dvp_set_image_size(uint32_t width, uint32_t height)
|
|||
|
||||
tmp |= DVP_CFG_LINE_NUM(height);
|
||||
|
||||
if (dvp->dvp_cfg & DVP_CFG_BURST_SIZE_4BEATS)
|
||||
if(dvp->dvp_cfg & DVP_CFG_BURST_SIZE_4BEATS)
|
||||
tmp |= DVP_CFG_HREF_BURST_NUM(width / 8 / 4);
|
||||
else
|
||||
tmp |= DVP_CFG_HREF_BURST_NUM(width / 8 / 1);
|
||||
|
@ -215,7 +213,7 @@ void dvp_set_display_addr(uint32_t addr)
|
|||
|
||||
void dvp_start_frame(void)
|
||||
{
|
||||
while (!(dvp->sts & DVP_STS_FRAME_START))
|
||||
while(!(dvp->sts & DVP_STS_FRAME_START))
|
||||
;
|
||||
dvp->sts = (DVP_STS_FRAME_START | DVP_STS_FRAME_START_WE);
|
||||
}
|
||||
|
@ -227,26 +225,26 @@ void dvp_start_convert(void)
|
|||
|
||||
void dvp_finish_convert(void)
|
||||
{
|
||||
while (!(dvp->sts & DVP_STS_FRAME_FINISH))
|
||||
while(!(dvp->sts & DVP_STS_FRAME_FINISH))
|
||||
;
|
||||
dvp->sts = DVP_STS_FRAME_FINISH | DVP_STS_FRAME_FINISH_WE;
|
||||
}
|
||||
|
||||
void dvp_get_image(void)
|
||||
{
|
||||
while (!(dvp->sts & DVP_STS_FRAME_START))
|
||||
while(!(dvp->sts & DVP_STS_FRAME_START))
|
||||
;
|
||||
dvp->sts = DVP_STS_FRAME_START | DVP_STS_FRAME_START_WE;
|
||||
while (!(dvp->sts & DVP_STS_FRAME_START))
|
||||
while(!(dvp->sts & DVP_STS_FRAME_START))
|
||||
;
|
||||
dvp->sts = DVP_STS_FRAME_FINISH | DVP_STS_FRAME_FINISH_WE | DVP_STS_FRAME_START | DVP_STS_FRAME_START_WE | DVP_STS_DVP_EN | DVP_STS_DVP_EN_WE;
|
||||
while (!(dvp->sts & DVP_STS_FRAME_FINISH))
|
||||
while(!(dvp->sts & DVP_STS_FRAME_FINISH))
|
||||
;
|
||||
}
|
||||
|
||||
void dvp_config_interrupt(uint32_t interrupt, uint8_t enable)
|
||||
{
|
||||
if (enable)
|
||||
if(enable)
|
||||
dvp->dvp_cfg |= interrupt;
|
||||
else
|
||||
dvp->dvp_cfg &= (~interrupt);
|
||||
|
@ -254,7 +252,7 @@ void dvp_config_interrupt(uint32_t interrupt, uint8_t enable)
|
|||
|
||||
int dvp_get_interrupt(uint32_t interrupt)
|
||||
{
|
||||
if (dvp->sts & interrupt)
|
||||
if(dvp->sts & interrupt)
|
||||
return 1;
|
||||
return 0;
|
||||
}
|
||||
|
@ -279,19 +277,17 @@ void dvp_set_output_enable(dvp_output_mode_t index, int enable)
|
|||
{
|
||||
configASSERT(index < 2);
|
||||
|
||||
if (index == 0)
|
||||
if(index == 0)
|
||||
{
|
||||
if (enable)
|
||||
if(enable)
|
||||
dvp->dvp_cfg |= DVP_CFG_AI_OUTPUT_ENABLE;
|
||||
else
|
||||
dvp->dvp_cfg &= ~DVP_CFG_AI_OUTPUT_ENABLE;
|
||||
}
|
||||
else
|
||||
} else
|
||||
{
|
||||
if (enable)
|
||||
if(enable)
|
||||
dvp->dvp_cfg |= DVP_CFG_DISPLAY_OUTPUT_ENABLE;
|
||||
else
|
||||
dvp->dvp_cfg &= ~DVP_CFG_DISPLAY_OUTPUT_ENABLE;
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
@ -14,9 +14,9 @@
|
|||
*/
|
||||
#include <stddef.h>
|
||||
#include "dmac.h"
|
||||
#include "utils.h"
|
||||
#include "sysctl.h"
|
||||
#include "fft.h"
|
||||
#include "sysctl.h"
|
||||
#include "utils.h"
|
||||
|
||||
static volatile fft_t *const fft = (volatile fft_t *)FFT_BASE_ADDR;
|
||||
|
||||
|
@ -59,10 +59,8 @@ void fft_complex_uint16_dma(dmac_channel_number_t dma_send_channel_num, dmac_cha
|
|||
sysctl_dma_select(dma_receive_channel_num, SYSCTL_DMA_SELECT_FFT_RX_REQ);
|
||||
sysctl_dma_select(dma_send_channel_num, SYSCTL_DMA_SELECT_FFT_TX_REQ);
|
||||
dmac_set_single_mode(dma_receive_channel_num, (void *)(&fft->fft_output_fifo), output, DMAC_ADDR_NOCHANGE, DMAC_ADDR_INCREMENT,
|
||||
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_64, point_num>>1);
|
||||
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_64, point_num >> 1);
|
||||
dmac_set_single_mode(dma_send_channel_num, input, (void *)(&fft->fft_input_fifo), DMAC_ADDR_INCREMENT, DMAC_ADDR_NOCHANGE,
|
||||
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_64, point_num>>1);
|
||||
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_64, point_num >> 1);
|
||||
dmac_wait_done(dma_receive_channel_num);
|
||||
}
|
||||
|
||||
|
||||
|
|
1593
lib/drivers/fpioa.c
1593
lib/drivers/fpioa.c
File diff suppressed because it is too large
Load Diff
|
@ -12,13 +12,13 @@
|
|||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
#include "gpio.h"
|
||||
#include "utils.h"
|
||||
#include "fpioa.h"
|
||||
#include "gpio.h"
|
||||
#include "sysctl.h"
|
||||
#include "utils.h"
|
||||
#define GPIO_MAX_PINNO 8
|
||||
|
||||
volatile gpio_t* const gpio = (volatile gpio_t*)GPIO_BASE_ADDR;
|
||||
volatile gpio_t *const gpio = (volatile gpio_t *)GPIO_BASE_ADDR;
|
||||
|
||||
int gpio_init(void)
|
||||
{
|
||||
|
@ -34,7 +34,7 @@ void gpio_set_drive_mode(uint8_t pin, gpio_drive_mode_t mode)
|
|||
fpioa_pull_t pull;
|
||||
uint32_t dir;
|
||||
|
||||
switch (mode)
|
||||
switch(mode)
|
||||
{
|
||||
case GPIO_DM_INPUT:
|
||||
pull = FPIOA_PULL_NONE;
|
||||
|
@ -76,4 +76,3 @@ void gpio_set_pin(uint8_t pin, gpio_pin_value_t value)
|
|||
configASSERT(dir == 1);
|
||||
set_gpio_bit(reg, pin, value);
|
||||
}
|
||||
|
||||
|
|
|
@ -12,13 +12,13 @@
|
|||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
#include "gpiohs.h"
|
||||
#include "utils.h"
|
||||
#include "fpioa.h"
|
||||
#include "gpiohs.h"
|
||||
#include "sysctl.h"
|
||||
#include "utils.h"
|
||||
#define GPIOHS_MAX_PINNO 32
|
||||
|
||||
volatile gpiohs_t* const gpiohs = (volatile gpiohs_t*)GPIOHS_BASE_ADDR;
|
||||
volatile gpiohs_t *const gpiohs = (volatile gpiohs_t *)GPIOHS_BASE_ADDR;
|
||||
|
||||
typedef struct _gpiohs_pin_instance
|
||||
{
|
||||
|
@ -40,7 +40,7 @@ void gpiohs_set_drive_mode(uint8_t pin, gpio_drive_mode_t mode)
|
|||
fpioa_pull_t pull;
|
||||
uint32_t dir;
|
||||
|
||||
switch (mode)
|
||||
switch(mode)
|
||||
{
|
||||
case GPIO_DM_INPUT:
|
||||
pull = FPIOA_PULL_NONE;
|
||||
|
@ -98,8 +98,7 @@ void gpiohs_set_pin_edge(uint8_t pin, gpio_pin_edge_t edge)
|
|||
if(edge & GPIO_PE_FALLING)
|
||||
{
|
||||
set_gpio_bit(gpiohs->fall_ie.u32, pin, 1);
|
||||
}
|
||||
else
|
||||
} else
|
||||
{
|
||||
set_gpio_bit(gpiohs->fall_ie.u32, pin, 0);
|
||||
}
|
||||
|
@ -107,8 +106,7 @@ void gpiohs_set_pin_edge(uint8_t pin, gpio_pin_edge_t edge)
|
|||
if(edge & GPIO_PE_RISING)
|
||||
{
|
||||
set_gpio_bit(gpiohs->rise_ie.u32, pin, 1);
|
||||
}
|
||||
else
|
||||
} else
|
||||
{
|
||||
set_gpio_bit(gpiohs->rise_ie.u32, pin, 0);
|
||||
}
|
||||
|
@ -116,8 +114,7 @@ void gpiohs_set_pin_edge(uint8_t pin, gpio_pin_edge_t edge)
|
|||
if(edge & GPIO_PE_LOW)
|
||||
{
|
||||
set_gpio_bit(gpiohs->low_ie.u32, pin, 1);
|
||||
}
|
||||
else
|
||||
} else
|
||||
{
|
||||
set_gpio_bit(gpiohs->low_ie.u32, pin, 0);
|
||||
}
|
||||
|
@ -125,8 +122,7 @@ void gpiohs_set_pin_edge(uint8_t pin, gpio_pin_edge_t edge)
|
|||
if(edge & GPIO_PE_HIGH)
|
||||
{
|
||||
set_gpio_bit(gpiohs->high_ie.u32, pin, 1);
|
||||
}
|
||||
else
|
||||
} else
|
||||
{
|
||||
set_gpio_bit(gpiohs->high_ie.u32, pin, 0);
|
||||
}
|
||||
|
@ -167,7 +163,7 @@ int gpiohs_pin_onchange_isr(void *userdata)
|
|||
set_gpio_bit(gpiohs->high_ie.u32, pin, 1);
|
||||
}
|
||||
|
||||
if (ctx->callback)
|
||||
if(ctx->callback)
|
||||
ctx->callback();
|
||||
if(ctx->gpiohs_callback)
|
||||
ctx->gpiohs_callback(ctx->context);
|
||||
|
@ -215,4 +211,3 @@ void gpiohs_irq_disable(size_t pin)
|
|||
{
|
||||
plic_irq_disable(IRQN_GPIOHS0_INTERRUPT + pin);
|
||||
}
|
||||
|
||||
|
|
|
@ -13,14 +13,14 @@
|
|||
* limitations under the License.
|
||||
*/
|
||||
#include <stddef.h>
|
||||
#include "i2c.h"
|
||||
#include "utils.h"
|
||||
#include "bsp.h"
|
||||
#include "fpioa.h"
|
||||
#include "i2c.h"
|
||||
#include "platform.h"
|
||||
#include "stdlib.h"
|
||||
#include "string.h"
|
||||
#include "sysctl.h"
|
||||
#include "bsp.h"
|
||||
#include "utils.h"
|
||||
|
||||
typedef struct _i2c_slave_instance
|
||||
{
|
||||
|
@ -41,12 +41,11 @@ typedef struct _i2c_instance
|
|||
|
||||
static i2c_instance_t g_i2c_instance[3];
|
||||
|
||||
volatile i2c_t* const i2c[3] =
|
||||
{
|
||||
(volatile i2c_t*)I2C0_BASE_ADDR,
|
||||
(volatile i2c_t*)I2C1_BASE_ADDR,
|
||||
(volatile i2c_t*)I2C2_BASE_ADDR
|
||||
};
|
||||
volatile i2c_t *const i2c[3] =
|
||||
{
|
||||
(volatile i2c_t *)I2C0_BASE_ADDR,
|
||||
(volatile i2c_t *)I2C1_BASE_ADDR,
|
||||
(volatile i2c_t *)I2C2_BASE_ADDR};
|
||||
|
||||
static void i2c_clk_init(i2c_device_number_t i2c_num)
|
||||
{
|
||||
|
@ -90,21 +89,21 @@ static int i2c_slave_irq(void *userdata)
|
|||
i2c_slave_instance_t *instance = (i2c_slave_instance_t *)userdata;
|
||||
volatile i2c_t *i2c_adapter = i2c[instance->i2c_num];
|
||||
uint32_t status = i2c_adapter->intr_stat;
|
||||
if (status & I2C_INTR_STAT_START_DET)
|
||||
if(status & I2C_INTR_STAT_START_DET)
|
||||
{
|
||||
instance->slave_handler->on_event(I2C_EV_START);
|
||||
readl(&i2c_adapter->clr_start_det);
|
||||
}
|
||||
if (status & I2C_INTR_STAT_STOP_DET)
|
||||
if(status & I2C_INTR_STAT_STOP_DET)
|
||||
{
|
||||
instance->slave_handler->on_event(I2C_EV_STOP);
|
||||
readl(&i2c_adapter->clr_stop_det);
|
||||
}
|
||||
if (status & I2C_INTR_STAT_RX_FULL)
|
||||
if(status & I2C_INTR_STAT_RX_FULL)
|
||||
{
|
||||
instance->slave_handler->on_receive(i2c_adapter->data_cmd);
|
||||
}
|
||||
if (status & I2C_INTR_STAT_RD_REQ)
|
||||
if(status & I2C_INTR_STAT_RD_REQ)
|
||||
{
|
||||
i2c_adapter->data_cmd = instance->slave_handler->on_transmit();
|
||||
readl(&i2c_adapter->clr_rd_req);
|
||||
|
@ -140,23 +139,23 @@ void i2c_init_as_slave(i2c_device_number_t i2c_num, uint32_t slave_address, uint
|
|||
int i2c_send_data(i2c_device_number_t i2c_num, const uint8_t *send_buf, size_t send_buf_len)
|
||||
{
|
||||
configASSERT(i2c_num < I2C_MAX_NUM);
|
||||
volatile i2c_t* i2c_adapter = i2c[i2c_num];
|
||||
volatile i2c_t *i2c_adapter = i2c[i2c_num];
|
||||
size_t fifo_len, index;
|
||||
i2c_adapter->clr_tx_abrt = i2c_adapter->clr_tx_abrt;
|
||||
while (send_buf_len)
|
||||
while(send_buf_len)
|
||||
{
|
||||
fifo_len = 8 - i2c_adapter->txflr;
|
||||
fifo_len = send_buf_len < fifo_len ? send_buf_len : fifo_len;
|
||||
for (index = 0; index < fifo_len; index++)
|
||||
for(index = 0; index < fifo_len; index++)
|
||||
i2c_adapter->data_cmd = I2C_DATA_CMD_DATA(*send_buf++);
|
||||
if (i2c_adapter->tx_abrt_source != 0)
|
||||
if(i2c_adapter->tx_abrt_source != 0)
|
||||
return 1;
|
||||
send_buf_len -= fifo_len;
|
||||
}
|
||||
while ((i2c_adapter->status & I2C_STATUS_ACTIVITY) || !(i2c_adapter->status & I2C_STATUS_TFE))
|
||||
while((i2c_adapter->status & I2C_STATUS_ACTIVITY) || !(i2c_adapter->status & I2C_STATUS_TFE))
|
||||
;
|
||||
|
||||
if (i2c_adapter->tx_abrt_source != 0)
|
||||
if(i2c_adapter->tx_abrt_source != 0)
|
||||
return 1;
|
||||
|
||||
return 0;
|
||||
|
@ -166,11 +165,11 @@ void i2c_send_data_dma(dmac_channel_number_t dma_channel_num, i2c_device_number_
|
|||
size_t send_buf_len)
|
||||
{
|
||||
configASSERT(i2c_num < I2C_MAX_NUM);
|
||||
volatile i2c_t* i2c_adapter = i2c[i2c_num];
|
||||
volatile i2c_t *i2c_adapter = i2c[i2c_num];
|
||||
i2c_adapter->clr_tx_abrt = i2c_adapter->clr_tx_abrt;
|
||||
uint32_t *buf = malloc(send_buf_len * sizeof(uint32_t));
|
||||
int i;
|
||||
for (i = 0; i < send_buf_len; i++)
|
||||
for(i = 0; i < send_buf_len; i++)
|
||||
{
|
||||
buf[i] = send_buf[i];
|
||||
}
|
||||
|
@ -182,9 +181,9 @@ void i2c_send_data_dma(dmac_channel_number_t dma_channel_num, i2c_device_number_
|
|||
dmac_wait_done(dma_channel_num);
|
||||
free((void *)buf);
|
||||
|
||||
while ((i2c_adapter->status & I2C_STATUS_ACTIVITY) || !(i2c_adapter->status & I2C_STATUS_TFE))
|
||||
while((i2c_adapter->status & I2C_STATUS_ACTIVITY) || !(i2c_adapter->status & I2C_STATUS_TFE))
|
||||
{
|
||||
if (i2c_adapter->tx_abrt_source != 0)
|
||||
if(i2c_adapter->tx_abrt_source != 0)
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
@ -196,31 +195,31 @@ int i2c_recv_data(i2c_device_number_t i2c_num, const uint8_t *send_buf, size_t s
|
|||
|
||||
size_t fifo_len, index;
|
||||
size_t rx_len = receive_buf_len;
|
||||
volatile i2c_t* i2c_adapter = i2c[i2c_num];
|
||||
volatile i2c_t *i2c_adapter = i2c[i2c_num];
|
||||
|
||||
while (send_buf_len)
|
||||
while(send_buf_len)
|
||||
{
|
||||
fifo_len = 8 - i2c_adapter->txflr;
|
||||
fifo_len = send_buf_len < fifo_len ? send_buf_len : fifo_len;
|
||||
for (index = 0; index < fifo_len; index++)
|
||||
for(index = 0; index < fifo_len; index++)
|
||||
i2c_adapter->data_cmd = I2C_DATA_CMD_DATA(*send_buf++);
|
||||
if (i2c_adapter->tx_abrt_source != 0)
|
||||
if(i2c_adapter->tx_abrt_source != 0)
|
||||
return 1;
|
||||
send_buf_len -= fifo_len;
|
||||
}
|
||||
|
||||
while (receive_buf_len || rx_len)
|
||||
while(receive_buf_len || rx_len)
|
||||
{
|
||||
fifo_len = i2c_adapter->rxflr;
|
||||
fifo_len = rx_len < fifo_len ? rx_len : fifo_len;
|
||||
for (index = 0; index < fifo_len; index++)
|
||||
for(index = 0; index < fifo_len; index++)
|
||||
*receive_buf++ = (uint8_t)i2c_adapter->data_cmd;
|
||||
rx_len -= fifo_len;
|
||||
fifo_len = 8 - i2c_adapter->txflr;
|
||||
fifo_len = receive_buf_len < fifo_len ? receive_buf_len : fifo_len;
|
||||
for (index = 0; index < fifo_len; index++)
|
||||
for(index = 0; index < fifo_len; index++)
|
||||
i2c_adapter->data_cmd = I2C_DATA_CMD_CMD;
|
||||
if (i2c_adapter->tx_abrt_source != 0)
|
||||
if(i2c_adapter->tx_abrt_source != 0)
|
||||
return 1;
|
||||
receive_buf_len -= fifo_len;
|
||||
}
|
||||
|
@ -233,28 +232,28 @@ void i2c_recv_data_dma(dmac_channel_number_t dma_send_channel_num, dmac_channel_
|
|||
{
|
||||
configASSERT(i2c_num < I2C_MAX_NUM);
|
||||
|
||||
volatile i2c_t* i2c_adapter = i2c[i2c_num];
|
||||
volatile i2c_t *i2c_adapter = i2c[i2c_num];
|
||||
|
||||
uint32_t *write_cmd = malloc(sizeof(uint32_t) * (send_buf_len + receive_buf_len));
|
||||
size_t i;
|
||||
for(i = 0; i < send_buf_len; i++)
|
||||
write_cmd[i] = *send_buf++;
|
||||
for (i = 0; i < receive_buf_len; i++)
|
||||
for(i = 0; i < receive_buf_len; i++)
|
||||
write_cmd[i + send_buf_len] = I2C_DATA_CMD_CMD;
|
||||
|
||||
sysctl_dma_select((sysctl_dma_channel_t)dma_send_channel_num, SYSCTL_DMA_SELECT_I2C0_TX_REQ + i2c_num * 2);
|
||||
sysctl_dma_select((sysctl_dma_channel_t)dma_receive_channel_num, SYSCTL_DMA_SELECT_I2C0_RX_REQ + i2c_num * 2);
|
||||
|
||||
dmac_set_single_mode(dma_receive_channel_num, (void *)(&i2c_adapter->data_cmd), write_cmd, DMAC_ADDR_NOCHANGE,
|
||||
DMAC_ADDR_INCREMENT,DMAC_MSIZE_1, DMAC_TRANS_WIDTH_32, receive_buf_len);
|
||||
DMAC_ADDR_INCREMENT, DMAC_MSIZE_1, DMAC_TRANS_WIDTH_32, receive_buf_len);
|
||||
|
||||
dmac_set_single_mode(dma_send_channel_num, write_cmd, (void *)(&i2c_adapter->data_cmd), DMAC_ADDR_INCREMENT,
|
||||
DMAC_ADDR_NOCHANGE,DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, receive_buf_len + send_buf_len);
|
||||
DMAC_ADDR_NOCHANGE, DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, receive_buf_len + send_buf_len);
|
||||
|
||||
dmac_wait_done(dma_send_channel_num);
|
||||
dmac_wait_done(dma_receive_channel_num);
|
||||
|
||||
for (i = 0; i < receive_buf_len; i++)
|
||||
for(i = 0; i < receive_buf_len; i++)
|
||||
{
|
||||
receive_buf[i] = (uint8_t)write_cmd[i];
|
||||
}
|
||||
|
@ -265,13 +264,13 @@ void i2c_recv_data_dma(dmac_channel_number_t dma_send_channel_num, dmac_channel_
|
|||
static int i2c_dma_irq(void *ctx)
|
||||
{
|
||||
i2c_instance_t *v_instance = (i2c_instance_t *)ctx;
|
||||
volatile i2c_t* i2c_adapter = i2c[v_instance->i2c_num];
|
||||
volatile i2c_t *i2c_adapter = i2c[v_instance->i2c_num];
|
||||
dmac_irq_unregister(v_instance->dmac_channel);
|
||||
if(v_instance->transfer_mode == I2C_SEND)
|
||||
{
|
||||
while ((i2c_adapter->status & I2C_STATUS_ACTIVITY) || !(i2c_adapter->status & I2C_STATUS_TFE))
|
||||
while((i2c_adapter->status & I2C_STATUS_ACTIVITY) || !(i2c_adapter->status & I2C_STATUS_TFE))
|
||||
{
|
||||
if (i2c_adapter->tx_abrt_source != 0)
|
||||
if(i2c_adapter->tx_abrt_source != 0)
|
||||
{
|
||||
spinlock_unlock(&v_instance->lock);
|
||||
return -1;
|
||||
|
@ -298,7 +297,7 @@ void i2c_handle_data_dma(i2c_device_number_t i2c_num, i2c_data_t data, plic_inte
|
|||
g_i2c_instance[i2c_num].i2c_int_instance.ctx = cb->ctx;
|
||||
}
|
||||
|
||||
volatile i2c_t* i2c_adapter = i2c[i2c_num];
|
||||
volatile i2c_t *i2c_adapter = i2c[i2c_num];
|
||||
if(data.transfer_mode == I2C_SEND)
|
||||
{
|
||||
configASSERT(data.tx_buf && data.tx_len);
|
||||
|
@ -316,14 +315,13 @@ void i2c_handle_data_dma(i2c_device_number_t i2c_num, i2c_data_t data, plic_inte
|
|||
if(!cb)
|
||||
{
|
||||
dmac_wait_done(data.tx_channel);
|
||||
while ((i2c_adapter->status & I2C_STATUS_ACTIVITY) || !(i2c_adapter->status & I2C_STATUS_TFE))
|
||||
while((i2c_adapter->status & I2C_STATUS_ACTIVITY) || !(i2c_adapter->status & I2C_STATUS_TFE))
|
||||
{
|
||||
if (i2c_adapter->tx_abrt_source != 0)
|
||||
if(i2c_adapter->tx_abrt_source != 0)
|
||||
configASSERT(!"source abort");
|
||||
}
|
||||
}
|
||||
}
|
||||
else
|
||||
} else
|
||||
{
|
||||
configASSERT(data.rx_buf && data.rx_len);
|
||||
if(data.tx_len)
|
||||
|
@ -336,19 +334,19 @@ void i2c_handle_data_dma(i2c_device_number_t i2c_num, i2c_data_t data, plic_inte
|
|||
}
|
||||
sysctl_dma_select((sysctl_dma_channel_t)data.rx_channel, SYSCTL_DMA_SELECT_I2C0_RX_REQ + i2c_num * 2);
|
||||
dmac_set_single_mode(data.rx_channel, (void *)(&i2c_adapter->data_cmd), data.rx_buf, DMAC_ADDR_NOCHANGE,
|
||||
DMAC_ADDR_INCREMENT,DMAC_MSIZE_1, DMAC_TRANS_WIDTH_32, data.rx_len);
|
||||
DMAC_ADDR_INCREMENT, DMAC_MSIZE_1, DMAC_TRANS_WIDTH_32, data.rx_len);
|
||||
|
||||
sysctl_dma_select((sysctl_dma_channel_t)data.tx_channel, SYSCTL_DMA_SELECT_I2C0_TX_REQ + i2c_num * 2);
|
||||
if(data.tx_len)
|
||||
{
|
||||
configASSERT(data.tx_buf);
|
||||
dmac_set_single_mode(data.tx_channel, data.tx_buf, (void *)(&i2c_adapter->data_cmd), DMAC_ADDR_INCREMENT,
|
||||
DMAC_ADDR_NOCHANGE,DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, data.tx_len);
|
||||
DMAC_ADDR_NOCHANGE, DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, data.tx_len);
|
||||
dmac_wait_done(data.tx_channel);
|
||||
}
|
||||
static uint32_t s_read_cmd = I2C_DATA_CMD_CMD;
|
||||
dmac_set_single_mode(data.tx_channel, &s_read_cmd, (void *)(&i2c_adapter->data_cmd), DMAC_ADDR_NOCHANGE,
|
||||
DMAC_ADDR_NOCHANGE,DMAC_MSIZE_1, DMAC_TRANS_WIDTH_32, data.rx_len);
|
||||
DMAC_ADDR_NOCHANGE, DMAC_MSIZE_1, DMAC_TRANS_WIDTH_32, data.rx_len);
|
||||
|
||||
if(!cb)
|
||||
{
|
||||
|
|
|
@ -12,20 +12,19 @@
|
|||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
#include <math.h>
|
||||
#include <stdint.h>
|
||||
#include <stdio.h>
|
||||
#include <math.h>
|
||||
#include "i2s.h"
|
||||
#include "sysctl.h"
|
||||
#include "stdlib.h"
|
||||
#include "sysctl.h"
|
||||
#include "utils.h"
|
||||
|
||||
volatile i2s_t *const i2s[3] =
|
||||
{
|
||||
{
|
||||
(volatile i2s_t *)I2S0_BASE_ADDR,
|
||||
(volatile i2s_t *)I2S1_BASE_ADDR,
|
||||
(volatile i2s_t *)I2S2_BASE_ADDR
|
||||
};
|
||||
(volatile i2s_t *)I2S2_BASE_ADDR};
|
||||
|
||||
typedef struct _i2s_instance
|
||||
{
|
||||
|
@ -43,7 +42,7 @@ static int i2s_recv_channel_enable(i2s_device_number_t device_num,
|
|||
{
|
||||
rer_t u_rer;
|
||||
|
||||
if (channel_num < I2S_CHANNEL_0 || channel_num > I2S_CHANNEL_3)
|
||||
if(channel_num < I2S_CHANNEL_0 || channel_num > I2S_CHANNEL_3)
|
||||
return -1;
|
||||
u_rer.reg_data = readl(&i2s[device_num]->channel[channel_num].rer);
|
||||
u_rer.rer.rxchenx = enable;
|
||||
|
@ -56,7 +55,7 @@ static int i2s_transmit_channel_enable(i2s_device_number_t device_num,
|
|||
{
|
||||
ter_t u_ter;
|
||||
|
||||
if (channel_num < I2S_CHANNEL_0 || channel_num > I2S_CHANNEL_3)
|
||||
if(channel_num < I2S_CHANNEL_0 || channel_num > I2S_CHANNEL_3)
|
||||
return -1;
|
||||
|
||||
u_ter.reg_data = readl(&i2s[device_num]->channel[channel_num].ter);
|
||||
|
@ -105,14 +104,13 @@ static void i2s_disable_block(i2s_device_number_t device_num, i2s_transmit_t rxt
|
|||
irer_t u_irer;
|
||||
iter_t u_iter;
|
||||
|
||||
if (rxtx_mode == I2S_RECEIVER)
|
||||
if(rxtx_mode == I2S_RECEIVER)
|
||||
{
|
||||
u_irer.reg_data = readl(&i2s[device_num]->irer);
|
||||
u_irer.irer.rxen = 0;
|
||||
writel(u_irer.reg_data, &i2s[device_num]->irer);
|
||||
/* Receiver block disable */
|
||||
}
|
||||
else
|
||||
} else
|
||||
{
|
||||
u_iter.reg_data = readl(&i2s[device_num]->iter);
|
||||
u_iter.iter.txen = 0;
|
||||
|
@ -127,9 +125,9 @@ static int i2s_set_rx_word_length(i2s_device_number_t device_num,
|
|||
{
|
||||
rcr_tcr_t u_rcr;
|
||||
|
||||
if (word_length > RESOLUTION_32_BIT || word_length < IGNORE_WORD_LENGTH)
|
||||
if(word_length > RESOLUTION_32_BIT || word_length < IGNORE_WORD_LENGTH)
|
||||
return -1;
|
||||
if (channel_num < I2S_CHANNEL_0 || channel_num > I2S_CHANNEL_3)
|
||||
if(channel_num < I2S_CHANNEL_0 || channel_num > I2S_CHANNEL_3)
|
||||
return -1;
|
||||
|
||||
u_rcr.reg_data = readl(&i2s[device_num]->channel[channel_num].rcr);
|
||||
|
@ -144,9 +142,9 @@ static int i2s_set_tx_word_length(i2s_device_number_t device_num,
|
|||
{
|
||||
rcr_tcr_t u_tcr;
|
||||
|
||||
if (word_length > RESOLUTION_32_BIT || word_length < IGNORE_WORD_LENGTH)
|
||||
if(word_length > RESOLUTION_32_BIT || word_length < IGNORE_WORD_LENGTH)
|
||||
return -1;
|
||||
if (channel_num < I2S_CHANNEL_0 || channel_num > I2S_CHANNEL_3)
|
||||
if(channel_num < I2S_CHANNEL_0 || channel_num > I2S_CHANNEL_3)
|
||||
return -1;
|
||||
|
||||
u_tcr.reg_data = readl(&i2s[device_num]->channel[channel_num].tcr);
|
||||
|
@ -178,7 +176,6 @@ static void i2s_master_configure(i2s_device_number_t device_num,
|
|||
u_cer.cer.clken = 1;
|
||||
writel(u_cer.reg_data, &i2s[device_num]->cer);
|
||||
/* Clock generation enable */
|
||||
|
||||
}
|
||||
|
||||
static int i2s_set_rx_threshold(i2s_device_number_t device_num,
|
||||
|
@ -187,9 +184,9 @@ static int i2s_set_rx_threshold(i2s_device_number_t device_num,
|
|||
{
|
||||
rfcr_t u_rfcr;
|
||||
|
||||
if (threshold < TRIGGER_LEVEL_1 || threshold > TRIGGER_LEVEL_16)
|
||||
if(threshold < TRIGGER_LEVEL_1 || threshold > TRIGGER_LEVEL_16)
|
||||
return -1;
|
||||
if (channel_num < I2S_CHANNEL_0 || channel_num > I2S_CHANNEL_3)
|
||||
if(channel_num < I2S_CHANNEL_0 || channel_num > I2S_CHANNEL_3)
|
||||
return -1;
|
||||
|
||||
u_rfcr.reg_data = readl(&i2s[device_num]->channel[channel_num].rfcr);
|
||||
|
@ -205,9 +202,9 @@ static int i2s_set_tx_threshold(i2s_device_number_t device_num,
|
|||
{
|
||||
tfcr_t u_tfcr;
|
||||
|
||||
if (threshold < TRIGGER_LEVEL_1 || threshold > TRIGGER_LEVEL_16)
|
||||
if(threshold < TRIGGER_LEVEL_1 || threshold > TRIGGER_LEVEL_16)
|
||||
return -1;
|
||||
if (channel_num < I2S_CHANNEL_0 || channel_num > I2S_CHANNEL_3)
|
||||
if(channel_num < I2S_CHANNEL_0 || channel_num > I2S_CHANNEL_3)
|
||||
return -1;
|
||||
|
||||
u_tfcr.reg_data = readl(&i2s[device_num]->channel[channel_num].tfcr);
|
||||
|
@ -223,24 +220,24 @@ static int i2s_set_mask_interrupt(i2s_device_number_t device_num,
|
|||
{
|
||||
imr_t u_imr;
|
||||
|
||||
if (channel_num < I2S_CHANNEL_0 || channel_num > I2S_CHANNEL_3)
|
||||
if(channel_num < I2S_CHANNEL_0 || channel_num > I2S_CHANNEL_3)
|
||||
return -1;
|
||||
u_imr.reg_data = readl(&i2s[device_num]->channel[channel_num].imr);
|
||||
|
||||
if (rx_available_int == 1)
|
||||
if(rx_available_int == 1)
|
||||
u_imr.imr.rxdam = 1;
|
||||
else
|
||||
u_imr.imr.rxdam = 0;
|
||||
if (rx_overrun_int == 1)
|
||||
if(rx_overrun_int == 1)
|
||||
u_imr.imr.rxfom = 1;
|
||||
else
|
||||
u_imr.imr.rxfom = 0;
|
||||
|
||||
if (tx_empty_int == 1)
|
||||
if(tx_empty_int == 1)
|
||||
u_imr.imr.txfem = 1;
|
||||
else
|
||||
u_imr.imr.txfem = 0;
|
||||
if (tx_overrun_int == 1)
|
||||
if(tx_overrun_int == 1)
|
||||
u_imr.imr.txfom = 1;
|
||||
else
|
||||
u_imr.imr.txfom = 0;
|
||||
|
@ -252,7 +249,7 @@ static int i2s_transmit_dma_enable(i2s_device_number_t device_num, uint32_t enab
|
|||
{
|
||||
ccr_t u_ccr;
|
||||
|
||||
if (device_num >= I2S_DEVICE_MAX)
|
||||
if(device_num >= I2S_DEVICE_MAX)
|
||||
return -1;
|
||||
|
||||
u_ccr.reg_data = readl(&i2s[device_num]->ccr);
|
||||
|
@ -266,7 +263,7 @@ static int i2s_receive_dma_enable(i2s_device_number_t device_num, uint32_t enabl
|
|||
{
|
||||
ccr_t u_ccr;
|
||||
|
||||
if (device_num >= I2S_DEVICE_MAX)
|
||||
if(device_num >= I2S_DEVICE_MAX)
|
||||
return -1;
|
||||
|
||||
u_ccr.reg_data = readl(&i2s[device_num]->ccr);
|
||||
|
@ -280,7 +277,7 @@ int i2s_set_dma_divide_16(i2s_device_number_t device_num, uint32_t enable)
|
|||
{
|
||||
ccr_t u_ccr;
|
||||
|
||||
if (device_num >= I2S_DEVICE_MAX)
|
||||
if(device_num >= I2S_DEVICE_MAX)
|
||||
return -1;
|
||||
|
||||
u_ccr.reg_data = readl(&i2s[device_num]->ccr);
|
||||
|
@ -292,7 +289,7 @@ int i2s_set_dma_divide_16(i2s_device_number_t device_num, uint32_t enable)
|
|||
|
||||
int i2s_get_dma_divide_16(i2s_device_number_t device_num)
|
||||
{
|
||||
if (device_num >= I2S_DEVICE_MAX)
|
||||
if(device_num >= I2S_DEVICE_MAX)
|
||||
return -1;
|
||||
ccr_t u_ccr;
|
||||
u_ccr.reg_data = readl(&i2s[device_num]->ccr);
|
||||
|
@ -307,10 +304,10 @@ int i2s_receive_data(i2s_device_number_t device_num, i2s_channel_num_t channel_n
|
|||
readl(&i2s[device_num]->channel[channel_num].ror);
|
||||
/*clear over run*/
|
||||
|
||||
for (i = 0; i < buf_len;)
|
||||
for(i = 0; i < buf_len;)
|
||||
{
|
||||
u_isr.reg_data = readl(&i2s[device_num]->channel[channel_num].isr);
|
||||
if (u_isr.isr.rxda == 1)
|
||||
if(u_isr.isr.rxda == 1)
|
||||
{
|
||||
buf[i] = readl(&i2s[device_num]->channel[channel_num].left_rxtx);
|
||||
buf[i] <<= 32;
|
||||
|
@ -332,7 +329,7 @@ void i2s_receive_data_dma(i2s_device_number_t device_num, uint32_t *buf,
|
|||
int i2s_rx_to_tx(i2s_device_number_t device_src_num, i2s_device_number_t device_dest_num,
|
||||
size_t buf_len, dmac_channel_number_t channel_num)
|
||||
{
|
||||
static uint8_t dmac_recv_flag[6] = {0,0,0,0,0,0};
|
||||
static uint8_t dmac_recv_flag[6] = {0, 0, 0, 0, 0, 0};
|
||||
if(dmac_recv_flag[channel_num])
|
||||
dmac_wait_done(channel_num);
|
||||
else
|
||||
|
@ -351,17 +348,17 @@ int i2s_send_data(i2s_device_number_t device_num, i2s_channel_num_t channel_num,
|
|||
uint32_t right_buffer = 0;
|
||||
uint32_t i = 0;
|
||||
uint32_t j = 0;
|
||||
if (channel_num < I2S_CHANNEL_0 || channel_num > I2S_CHANNEL_3)
|
||||
if(channel_num < I2S_CHANNEL_0 || channel_num > I2S_CHANNEL_3)
|
||||
return -1;
|
||||
|
||||
buf_len = buf_len / (single_length / 8) / 2; /* sample num */
|
||||
readl(&i2s[device_num]->channel[channel_num].tor);
|
||||
/* read clear overrun flag */
|
||||
|
||||
for (j = 0; j < buf_len;)
|
||||
for(j = 0; j < buf_len;)
|
||||
{
|
||||
u_isr.reg_data = readl(&i2s[device_num]->channel[channel_num].isr);
|
||||
if (u_isr.isr.txfe == 1)
|
||||
if(u_isr.isr.txfe == 1)
|
||||
{
|
||||
switch(single_length)
|
||||
{
|
||||
|
@ -408,30 +405,30 @@ void i2s_send_data_dma(i2s_device_number_t device_num, const void *buf, size_t b
|
|||
static void i2s_parse_voice(i2s_device_number_t device_num, uint32_t *buf, const uint8_t *pcm, size_t length, size_t bits_per_sample,
|
||||
uint8_t track_num, size_t *send_len)
|
||||
{
|
||||
uint32_t i,j=0;
|
||||
uint32_t i, j = 0;
|
||||
*send_len = length * 2;
|
||||
switch(bits_per_sample)
|
||||
{
|
||||
case 16:
|
||||
for(i = 0; i < length; i++)
|
||||
{
|
||||
buf[2*i] = ((uint16_t *)pcm)[i];
|
||||
buf[2*i+1] = 0;
|
||||
buf[2 * i] = ((uint16_t *)pcm)[i];
|
||||
buf[2 * i + 1] = 0;
|
||||
}
|
||||
break;
|
||||
case 24:
|
||||
for(i = 0; i < length; i++)
|
||||
{
|
||||
buf[2*i] = 0;
|
||||
buf[2*i] |= pcm[j++];
|
||||
buf[2*i] |= pcm[j++] << 8;
|
||||
buf[2*i] |= pcm[j++] << 16;
|
||||
buf[2*i+1] = 0;
|
||||
buf[2 * i] = 0;
|
||||
buf[2 * i] |= pcm[j++];
|
||||
buf[2 * i] |= pcm[j++] << 8;
|
||||
buf[2 * i] |= pcm[j++] << 16;
|
||||
buf[2 * i + 1] = 0;
|
||||
if(track_num == 2)
|
||||
{
|
||||
buf[2*i+1] |= pcm[j++];
|
||||
buf[2*i+1] |= pcm[j++] << 8;
|
||||
buf[2*i+1] |= pcm[j++] << 16;
|
||||
buf[2 * i + 1] |= pcm[j++];
|
||||
buf[2 * i + 1] |= pcm[j++] << 8;
|
||||
buf[2 * i + 1] |= pcm[j++] << 16;
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
@ -439,66 +436,63 @@ static void i2s_parse_voice(i2s_device_number_t device_num, uint32_t *buf, const
|
|||
default:
|
||||
for(i = 0; i < length; i++)
|
||||
{
|
||||
buf[2*i] = ((uint32_t *)pcm)[i];
|
||||
buf[2*i+1] = 0;
|
||||
buf[2 * i] = ((uint32_t *)pcm)[i];
|
||||
buf[2 * i + 1] = 0;
|
||||
}
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void i2s_play(i2s_device_number_t device_num, dmac_channel_number_t channel_num,
|
||||
const uint8_t *buf, size_t buf_len, size_t frame, size_t bits_per_sample, uint8_t track_num)
|
||||
{
|
||||
const uint8_t *trans_buf;
|
||||
uint32_t i;
|
||||
size_t sample_cnt = buf_len / ( bits_per_sample / 8 ) / track_num;
|
||||
size_t sample_cnt = buf_len / (bits_per_sample / 8) / track_num;
|
||||
size_t frame_cnt = sample_cnt / frame;
|
||||
size_t frame_remain = sample_cnt % frame;
|
||||
i2s_set_dma_divide_16(device_num, 0);
|
||||
|
||||
if (bits_per_sample == 16 && track_num == 2)
|
||||
if(bits_per_sample == 16 && track_num == 2)
|
||||
{
|
||||
i2s_set_dma_divide_16(device_num, 1);
|
||||
for (i = 0; i < frame_cnt; i++)
|
||||
for(i = 0; i < frame_cnt; i++)
|
||||
{
|
||||
trans_buf = buf + i * frame * (bits_per_sample / 8) * track_num;
|
||||
i2s_send_data_dma(device_num,trans_buf, frame, channel_num);
|
||||
i2s_send_data_dma(device_num, trans_buf, frame, channel_num);
|
||||
}
|
||||
if(frame_remain)
|
||||
{
|
||||
trans_buf = buf + frame_cnt * frame * (bits_per_sample / 8) * track_num;
|
||||
i2s_send_data_dma(device_num, trans_buf, frame_remain, channel_num);
|
||||
}
|
||||
}
|
||||
else if (bits_per_sample == 32 && track_num == 2)
|
||||
} else if(bits_per_sample == 32 && track_num == 2)
|
||||
{
|
||||
for (i = 0; i < frame_cnt; i++)
|
||||
for(i = 0; i < frame_cnt; i++)
|
||||
{
|
||||
trans_buf = buf + i * frame * (bits_per_sample / 8) * track_num;
|
||||
i2s_send_data_dma(device_num,trans_buf, frame * 2, channel_num);
|
||||
i2s_send_data_dma(device_num, trans_buf, frame * 2, channel_num);
|
||||
}
|
||||
if(frame_remain)
|
||||
{
|
||||
trans_buf = buf + frame_cnt * frame * (bits_per_sample / 8) * track_num;
|
||||
i2s_send_data_dma(device_num, trans_buf, frame_remain * 2, channel_num);
|
||||
}
|
||||
}
|
||||
else
|
||||
} else
|
||||
{
|
||||
uint32_t *buff[2];
|
||||
buff[0] = malloc(frame * 2 * sizeof(uint32_t) * 2);
|
||||
buff[1] = buff[0] + frame * 2;
|
||||
uint8_t flag = 0;
|
||||
size_t send_len = 0;
|
||||
for (i = 0; i < frame_cnt; i++)
|
||||
for(i = 0; i < frame_cnt; i++)
|
||||
{
|
||||
trans_buf = buf + i * frame * (bits_per_sample / 8) * track_num;
|
||||
i2s_parse_voice(device_num, buff[flag], trans_buf, frame, bits_per_sample, track_num, &send_len);
|
||||
i2s_send_data_dma(device_num,buff[flag], send_len, channel_num);
|
||||
i2s_send_data_dma(device_num, buff[flag], send_len, channel_num);
|
||||
flag = !flag;
|
||||
}
|
||||
if (frame_remain)
|
||||
if(frame_remain)
|
||||
{
|
||||
trans_buf = buf + frame_cnt * frame * (bits_per_sample / 8) * track_num;
|
||||
i2s_parse_voice(device_num, buff[flag], trans_buf, frame_remain, bits_per_sample, track_num, &send_len);
|
||||
|
@ -592,33 +586,30 @@ void i2s_init(i2s_device_number_t device_num, i2s_transmit_t rxtx_mode, uint32_t
|
|||
i2s_disable_block(device_num, I2S_TRANSMITTER);
|
||||
i2s_disable_block(device_num, I2S_RECEIVER);
|
||||
|
||||
if (rxtx_mode == I2S_TRANSMITTER)
|
||||
if(rxtx_mode == I2S_TRANSMITTER)
|
||||
{
|
||||
for (int i=0; i<4; i++)
|
||||
for(int i = 0; i < 4; i++)
|
||||
{
|
||||
if ((channel_mask & 0x3) == 0x3)
|
||||
if((channel_mask & 0x3) == 0x3)
|
||||
{
|
||||
i2s_set_mask_interrupt(device_num, I2S_CHANNEL_0 + i, 1, 1, 1, 1);
|
||||
i2s_transimit_enable(device_num, I2S_CHANNEL_0 + i);
|
||||
}
|
||||
else
|
||||
} else
|
||||
{
|
||||
i2s_transmit_channel_enable(device_num, I2S_CHANNEL_0 + i, 0);
|
||||
}
|
||||
channel_mask >>= 2;
|
||||
}
|
||||
i2s_transmit_dma_enable(device_num, 1);
|
||||
}
|
||||
else
|
||||
} else
|
||||
{
|
||||
for (int i=0; i<4; i++)
|
||||
for(int i = 0; i < 4; i++)
|
||||
{
|
||||
if ((channel_mask & 0x3) == 0x3)
|
||||
if((channel_mask & 0x3) == 0x3)
|
||||
{
|
||||
i2s_set_mask_interrupt(device_num, I2S_CHANNEL_0 + i, 1, 1, 1, 1);
|
||||
i2s_receive_enable(device_num, I2S_CHANNEL_0 + i);
|
||||
}
|
||||
else
|
||||
} else
|
||||
{
|
||||
i2s_recv_channel_enable(device_num, I2S_CHANNEL_0 + i, 0);
|
||||
}
|
||||
|
@ -680,8 +671,7 @@ void i2s_handle_data_dma(i2s_device_number_t device_num, i2s_data_t data, plic_i
|
|||
{
|
||||
dmac_wait_done(data.tx_channel);
|
||||
}
|
||||
}
|
||||
else
|
||||
} else
|
||||
{
|
||||
configASSERT(data.rx_buf && data.rx_len);
|
||||
if(!data.nowait_dma_idle)
|
||||
|
@ -705,4 +695,3 @@ void i2s_handle_data_dma(i2s_device_number_t device_num, i2s_data_t data, plic_i
|
|||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
@ -14,10 +14,10 @@
|
|||
*/
|
||||
#ifndef _DRIVER_AES_H
|
||||
#define _DRIVER_AES_H
|
||||
#include <stdlib.h>
|
||||
#include <stdint.h>
|
||||
#include "platform.h"
|
||||
#include <stdlib.h>
|
||||
#include "dmac.h"
|
||||
#include "platform.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
|
@ -739,7 +739,7 @@ void aes_gcm256_hard_encrypt_dma(dmac_channel_number_t dma_receive_channel_num,
|
|||
* @param[in] gcm_aad_len The length of the gcm_aad.
|
||||
* @param[in] input_data_len The length of the input_data.
|
||||
*/
|
||||
void aes_init(uint8_t *input_key, size_t input_key_len, uint8_t *iv,size_t iv_len, uint8_t *gcm_aad,
|
||||
void aes_init(uint8_t *input_key, size_t input_key_len, uint8_t *iv, size_t iv_len, uint8_t *gcm_aad,
|
||||
aes_cipher_mode_t cipher_mode, aes_encrypt_sel_t encrypt_sel, size_t gcm_aad_len, size_t input_data_len);
|
||||
|
||||
/**
|
||||
|
|
|
@ -129,7 +129,7 @@ typedef struct _clint
|
|||
/**
|
||||
* @brief Clint object instanse
|
||||
*/
|
||||
extern volatile clint_t* const clint;
|
||||
extern volatile clint_t *const clint;
|
||||
|
||||
/**
|
||||
* @brief Definitions for the timer callbacks
|
||||
|
@ -335,4 +335,3 @@ int clint_ipi_unregister(void);
|
|||
#endif
|
||||
|
||||
#endif /* _DRIVER_CLINT_H */
|
||||
|
||||
|
|
|
@ -15,12 +15,12 @@
|
|||
#ifndef _DRIVER_DMAC_H
|
||||
#define _DRIVER_DMAC_H
|
||||
|
||||
#include <stddef.h>
|
||||
#include <stdint.h>
|
||||
#include "io.h"
|
||||
#include "platform.h"
|
||||
#include "stdbool.h"
|
||||
#include "plic.h"
|
||||
#include <stddef.h>
|
||||
#include "stdbool.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
|
@ -1472,7 +1472,7 @@ void dmac_wait_idle(dmac_channel_number_t channel_num);
|
|||
* @param[in] ctx The param of callback
|
||||
* @param[in] priority Interrupt priority
|
||||
*/
|
||||
void dmac_set_irq(dmac_channel_number_t channel_num , plic_irq_callback_t dmac_callback, void *ctx, uint32_t priority);
|
||||
void dmac_set_irq(dmac_channel_number_t channel_num, plic_irq_callback_t dmac_callback, void *ctx, uint32_t priority);
|
||||
|
||||
/**
|
||||
* @brief Set interrupt param
|
||||
|
@ -1482,8 +1482,7 @@ void dmac_set_irq(dmac_channel_number_t channel_num , plic_irq_callback_t dmac_c
|
|||
* @param[in] ctx The param of callback
|
||||
* @param[in] priority Interrupt priority
|
||||
*/
|
||||
void dmac_irq_register(dmac_channel_number_t channel_num , plic_irq_callback_t dmac_callback, void *ctx, uint32_t priority);
|
||||
|
||||
void dmac_irq_register(dmac_channel_number_t channel_num, plic_irq_callback_t dmac_callback, void *ctx, uint32_t priority);
|
||||
|
||||
/**
|
||||
* @brief Unregister dmac interrupt
|
||||
|
|
|
@ -105,7 +105,7 @@ typedef enum _dvp_output_mode
|
|||
/**
|
||||
* @brief DVP object instance
|
||||
*/
|
||||
extern volatile dvp_t* const dvp;
|
||||
extern volatile dvp_t *const dvp;
|
||||
|
||||
/**
|
||||
* @brief Initialize DVP
|
||||
|
|
|
@ -244,4 +244,3 @@ void fft_complex_uint16_dma(dmac_channel_number_t dma_send_channel_num,
|
|||
#endif
|
||||
|
||||
#endif /* _DRIVER_FFT_H */
|
||||
|
||||
|
|
|
@ -1033,4 +1033,3 @@ int fpioa_set_oe_inv(int number, uint8_t inv_enable);
|
|||
#endif
|
||||
|
||||
#endif /* _DRIVER_FPIOA_H */
|
||||
|
||||
|
|
|
@ -15,10 +15,10 @@
|
|||
#ifndef _DRIVER_GPIO_H
|
||||
#define _DRIVER_GPIO_H
|
||||
|
||||
#include "platform.h"
|
||||
#include <inttypes.h>
|
||||
#include <stddef.h>
|
||||
#include "gpio_common.h"
|
||||
#include "platform.h"
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
@ -165,4 +165,3 @@ void gpio_set_pin(uint8_t pin, gpio_pin_value_t value);
|
|||
#endif
|
||||
|
||||
#endif /* _DRIVER_GPIO_H */
|
||||
|
||||
|
|
|
@ -48,4 +48,3 @@ typedef enum _gpio_pin_value
|
|||
#endif
|
||||
|
||||
#endif /* _GPIO_COMMON_H */
|
||||
|
||||
|
|
|
@ -15,10 +15,10 @@
|
|||
#ifndef _DRIVER_GPIOHS_H
|
||||
#define _DRIVER_GPIOHS_H
|
||||
|
||||
#include <stdint.h>
|
||||
#include "platform.h"
|
||||
#include <stddef.h>
|
||||
#include <stdint.h>
|
||||
#include "gpio_common.h"
|
||||
#include "platform.h"
|
||||
#include "plic.h"
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
|
@ -240,7 +240,7 @@ void gpiohs_set_pin_edge(uint8_t pin, gpio_pin_edge_t edge);
|
|||
* @param[in] priority Gpiohs pin interrupt priority
|
||||
* @param[in] func Gpiohs pin interrupt service routine
|
||||
*/
|
||||
void gpiohs_set_irq(uint8_t pin, uint32_t priority, void(*func)());
|
||||
void gpiohs_set_irq(uint8_t pin, uint32_t priority, void (*func)());
|
||||
|
||||
/**
|
||||
* @brief Set Gpiohs pin interrupt
|
||||
|
@ -264,4 +264,3 @@ void gpiohs_irq_unregister(uint8_t pin);
|
|||
#endif
|
||||
|
||||
#endif /* _DRIVER_GPIOHS_H */
|
||||
|
||||
|
|
|
@ -15,8 +15,8 @@
|
|||
#ifndef _DRIVER_I2C_H
|
||||
#define _DRIVER_I2C_H
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stddef.h>
|
||||
#include <stdint.h>
|
||||
#include "dmac.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
|
@ -349,9 +349,9 @@ typedef enum _i2c_event
|
|||
|
||||
typedef struct _i2c_slave_handler
|
||||
{
|
||||
void(*on_receive)(uint32_t data);
|
||||
uint32_t(*on_transmit)();
|
||||
void(*on_event)(i2c_event_t event);
|
||||
void (*on_receive)(uint32_t data);
|
||||
uint32_t (*on_transmit)();
|
||||
void (*on_event)(i2c_event_t event);
|
||||
} i2c_slave_handler_t;
|
||||
|
||||
typedef enum _i2c_transfer_mode
|
||||
|
|
|
@ -15,18 +15,17 @@
|
|||
#ifndef _DRIVER_I2S_H
|
||||
#define _DRIVER_I2S_H
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stddef.h>
|
||||
#include "platform.h"
|
||||
#include "io.h"
|
||||
#include "dmac.h"
|
||||
#include <stdint.h>
|
||||
#include "bsp.h"
|
||||
#include "dmac.h"
|
||||
#include "io.h"
|
||||
#include "platform.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
|
||||
#define I2S0_IN_D0 90
|
||||
#define I2S0_SCLK 88
|
||||
#define I2S0_WS 89
|
||||
|
@ -136,7 +135,6 @@ typedef enum _fifo_threshold
|
|||
TRIGGER_LEVEL_16 = 0xf
|
||||
} i2s_fifo_threshold_t;
|
||||
|
||||
|
||||
typedef struct _i2s_ier
|
||||
{
|
||||
/* Bit 0 is ien, 0 for disable i2s and 1 for enable i2s */
|
||||
|
@ -336,7 +334,8 @@ typedef struct _i2s_rcr_tcr
|
|||
uint32_t resv : 29;
|
||||
} __attribute__((packed, aligned(4))) i2s_rcr_tcr_t;
|
||||
|
||||
typedef union _rcr_tcr_u {
|
||||
typedef union _rcr_tcr_u
|
||||
{
|
||||
i2s_rcr_tcr_t rcr_tcr;
|
||||
uint32_t reg_data;
|
||||
} rcr_tcr_t;
|
||||
|
|
|
@ -15,8 +15,8 @@
|
|||
#ifndef _KPU_H
|
||||
#define _KPU_H
|
||||
|
||||
#include <stdint.h>
|
||||
#include <plic.h>
|
||||
#include <stdint.h>
|
||||
#include "dmac.h"
|
||||
|
||||
#define kpu_matmul_begin kpu_conv2d_output
|
||||
|
@ -30,11 +30,11 @@ typedef struct
|
|||
uint64_t reg;
|
||||
struct
|
||||
{
|
||||
uint64_t int_en:1;
|
||||
uint64_t ram_flag:1;
|
||||
uint64_t full_add:1;
|
||||
uint64_t depth_wise_layer:1;
|
||||
uint64_t reserved:60;
|
||||
uint64_t int_en : 1;
|
||||
uint64_t ram_flag : 1;
|
||||
uint64_t full_add : 1;
|
||||
uint64_t depth_wise_layer : 1;
|
||||
uint64_t reserved : 60;
|
||||
} data;
|
||||
} interrupt_enabe;
|
||||
|
||||
|
@ -43,10 +43,10 @@ typedef struct
|
|||
uint64_t reg;
|
||||
struct
|
||||
{
|
||||
uint64_t image_src_addr:15;
|
||||
uint64_t reserved0:17;
|
||||
uint64_t image_dst_addr:15;
|
||||
uint64_t reserved1:17;
|
||||
uint64_t image_src_addr : 15;
|
||||
uint64_t reserved0 : 17;
|
||||
uint64_t image_dst_addr : 15;
|
||||
uint64_t reserved1 : 17;
|
||||
} data;
|
||||
} image_addr;
|
||||
|
||||
|
@ -55,12 +55,12 @@ typedef struct
|
|||
uint64_t reg;
|
||||
struct
|
||||
{
|
||||
uint64_t i_ch_num:10;
|
||||
uint64_t reserved0:22;
|
||||
uint64_t o_ch_num:10;
|
||||
uint64_t reserved1:6;
|
||||
uint64_t o_ch_num_coef:10;
|
||||
uint64_t reserved2:6;
|
||||
uint64_t i_ch_num : 10;
|
||||
uint64_t reserved0 : 22;
|
||||
uint64_t o_ch_num : 10;
|
||||
uint64_t reserved1 : 6;
|
||||
uint64_t o_ch_num_coef : 10;
|
||||
uint64_t reserved2 : 6;
|
||||
} data;
|
||||
} image_channel_num;
|
||||
|
||||
|
@ -69,12 +69,12 @@ typedef struct
|
|||
uint64_t reg;
|
||||
struct
|
||||
{
|
||||
uint64_t i_row_wid:10;
|
||||
uint64_t i_col_high:9;
|
||||
uint64_t reserved0:13;
|
||||
uint64_t o_row_wid:10;
|
||||
uint64_t o_col_high:9;
|
||||
uint64_t reserved1:13;
|
||||
uint64_t i_row_wid : 10;
|
||||
uint64_t i_col_high : 9;
|
||||
uint64_t reserved0 : 13;
|
||||
uint64_t o_row_wid : 10;
|
||||
uint64_t o_col_high : 9;
|
||||
uint64_t reserved1 : 13;
|
||||
} data;
|
||||
} image_size;
|
||||
|
||||
|
@ -83,16 +83,16 @@ typedef struct
|
|||
uint64_t reg;
|
||||
struct
|
||||
{
|
||||
uint64_t kernel_type:3;
|
||||
uint64_t pad_type:1;
|
||||
uint64_t pool_type:4;
|
||||
uint64_t first_stride:1;
|
||||
uint64_t bypass_conv:1;
|
||||
uint64_t load_para:1;
|
||||
uint64_t reserved0:5;
|
||||
uint64_t dma_burst_size:8;
|
||||
uint64_t pad_value:8;
|
||||
uint64_t bwsx_base_addr:32;
|
||||
uint64_t kernel_type : 3;
|
||||
uint64_t pad_type : 1;
|
||||
uint64_t pool_type : 4;
|
||||
uint64_t first_stride : 1;
|
||||
uint64_t bypass_conv : 1;
|
||||
uint64_t load_para : 1;
|
||||
uint64_t reserved0 : 5;
|
||||
uint64_t dma_burst_size : 8;
|
||||
uint64_t pad_value : 8;
|
||||
uint64_t bwsx_base_addr : 32;
|
||||
} data;
|
||||
} kernel_pool_type_cfg;
|
||||
|
||||
|
@ -101,11 +101,11 @@ typedef struct
|
|||
uint64_t reg;
|
||||
struct
|
||||
{
|
||||
uint64_t load_coor:1;
|
||||
uint64_t load_time:6;
|
||||
uint64_t reserved0:8;
|
||||
uint64_t para_size:17;
|
||||
uint64_t para_start_addr:32;
|
||||
uint64_t load_coor : 1;
|
||||
uint64_t load_time : 6;
|
||||
uint64_t reserved0 : 8;
|
||||
uint64_t para_size : 17;
|
||||
uint64_t para_start_addr : 32;
|
||||
} data;
|
||||
} kernel_load_cfg;
|
||||
|
||||
|
@ -114,9 +114,9 @@ typedef struct
|
|||
uint64_t reg;
|
||||
struct
|
||||
{
|
||||
uint64_t coef_column_offset:4;
|
||||
uint64_t coef_row_offset:12;
|
||||
uint64_t reserved0:48;
|
||||
uint64_t coef_column_offset : 4;
|
||||
uint64_t coef_row_offset : 12;
|
||||
uint64_t reserved0 : 48;
|
||||
} data;
|
||||
} kernel_offset;
|
||||
|
||||
|
@ -125,13 +125,13 @@ typedef struct
|
|||
uint64_t reg;
|
||||
struct
|
||||
{
|
||||
uint64_t channel_switch_addr:15;
|
||||
uint64_t reserved:1;
|
||||
uint64_t row_switch_addr:4;
|
||||
uint64_t coef_size:8;
|
||||
uint64_t coef_group:3;
|
||||
uint64_t load_act:1;
|
||||
uint64_t active_addr:32;
|
||||
uint64_t channel_switch_addr : 15;
|
||||
uint64_t reserved : 1;
|
||||
uint64_t row_switch_addr : 4;
|
||||
uint64_t coef_size : 8;
|
||||
uint64_t coef_group : 3;
|
||||
uint64_t load_act : 1;
|
||||
uint64_t active_addr : 32;
|
||||
} data;
|
||||
} kernel_calc_type_cfg;
|
||||
|
||||
|
@ -140,11 +140,11 @@ typedef struct
|
|||
uint64_t reg;
|
||||
struct
|
||||
{
|
||||
uint64_t wb_channel_switch_addr:15;
|
||||
uint64_t reserved0:1;
|
||||
uint64_t wb_row_switch_addr:4;
|
||||
uint64_t wb_group:3;
|
||||
uint64_t reserved1:41;
|
||||
uint64_t wb_channel_switch_addr : 15;
|
||||
uint64_t reserved0 : 1;
|
||||
uint64_t wb_row_switch_addr : 4;
|
||||
uint64_t wb_group : 3;
|
||||
uint64_t reserved1 : 41;
|
||||
} data;
|
||||
} write_back_cfg;
|
||||
|
||||
|
@ -153,11 +153,11 @@ typedef struct
|
|||
uint64_t reg;
|
||||
struct
|
||||
{
|
||||
uint64_t shr_w:4;
|
||||
uint64_t shr_x:4;
|
||||
uint64_t arg_w:24;
|
||||
uint64_t arg_x:24;
|
||||
uint64_t reserved0:8;
|
||||
uint64_t shr_w : 4;
|
||||
uint64_t shr_x : 4;
|
||||
uint64_t arg_w : 24;
|
||||
uint64_t arg_x : 24;
|
||||
uint64_t reserved0 : 8;
|
||||
} data;
|
||||
} conv_value;
|
||||
|
||||
|
@ -166,8 +166,8 @@ typedef struct
|
|||
uint64_t reg;
|
||||
struct
|
||||
{
|
||||
uint64_t arg_add:40;
|
||||
uint64_t reserved:24;
|
||||
uint64_t arg_add : 40;
|
||||
uint64_t reserved : 24;
|
||||
} data;
|
||||
} conv_value2;
|
||||
|
||||
|
@ -176,10 +176,10 @@ typedef struct
|
|||
uint64_t reg;
|
||||
struct
|
||||
{
|
||||
uint64_t send_data_out:1;
|
||||
uint64_t reserved:15;
|
||||
uint64_t channel_byte_num:16;
|
||||
uint64_t dma_total_byte:32;
|
||||
uint64_t send_data_out : 1;
|
||||
uint64_t reserved : 15;
|
||||
uint64_t channel_byte_num : 16;
|
||||
uint64_t dma_total_byte : 32;
|
||||
} data;
|
||||
} dma_parameter;
|
||||
} kpu_layer_argument_t;
|
||||
|
@ -191,9 +191,9 @@ typedef struct
|
|||
uint64_t reg;
|
||||
struct
|
||||
{
|
||||
uint64_t shift_number:8;
|
||||
uint64_t y_mul:16;
|
||||
uint64_t x_start:36;
|
||||
uint64_t shift_number : 8;
|
||||
uint64_t y_mul : 16;
|
||||
uint64_t x_start : 36;
|
||||
} data;
|
||||
} activate_para[16];
|
||||
|
||||
|
@ -223,14 +223,13 @@ typedef struct
|
|||
uint64_t reg;
|
||||
struct
|
||||
{
|
||||
uint64_t norm_mul:24;
|
||||
uint64_t norm_add:32;
|
||||
uint64_t norm_shift:4;
|
||||
uint64_t norm_mul : 24;
|
||||
uint64_t norm_add : 32;
|
||||
uint64_t norm_shift : 4;
|
||||
} data;
|
||||
} batchnorm;
|
||||
} kpu_batchnorm_argument_t;
|
||||
|
||||
|
||||
typedef struct
|
||||
{
|
||||
union
|
||||
|
@ -245,36 +244,35 @@ typedef struct
|
|||
|
||||
typedef struct
|
||||
{
|
||||
uint64_t calc_done_int:1;
|
||||
uint64_t layer_cfg_almost_empty_int:1;
|
||||
uint64_t layer_cfg_almost_full_int:1;
|
||||
uint64_t reserved:61;
|
||||
uint64_t calc_done_int : 1;
|
||||
uint64_t layer_cfg_almost_empty_int : 1;
|
||||
uint64_t layer_cfg_almost_full_int : 1;
|
||||
uint64_t reserved : 61;
|
||||
} kpu_config_interrupt_t;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint64_t fifo_full_threshold:4;
|
||||
uint64_t fifo_empty_threshold:4;
|
||||
uint64_t reserved:56;
|
||||
uint64_t fifo_full_threshold : 4;
|
||||
uint64_t fifo_empty_threshold : 4;
|
||||
uint64_t reserved : 56;
|
||||
} kpu_config_fifo_threshold_t;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint64_t dma_fifo_flush_n:1;
|
||||
uint64_t gs_fifo_flush_n:1;
|
||||
uint64_t cfg_fifo_flush_n:1;
|
||||
uint64_t cmd_fifo_flush_n:1;
|
||||
uint64_t resp_fifo_flush_n:1;
|
||||
uint64_t reserved:59;
|
||||
uint64_t dma_fifo_flush_n : 1;
|
||||
uint64_t gs_fifo_flush_n : 1;
|
||||
uint64_t cfg_fifo_flush_n : 1;
|
||||
uint64_t cmd_fifo_flush_n : 1;
|
||||
uint64_t resp_fifo_flush_n : 1;
|
||||
uint64_t reserved : 59;
|
||||
} kpu_config_fifo_ctrl_t;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint64_t eight_bit_mode:1;
|
||||
uint64_t reserved:63;
|
||||
uint64_t eight_bit_mode : 1;
|
||||
uint64_t reserved : 63;
|
||||
} kpu_config_eight_bit_mode_t;
|
||||
|
||||
|
||||
typedef struct
|
||||
{
|
||||
volatile uint64_t layer_argument_fifo;
|
||||
|
@ -291,7 +289,8 @@ typedef struct
|
|||
kpu_config_interrupt_t data;
|
||||
} interrupt_raw;
|
||||
|
||||
volatile union {
|
||||
volatile union
|
||||
{
|
||||
uint64_t reg;
|
||||
kpu_config_interrupt_t data;
|
||||
} interrupt_mask;
|
||||
|
@ -660,7 +659,7 @@ typedef struct
|
|||
uint32_t channels;
|
||||
} kpu_model_logistic_layer_argument_t;
|
||||
|
||||
typedef void(*kpu_done_callback_t)(void* userdata);
|
||||
typedef void (*kpu_done_callback_t)(void *userdata);
|
||||
|
||||
typedef struct
|
||||
{
|
||||
|
@ -672,7 +671,7 @@ typedef struct
|
|||
const uint8_t *body_start;
|
||||
uint32_t layers_length;
|
||||
volatile uint32_t current_layer;
|
||||
const uint8_t * volatile current_body;
|
||||
const uint8_t *volatile current_body;
|
||||
dmac_channel_number_t dma_ch;
|
||||
kpu_done_callback_t done_callback;
|
||||
void *userdata;
|
||||
|
@ -704,7 +703,7 @@ extern volatile kpu_config_t *const kpu;
|
|||
*
|
||||
* @return Kpu handler
|
||||
*/
|
||||
extern kpu_task_t *kpu_task_init(kpu_task_t* task);
|
||||
extern kpu_task_t *kpu_task_init(kpu_task_t *task);
|
||||
|
||||
/**
|
||||
* @brief Kpu run for AI
|
||||
|
@ -719,7 +718,7 @@ extern kpu_task_t *kpu_task_init(kpu_task_t* task);
|
|||
* - 0 Success
|
||||
* - Other Fail.Kpu is busy.
|
||||
*/
|
||||
int kpu_run(kpu_task_t* task, dmac_channel_number_t dma_ch, const void *src, void* dest, plic_irq_callback_t callback);
|
||||
int kpu_run(kpu_task_t *task, dmac_channel_number_t dma_ch, const void *src, void *dest, plic_irq_callback_t callback);
|
||||
|
||||
/**
|
||||
* @brief Get kpu result buf
|
||||
|
@ -728,7 +727,7 @@ int kpu_run(kpu_task_t* task, dmac_channel_number_t dma_ch, const void *src, voi
|
|||
*
|
||||
* @return Kpu result buf
|
||||
*/
|
||||
uint8_t *kpu_get_output_buf(kpu_task_t* task);
|
||||
uint8_t *kpu_get_output_buf(kpu_task_t *task);
|
||||
|
||||
/**
|
||||
* @brief Release kpu output buf
|
||||
|
|
|
@ -285,7 +285,7 @@ typedef struct _plic_target_enables
|
|||
/* 0x0C002000-0x0C1F1F80: target 0-15871 enables */
|
||||
struct
|
||||
{
|
||||
uint32_t enable[32 * 2];/* Offset 0x00-0x7C: Bit 0 is zero, Bits 1-1023 is bits*/
|
||||
uint32_t enable[32 * 2]; /* Offset 0x00-0x7C: Bit 0 is zero, Bits 1-1023 is bits*/
|
||||
} target[15872 / 2];
|
||||
|
||||
/* 0x0C1F2000-0x0C1FFFFC: Reserved, size 0xE000 */
|
||||
|
@ -324,8 +324,9 @@ typedef struct _plic_target_enables
|
|||
typedef struct _plic_target
|
||||
{
|
||||
/* 0x0C200000-0x0FFFF004: target 0-15871 */
|
||||
struct {
|
||||
uint32_t priority_threshold;/* Offset 0x000 */
|
||||
struct
|
||||
{
|
||||
uint32_t priority_threshold; /* Offset 0x000 */
|
||||
uint32_t claim_complete; /* Offset 0x004 */
|
||||
uint8_t resv[0x1FF8]; /* Offset 0x008, Size 0xFF8 */
|
||||
} target[15872 / 2];
|
||||
|
|
|
@ -15,8 +15,8 @@
|
|||
#ifndef _DRIVER_PWM_H
|
||||
#define _DRIVER_PWM_H
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stddef.h>
|
||||
#include <stdint.h>
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
@ -66,7 +66,6 @@ void pwm_set_enable(pwm_device_number_t pwm_number, pwm_channel_number_t channel
|
|||
*/
|
||||
double pwm_set_frequency(pwm_device_number_t pwm_number, pwm_channel_number_t channel, double frequency, double duty);
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
|
|
@ -21,11 +21,11 @@
|
|||
#ifndef _DRIVER_RTC_H
|
||||
#define _DRIVER_RTC_H
|
||||
|
||||
#include <stdint.h>
|
||||
#include <time.h>
|
||||
#include <plic.h>
|
||||
#include <stdbool.h>
|
||||
#include <stdint.h>
|
||||
#include <string.h>
|
||||
#include <time.h>
|
||||
|
||||
#include "platform.h"
|
||||
|
||||
|
@ -109,7 +109,6 @@ typedef struct _rtc_mask
|
|||
*
|
||||
*/
|
||||
|
||||
|
||||
/**
|
||||
* @brief Timer date information
|
||||
*
|
||||
|
@ -261,10 +260,10 @@ typedef struct _rtc_extended
|
|||
{
|
||||
uint32_t century : 5; /*!< Century. Range [0,31] */
|
||||
uint32_t leap_year : 1; /*!< Is leap year. 1 is leap year, 0 is not leap year */
|
||||
uint32_t resv : 26; /*!< Reserved */;
|
||||
uint32_t resv : 26; /*!< Reserved */
|
||||
;
|
||||
} __attribute__((packed, aligned(4))) rtc_extended_t;
|
||||
|
||||
|
||||
/**
|
||||
* @brief Real-time clock struct
|
||||
*
|
||||
|
@ -286,7 +285,6 @@ typedef struct _rtc
|
|||
rtc_extended_t extended; /*!< No. 10 (0x28): Timer extended information */
|
||||
} __attribute__((packed, aligned(4))) rtc_t;
|
||||
|
||||
|
||||
/**
|
||||
* @brief Real-time clock object
|
||||
*/
|
||||
|
|
|
@ -14,8 +14,8 @@
|
|||
*/
|
||||
#ifndef _SHA256_H
|
||||
#define _SHA256_H
|
||||
#include <stdint.h>
|
||||
#include <stddef.h>
|
||||
#include <stdint.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
|
@ -125,4 +125,3 @@ void sha256_hard_calculate(const uint8_t *input, size_t input_len, uint8_t *outp
|
|||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
|
|
|
@ -15,8 +15,8 @@
|
|||
#ifndef _DRIVER_SPI_H
|
||||
#define _DRIVER_SPI_H
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stddef.h>
|
||||
#include <stdint.h>
|
||||
#include "dmac.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
|
@ -140,7 +140,6 @@ typedef enum _spi_transfer_mode
|
|||
SPI_TMOD_EEROM
|
||||
} spi_transfer_mode_t;
|
||||
|
||||
|
||||
typedef enum _spi_transfer_width
|
||||
{
|
||||
SPI_TRANS_CHAR = 0x1,
|
||||
|
|
|
@ -658,7 +658,7 @@ typedef struct _sysctl_misc
|
|||
{
|
||||
uint32_t debug_sel : 6;
|
||||
uint32_t reserved0 : 4;
|
||||
uint32_t spi_dvp_data_enable: 1;
|
||||
uint32_t spi_dvp_data_enable : 1;
|
||||
uint32_t reserved1 : 21;
|
||||
} __attribute__((packed, aligned(4))) sysctl_misc_t;
|
||||
|
||||
|
|
|
@ -15,8 +15,8 @@
|
|||
#ifndef _DRIVER_TIMER_H
|
||||
#define _DRIVER_TIMER_H
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stddef.h>
|
||||
#include <stdint.h>
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
@ -114,7 +114,7 @@ void timer_init(timer_device_number_t timer_number);
|
|||
* @param[in] priority interrupt priority
|
||||
*
|
||||
*/
|
||||
void timer_set_irq(timer_device_number_t timer_number, timer_channel_number_t channel, void(*func)(), uint32_t priority);
|
||||
void timer_set_irq(timer_device_number_t timer_number, timer_channel_number_t channel, void (*func)(), uint32_t priority);
|
||||
|
||||
/**
|
||||
* @brief Register timer interrupt user callback function
|
||||
|
|
|
@ -38,9 +38,9 @@
|
|||
#define _DRIVER_APBUART_H
|
||||
|
||||
#include <stdint.h>
|
||||
#include "dmac.h"
|
||||
#include "platform.h"
|
||||
#include "plic.h"
|
||||
#include "dmac.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
|
@ -363,7 +363,6 @@ void uart_send_data_dma(uart_device_number_t uart_channel, dmac_channel_number_t
|
|||
*/
|
||||
void uart_receive_data_dma(uart_device_number_t uart_channel, dmac_channel_number_t dmac_channel, uint8_t *buffer, size_t buf_len);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Send data by dma
|
||||
*
|
||||
|
@ -404,7 +403,7 @@ void uart_receive_data_dma_irq(uart_device_number_t uart_channel, dmac_channel_n
|
|||
* @param[in] buffer Uart DMA callback
|
||||
*
|
||||
*/
|
||||
void uart_handle_data_dma(uart_device_number_t uart_channel ,uart_data_t data, plic_interrupt_t *cb);
|
||||
void uart_handle_data_dma(uart_device_number_t uart_channel, uart_data_t data, plic_interrupt_t *cb);
|
||||
|
||||
/**
|
||||
* @brief Set uart work mode
|
||||
|
|
|
@ -69,7 +69,7 @@ extern "C" {
|
|||
* @param[in] src 8 bit data byte to write to memory
|
||||
*/
|
||||
#define kendryte_write_byte(dest, src) \
|
||||
(*KENDRYTE_CAST(volatile uint8_t*, (dest)) = (src))
|
||||
(*KENDRYTE_CAST(volatile uint8_t *, (dest)) = (src))
|
||||
|
||||
/**
|
||||
* @brief Read and return the 8 bit byte from the source address in device memory.
|
||||
|
@ -78,7 +78,7 @@ extern "C" {
|
|||
*
|
||||
* @return 8 bit data byte value
|
||||
*/
|
||||
#define kendryte_read_byte(src) (*KENDRYTE_CAST(volatile uint8_t*, (src)))
|
||||
#define kendryte_read_byte(src) (*KENDRYTE_CAST(volatile uint8_t *, (src)))
|
||||
|
||||
/**
|
||||
* @brief Write the 16 bit half word to the destination address in device memory.
|
||||
|
@ -87,7 +87,7 @@ extern "C" {
|
|||
* @param[in] src 16 bit data half word to write to memory
|
||||
*/
|
||||
#define kendryte_write_hword(dest, src) \
|
||||
(*KENDRYTE_CAST(volatile uint16_t*, (dest)) = (src))
|
||||
(*KENDRYTE_CAST(volatile uint16_t *, (dest)) = (src))
|
||||
|
||||
/**
|
||||
* @brief Read and return the 16 bit half word from the source address in device
|
||||
|
@ -96,7 +96,7 @@ extern "C" {
|
|||
*
|
||||
* @return 16 bit data half word value
|
||||
*/
|
||||
#define kendryte_read_hword(src) (*KENDRYTE_CAST(volatile uint16_t*, (src)))
|
||||
#define kendryte_read_hword(src) (*KENDRYTE_CAST(volatile uint16_t *, (src)))
|
||||
|
||||
/**
|
||||
* @brief Write the 32 bit word to the destination address in device memory.
|
||||
|
@ -105,7 +105,7 @@ extern "C" {
|
|||
* @param[in] src 32 bit data word to write to memory
|
||||
*/
|
||||
#define kendryte_write_word(dest, src) \
|
||||
(*KENDRYTE_CAST(volatile uint32_t*, (dest)) = (src))
|
||||
(*KENDRYTE_CAST(volatile uint32_t *, (dest)) = (src))
|
||||
|
||||
/**
|
||||
* @brief Read and return the 32 bit word from the source address in device memory.
|
||||
|
@ -114,7 +114,7 @@ extern "C" {
|
|||
*
|
||||
* @return 32 bit data half word value
|
||||
*/
|
||||
#define kendryte_read_word(src) (*KENDRYTE_CAST(volatile uint32_t*, (src)))
|
||||
#define kendryte_read_word(src) (*KENDRYTE_CAST(volatile uint32_t *, (src)))
|
||||
|
||||
/**
|
||||
* @brief Write the 64 bit double word to the destination address in device memory.
|
||||
|
@ -123,7 +123,7 @@ extern "C" {
|
|||
* @param[in] src 64 bit data word to write to memory
|
||||
*/
|
||||
#define kendryte_write_dword(dest, src) \
|
||||
(*KENDRYTE_CAST(volatile uint64_t*, (dest)) = (src))
|
||||
(*KENDRYTE_CAST(volatile uint64_t *, (dest)) = (src))
|
||||
|
||||
/**
|
||||
* @brief Read and return the 64 bit double word from the source address in device
|
||||
|
@ -132,7 +132,7 @@ extern "C" {
|
|||
*
|
||||
* @return 64 bit data half word value
|
||||
*/
|
||||
#define kendryte_read_dword(src) (*KENDRYTE_CAST(volatile uint64_t*, (src)))
|
||||
#define kendryte_read_dword(src) (*KENDRYTE_CAST(volatile uint64_t *, (src)))
|
||||
|
||||
/**
|
||||
* @brief Set selected bits in the 8 bit byte at the destination address in device
|
||||
|
@ -283,10 +283,10 @@ extern "C" {
|
|||
(kendryte_write_dword(dest, (kendryte_read_dword(dest) & ~(msk)) | ((src) & (msk))))
|
||||
|
||||
#define configASSERT(x) \
|
||||
if ((x) == 0) \
|
||||
if((x) == 0) \
|
||||
{ \
|
||||
printf("(%s:%d) %s\r\n", __FILE__, __LINE__, #x); \
|
||||
for (;;) \
|
||||
for(;;) \
|
||||
; \
|
||||
}
|
||||
|
||||
|
@ -344,4 +344,3 @@ uint32_t get_gpio_bit(volatile uint32_t *bits, size_t offset);
|
|||
}
|
||||
#endif /* __cplusplus */
|
||||
#endif /* _DRIVER_COMMON_H */
|
||||
|
||||
|
|
|
@ -15,9 +15,9 @@
|
|||
#ifndef _DRIVER_WDT_H
|
||||
#define _DRIVER_WDT_H
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stddef.h>
|
||||
#include <plic.h>
|
||||
#include <stddef.h>
|
||||
#include <stdint.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
|
|
File diff suppressed because it is too large
Load Diff
|
@ -19,7 +19,7 @@
|
|||
#include "syscalls.h"
|
||||
#include "syslog.h"
|
||||
|
||||
volatile plic_t* const plic = (volatile plic_t*)PLIC_BASE_ADDR;
|
||||
volatile plic_t *const plic = (volatile plic_t *)PLIC_BASE_ADDR;
|
||||
|
||||
static plic_instance_t plic_instance[PLIC_NUM_CORES][IRQN_MAX];
|
||||
|
||||
|
@ -31,14 +31,14 @@ void plic_init(void)
|
|||
unsigned long core_id = current_coreid();
|
||||
|
||||
/* Disable all interrupts for the current core. */
|
||||
for (i = 0; i < ((PLIC_NUM_SOURCES + 32u) / 32u); i++)
|
||||
for(i = 0; i < ((PLIC_NUM_SOURCES + 32u) / 32u); i++)
|
||||
plic->target_enables.target[core_id].enable[i] = 0;
|
||||
|
||||
static uint8_t s_plic_priorities_init_flag = 0;
|
||||
/* Set priorities to zero. */
|
||||
if(s_plic_priorities_init_flag == 0)
|
||||
{
|
||||
for (i = 0; i < PLIC_NUM_SOURCES; i++)
|
||||
for(i = 0; i < PLIC_NUM_SOURCES; i++)
|
||||
plic->source_priorities.priority[i] = 0;
|
||||
s_plic_priorities_init_flag = 1;
|
||||
}
|
||||
|
@ -47,7 +47,7 @@ void plic_init(void)
|
|||
plic->targets.target[core_id].priority_threshold = 0;
|
||||
|
||||
/* Clear PLIC instance for every cores */
|
||||
for (i = 0; i < IRQN_MAX; i++)
|
||||
for(i = 0; i < IRQN_MAX; i++)
|
||||
{
|
||||
/* clang-format off */
|
||||
plic_instance[core_id][i] = (const plic_instance_t){
|
||||
|
@ -63,7 +63,7 @@ void plic_init(void)
|
|||
* at any time, even if the EIP is not set.
|
||||
*/
|
||||
i = 0;
|
||||
while (plic->targets.target[core_id].claim_complete > 0 && i < 100)
|
||||
while(plic->targets.target[core_id].claim_complete > 0 && i < 100)
|
||||
{
|
||||
/* This loop will clear pending bit on the interrupt source */
|
||||
i++;
|
||||
|
@ -76,7 +76,7 @@ void plic_init(void)
|
|||
int plic_irq_enable(plic_irq_t irq_number)
|
||||
{
|
||||
/* Check parameters */
|
||||
if (PLIC_NUM_SOURCES < irq_number || 0 > irq_number)
|
||||
if(PLIC_NUM_SOURCES < irq_number || 0 > irq_number)
|
||||
return -1;
|
||||
unsigned long core_id = current_coreid();
|
||||
/* Get current enable bit array by IRQ number */
|
||||
|
@ -91,7 +91,7 @@ int plic_irq_enable(plic_irq_t irq_number)
|
|||
int plic_irq_disable(plic_irq_t irq_number)
|
||||
{
|
||||
/* Check parameters */
|
||||
if (PLIC_NUM_SOURCES < irq_number || 0 > irq_number)
|
||||
if(PLIC_NUM_SOURCES < irq_number || 0 > irq_number)
|
||||
return -1;
|
||||
unsigned long core_id = current_coreid();
|
||||
/* Get current enable bit array by IRQ number */
|
||||
|
@ -106,7 +106,7 @@ int plic_irq_disable(plic_irq_t irq_number)
|
|||
int plic_set_priority(plic_irq_t irq_number, uint32_t priority)
|
||||
{
|
||||
/* Check parameters */
|
||||
if (PLIC_NUM_SOURCES < irq_number || 0 > irq_number)
|
||||
if(PLIC_NUM_SOURCES < irq_number || 0 > irq_number)
|
||||
return -1;
|
||||
/* Set interrupt priority by IRQ number */
|
||||
plic->source_priorities.priority[irq_number] = priority;
|
||||
|
@ -116,7 +116,7 @@ int plic_set_priority(plic_irq_t irq_number, uint32_t priority)
|
|||
uint32_t plic_get_priority(plic_irq_t irq_number)
|
||||
{
|
||||
/* Check parameters */
|
||||
if (PLIC_NUM_SOURCES < irq_number || 0 > irq_number)
|
||||
if(PLIC_NUM_SOURCES < irq_number || 0 > irq_number)
|
||||
return 0;
|
||||
/* Get interrupt priority by IRQ number */
|
||||
return plic->source_priorities.priority[irq_number];
|
||||
|
@ -174,7 +174,7 @@ handle_irq_m_ext(uintptr_t cause, uintptr_t epc)
|
|||
* without first restoring the interrupted context and taking another
|
||||
* interrupt trap.
|
||||
*/
|
||||
if (read_csr(mip) & MIP_MEIP)
|
||||
if(read_csr(mip) & MIP_MEIP)
|
||||
{
|
||||
/* Get current core id */
|
||||
uint64_t core_id = current_coreid();
|
||||
|
@ -190,7 +190,7 @@ handle_irq_m_ext(uintptr_t cause, uintptr_t epc)
|
|||
clear_csr(mie, MIP_MTIP | MIP_MSIP);
|
||||
/* Enable global interrupt */
|
||||
set_csr(mstatus, MSTATUS_MIE);
|
||||
if (plic_instance[core_id][int_num].callback)
|
||||
if(plic_instance[core_id][int_num].callback)
|
||||
plic_instance[core_id][int_num].callback(
|
||||
plic_instance[core_id][int_num].ctx);
|
||||
/* Perform IRQ complete */
|
||||
|
|
|
@ -12,13 +12,13 @@
|
|||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
#include "timer.h"
|
||||
#include <stddef.h>
|
||||
#include "io.h"
|
||||
#include "plic.h"
|
||||
#include "pwm.h"
|
||||
#include "sysctl.h"
|
||||
#include <stddef.h>
|
||||
#include "timer.h"
|
||||
#include "utils.h"
|
||||
#include "plic.h"
|
||||
#include "io.h"
|
||||
|
||||
void pwm_init(pwm_device_number_t pwm_number)
|
||||
{
|
||||
|
@ -27,15 +27,14 @@ void pwm_init(pwm_device_number_t pwm_number)
|
|||
|
||||
void pwm_set_enable(pwm_device_number_t pwm_number, pwm_channel_number_t channel, int enable)
|
||||
{
|
||||
if (enable)
|
||||
if(enable)
|
||||
{
|
||||
if (timer[pwm_number]->channel[channel].load_count == 0)
|
||||
if(timer[pwm_number]->channel[channel].load_count == 0)
|
||||
timer[pwm_number]->channel[channel].load_count = 1;
|
||||
if (timer[pwm_number]->load_count2[channel] == 0)
|
||||
if(timer[pwm_number]->load_count2[channel] == 0)
|
||||
timer[pwm_number]->load_count2[channel] = 1;
|
||||
timer[pwm_number]->channel[channel].control = TIMER_CR_INTERRUPT_MASK | TIMER_CR_PWM_ENABLE | TIMER_CR_USER_MODE | TIMER_CR_ENABLE;
|
||||
}
|
||||
else
|
||||
} else
|
||||
{
|
||||
timer[pwm_number]->channel[channel].control = TIMER_CR_INTERRUPT_MASK;
|
||||
}
|
||||
|
@ -55,4 +54,3 @@ double pwm_set_frequency(pwm_device_number_t pwm_number, pwm_channel_number_t ch
|
|||
|
||||
return frequency;
|
||||
}
|
||||
|
||||
|
|
|
@ -13,12 +13,12 @@
|
|||
* limitations under the License.
|
||||
*/
|
||||
#include <stdint.h>
|
||||
#include <time.h>
|
||||
#include <stdlib.h>
|
||||
#include <time.h>
|
||||
#include "encoding.h"
|
||||
#include "sysctl.h"
|
||||
#include "rtc.h"
|
||||
#include "printf.h"
|
||||
#include "rtc.h"
|
||||
#include "sysctl.h"
|
||||
|
||||
volatile rtc_t *const rtc = (volatile rtc_t *)RTC_BASE_ADDR;
|
||||
|
||||
|
@ -40,8 +40,7 @@ typedef struct _rtc_instance_t
|
|||
rtc_tick_interrupt_mode_t tick_mode_by_alarm;
|
||||
} rtc_instance_t;
|
||||
|
||||
rtc_instance_t rtc_instance = (rtc_instance_t)
|
||||
{
|
||||
rtc_instance_t rtc_instance = (rtc_instance_t){
|
||||
.tick_mode_by_user = -1,
|
||||
.tick_mode_by_alarm = RTC_INT_MAX,
|
||||
};
|
||||
|
@ -50,7 +49,8 @@ int rtc_timer_set_mode(rtc_timer_mode_t timer_mode)
|
|||
{
|
||||
rtc_register_ctrl_t register_ctrl = rtc->register_ctrl;
|
||||
|
||||
switch (timer_mode) {
|
||||
switch(timer_mode)
|
||||
{
|
||||
case RTC_TIMER_PAUSE:
|
||||
register_ctrl.read_enable = 0;
|
||||
register_ctrl.write_enable = 0;
|
||||
|
@ -76,7 +76,7 @@ int rtc_timer_set_mode(rtc_timer_mode_t timer_mode)
|
|||
/* Get current CPU cycle */
|
||||
unsigned long start_cycle = read_csr(mcycle);
|
||||
/* Wait for 1/26000000 s to sync data */
|
||||
while (read_csr(mcycle) - start_cycle < freq)
|
||||
while(read_csr(mcycle) - start_cycle < freq)
|
||||
continue;
|
||||
|
||||
rtc->register_ctrl = register_ctrl;
|
||||
|
@ -89,16 +89,20 @@ rtc_timer_mode_t rtc_timer_get_mode(void)
|
|||
rtc_register_ctrl_t register_ctrl = rtc->register_ctrl;
|
||||
rtc_timer_mode_t timer_mode = RTC_TIMER_PAUSE;
|
||||
|
||||
if ((!register_ctrl.read_enable) && (!register_ctrl.write_enable)) {
|
||||
if((!register_ctrl.read_enable) && (!register_ctrl.write_enable))
|
||||
{
|
||||
/* RTC_TIMER_PAUSE */
|
||||
timer_mode = RTC_TIMER_PAUSE;
|
||||
} else if ((register_ctrl.read_enable) && (!register_ctrl.write_enable)) {
|
||||
} else if((register_ctrl.read_enable) && (!register_ctrl.write_enable))
|
||||
{
|
||||
/* RTC_TIMER_RUNNING */
|
||||
timer_mode = RTC_TIMER_RUNNING;
|
||||
} else if ((!register_ctrl.read_enable) && (register_ctrl.write_enable)) {
|
||||
} else if((!register_ctrl.read_enable) && (register_ctrl.write_enable))
|
||||
{
|
||||
/* RTC_TIMER_SETTING */
|
||||
timer_mode = RTC_TIMER_RUNNING;
|
||||
} else {
|
||||
} else
|
||||
{
|
||||
/* Something is error, reset timer mode */
|
||||
rtc_timer_set_mode(timer_mode);
|
||||
}
|
||||
|
@ -117,7 +121,8 @@ int rtc_timer_set_tm(const struct tm *tm)
|
|||
rtc_time_t timer_time;
|
||||
rtc_extended_t timer_extended;
|
||||
|
||||
if (tm) {
|
||||
if(tm)
|
||||
{
|
||||
/*
|
||||
* Range of tm->tm_sec could be [0,61]
|
||||
*
|
||||
|
@ -125,25 +130,25 @@ int rtc_timer_set_tm(const struct tm *tm)
|
|||
* leap seconds in the same minute are not allowed (the C90
|
||||
* range 0..61 was a defect)
|
||||
*/
|
||||
if (rtc_in_range(tm->tm_sec, 0, 59))
|
||||
if(rtc_in_range(tm->tm_sec, 0, 59))
|
||||
timer_time.second = tm->tm_sec;
|
||||
else
|
||||
return -1;
|
||||
|
||||
/* Range of tm->tm_min could be [0,59] */
|
||||
if (rtc_in_range(tm->tm_min, 0, 59))
|
||||
if(rtc_in_range(tm->tm_min, 0, 59))
|
||||
timer_time.minute = tm->tm_min;
|
||||
else
|
||||
return -1;
|
||||
|
||||
/* Range of tm->tm_hour could be [0, 23] */
|
||||
if (rtc_in_range(tm->tm_hour, 0, 23))
|
||||
if(rtc_in_range(tm->tm_hour, 0, 23))
|
||||
timer_time.hour = tm->tm_hour;
|
||||
else
|
||||
return -1;
|
||||
|
||||
/* Range of tm->tm_mday could be [1, 31] */
|
||||
if (rtc_in_range(tm->tm_mday, 1, 31))
|
||||
if(rtc_in_range(tm->tm_mday, 1, 31))
|
||||
timer_date.day = tm->tm_mday;
|
||||
else
|
||||
return -1;
|
||||
|
@ -152,7 +157,7 @@ int rtc_timer_set_tm(const struct tm *tm)
|
|||
* Range of tm->tm_mon could be [0, 11]
|
||||
* But in this RTC, date.month should be [1, 12]
|
||||
*/
|
||||
if (rtc_in_range(tm->tm_mon, 0, 11))
|
||||
if(rtc_in_range(tm->tm_mon, 0, 11))
|
||||
timer_date.month = tm->tm_mon + 1;
|
||||
else
|
||||
return -1;
|
||||
|
@ -166,15 +171,16 @@ int rtc_timer_set_tm(const struct tm *tm)
|
|||
int rtc_year = human_year % 100;
|
||||
int rtc_century = human_year / 100;
|
||||
|
||||
if (rtc_in_range(rtc_year, 0, 99) &&
|
||||
rtc_in_range(rtc_century, 0, 31)) {
|
||||
if(rtc_in_range(rtc_year, 0, 99) &&
|
||||
rtc_in_range(rtc_century, 0, 31))
|
||||
{
|
||||
timer_date.year = rtc_year;
|
||||
timer_extended.century = rtc_century;
|
||||
} else
|
||||
return -1;
|
||||
|
||||
/* Range of tm->tm_wday could be [0, 6] */
|
||||
if (rtc_in_range(tm->tm_wday, 0, 6))
|
||||
if(rtc_in_range(tm->tm_wday, 0, 6))
|
||||
timer_date.week = tm->tm_wday;
|
||||
else
|
||||
return -1;
|
||||
|
@ -197,7 +203,8 @@ int rtc_alarm_set_tm(const struct tm *tm)
|
|||
rtc_alarm_date_t alarm_date;
|
||||
rtc_alarm_time_t alarm_time;
|
||||
|
||||
if (tm) {
|
||||
if(tm)
|
||||
{
|
||||
/*
|
||||
* Range of tm->tm_sec could be [0,61]
|
||||
*
|
||||
|
@ -205,25 +212,25 @@ int rtc_alarm_set_tm(const struct tm *tm)
|
|||
* leap seconds in the same minute are not allowed (the C90
|
||||
* range 0..61 was a defect)
|
||||
*/
|
||||
if (rtc_in_range(tm->tm_sec, 0, 59))
|
||||
if(rtc_in_range(tm->tm_sec, 0, 59))
|
||||
alarm_time.second = tm->tm_sec;
|
||||
else
|
||||
return -1;
|
||||
|
||||
/* Range of tm->tm_min could be [0,59] */
|
||||
if (rtc_in_range(tm->tm_min, 0, 59))
|
||||
if(rtc_in_range(tm->tm_min, 0, 59))
|
||||
alarm_time.minute = tm->tm_min;
|
||||
else
|
||||
return -1;
|
||||
|
||||
/* Range of tm->tm_hour could be [0, 23] */
|
||||
if (rtc_in_range(tm->tm_hour, 0, 23))
|
||||
if(rtc_in_range(tm->tm_hour, 0, 23))
|
||||
alarm_time.hour = tm->tm_hour;
|
||||
else
|
||||
return -1;
|
||||
|
||||
/* Range of tm->tm_mday could be [1, 31] */
|
||||
if (rtc_in_range(tm->tm_mday, 1, 31))
|
||||
if(rtc_in_range(tm->tm_mday, 1, 31))
|
||||
alarm_date.day = tm->tm_mday;
|
||||
else
|
||||
return -1;
|
||||
|
@ -232,7 +239,7 @@ int rtc_alarm_set_tm(const struct tm *tm)
|
|||
* Range of tm->tm_mon could be [0, 11]
|
||||
* But in this RTC, date.month should be [1, 12]
|
||||
*/
|
||||
if (rtc_in_range(tm->tm_mon, 0, 11))
|
||||
if(rtc_in_range(tm->tm_mon, 0, 11))
|
||||
alarm_date.month = tm->tm_mon + 1;
|
||||
else
|
||||
return -1;
|
||||
|
@ -246,14 +253,15 @@ int rtc_alarm_set_tm(const struct tm *tm)
|
|||
int rtc_year = human_year % 100;
|
||||
int rtc_century = human_year / 100;
|
||||
|
||||
if (rtc_in_range(rtc_year, 0, 99) &&
|
||||
rtc_in_range(rtc_century, 0, 31)) {
|
||||
if(rtc_in_range(rtc_year, 0, 99) &&
|
||||
rtc_in_range(rtc_century, 0, 31))
|
||||
{
|
||||
alarm_date.year = rtc_year;
|
||||
} else
|
||||
return -1;
|
||||
|
||||
/* Range of tm->tm_wday could be [0, 6] */
|
||||
if (rtc_in_range(tm->tm_wday, 0, 6))
|
||||
if(rtc_in_range(tm->tm_wday, 0, 6))
|
||||
alarm_date.week = tm->tm_wday;
|
||||
else
|
||||
return -1;
|
||||
|
@ -279,8 +287,7 @@ int rtc_get_yday(int year, int month, int day)
|
|||
{
|
||||
static const int days[2][13] = {
|
||||
{0, 0, 31, 59, 90, 120, 151, 181, 212, 243, 273, 304, 334},
|
||||
{0, 0, 31, 60, 91, 121, 152, 182, 213, 244, 274, 305, 335}
|
||||
};
|
||||
{0, 0, 31, 60, 91, 121, 152, 182, 213, 244, 274, 305, 335}};
|
||||
int leap = rtc_year_is_leap(year);
|
||||
|
||||
return days[leap][month] + day;
|
||||
|
@ -295,7 +302,7 @@ int rtc_get_wday(int year, int month, int day)
|
|||
|
||||
struct tm *rtc_timer_get_tm(void)
|
||||
{
|
||||
if (rtc_timer_get_mode() != RTC_TIMER_RUNNING)
|
||||
if(rtc_timer_get_mode() != RTC_TIMER_RUNNING)
|
||||
return NULL;
|
||||
|
||||
rtc_date_t timer_date = rtc->date;
|
||||
|
@ -319,7 +326,7 @@ struct tm *rtc_timer_get_tm(void)
|
|||
|
||||
struct tm *rtc_alarm_get_tm(void)
|
||||
{
|
||||
if (rtc_timer_get_mode() != RTC_TIMER_RUNNING)
|
||||
if(rtc_timer_get_mode() != RTC_TIMER_RUNNING)
|
||||
return NULL;
|
||||
|
||||
rtc_alarm_date_t alarm_date = rtc->alarm_date;
|
||||
|
@ -362,18 +369,19 @@ int rtc_timer_get(int *year, int *month, int *day, int *hour, int *minute, int *
|
|||
{
|
||||
struct tm *tm = rtc_timer_get_tm();
|
||||
|
||||
if (tm) {
|
||||
if (year)
|
||||
if(tm)
|
||||
{
|
||||
if(year)
|
||||
*year = tm->tm_year + 1900;
|
||||
if (month)
|
||||
if(month)
|
||||
*month = tm->tm_mon + 1;
|
||||
if (day)
|
||||
if(day)
|
||||
*day = tm->tm_mday;
|
||||
if (hour)
|
||||
if(hour)
|
||||
*hour = tm->tm_hour;
|
||||
if (minute)
|
||||
if(minute)
|
||||
*minute = tm->tm_min;
|
||||
if (second)
|
||||
if(second)
|
||||
*second = tm->tm_sec;
|
||||
} else
|
||||
return -1;
|
||||
|
@ -402,18 +410,19 @@ int rtc_alarm_get(int *year, int *month, int *day, int *hour, int *minute, int *
|
|||
{
|
||||
struct tm *tm = rtc_alarm_get_tm();
|
||||
|
||||
if (tm) {
|
||||
if (year)
|
||||
if(tm)
|
||||
{
|
||||
if(year)
|
||||
*year = tm->tm_year + 1900;
|
||||
if (month)
|
||||
if(month)
|
||||
*month = tm->tm_mon + 1;
|
||||
if (day)
|
||||
if(day)
|
||||
*day = tm->tm_mday;
|
||||
if (hour)
|
||||
if(hour)
|
||||
*hour = tm->tm_hour;
|
||||
if (minute)
|
||||
if(minute)
|
||||
*minute = tm->tm_min;
|
||||
if (second)
|
||||
if(second)
|
||||
*second = tm->tm_sec;
|
||||
} else
|
||||
return -1;
|
||||
|
@ -563,13 +572,15 @@ int rtc_protect_set(int enable)
|
|||
.year = 0, /* Year mask */
|
||||
};
|
||||
|
||||
if (enable) {
|
||||
if(enable)
|
||||
{
|
||||
/* Turn RTC in protect mode, no one can write time */
|
||||
register_ctrl.timer_mask = *(uint8_t *)&unmask;
|
||||
register_ctrl.alarm_mask = *(uint8_t *)&unmask;
|
||||
register_ctrl.initial_count_mask = 0;
|
||||
register_ctrl.interrupt_register_mask = 0;
|
||||
} else {
|
||||
} else
|
||||
{
|
||||
/* Turn RTC in unprotect mode, everyone can write time */
|
||||
register_ctrl.timer_mask = *(uint8_t *)&mask;
|
||||
register_ctrl.alarm_mask = *(uint8_t *)&mask;
|
||||
|
@ -591,8 +602,7 @@ int rtc_init(void)
|
|||
rtc_protect_set(0);
|
||||
/* Set RTC clock frequency */
|
||||
rtc_timer_set_clock_frequency(
|
||||
sysctl_clock_get_freq(SYSCTL_CLOCK_IN0)
|
||||
);
|
||||
sysctl_clock_get_freq(SYSCTL_CLOCK_IN0));
|
||||
rtc_timer_set_clock_count_value(1);
|
||||
/* Set RTC mode to timer running mode */
|
||||
rtc_timer_set_mode(RTC_TIMER_RUNNING);
|
||||
|
@ -667,8 +677,7 @@ int rtc_irq_callback(void *ctx)
|
|||
rtc_tick_set_interrupt_mode(instance->tick_mode_by_user);
|
||||
rtc_tick_set_interrupt(1);
|
||||
}
|
||||
}
|
||||
else
|
||||
} else
|
||||
{
|
||||
rtc_tick_set_interrupt(0);
|
||||
}
|
||||
|
@ -780,8 +789,7 @@ int rtc_alarm_irq_register(bool is_single_shot, rtc_mask_t mask, plic_irq_callba
|
|||
{
|
||||
rtc_instance.tick_mode_by_alarm = RTC_INT_HOUR;
|
||||
goto alarm_mode;
|
||||
}
|
||||
else
|
||||
} else
|
||||
{
|
||||
rtc_instance.tick_mode_by_alarm = RTC_INT_DAY;
|
||||
}
|
||||
|
@ -819,8 +827,7 @@ void rtc_alarm_irq_unregister(void)
|
|||
rtc_tick_set_interrupt_mode(rtc_instance.tick_mode_by_user);
|
||||
rtc_tick_set_interrupt(1);
|
||||
}
|
||||
}
|
||||
else
|
||||
} else
|
||||
{
|
||||
rtc_tick_set_interrupt(0);
|
||||
}
|
||||
|
@ -830,4 +837,3 @@ void rtc_alarm_irq_unregister(void)
|
|||
plic_irq_unregister(IRQN_RTC_INTERRUPT);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
@ -13,8 +13,8 @@
|
|||
* limitations under the License.
|
||||
*/
|
||||
#include <string.h>
|
||||
#include "sysctl.h"
|
||||
#include "sha256.h"
|
||||
#include "sysctl.h"
|
||||
#include "utils.h"
|
||||
|
||||
#define ROTL(x, n) (((x) << (n)) | ((x) >> (32 - (n))))
|
||||
|
@ -22,9 +22,9 @@
|
|||
#define BYTESWAP(x) ((ROTR((x), 8) & 0xff00ff00L) | (ROTL((x), 8) & 0x00ff00ffL))
|
||||
#define BYTESWAP64(x) byteswap64(x)
|
||||
|
||||
volatile sha256_t* const sha256 = (volatile sha256_t*)SHA256_BASE_ADDR;
|
||||
volatile sha256_t *const sha256 = (volatile sha256_t *)SHA256_BASE_ADDR;
|
||||
static const uint8_t padding[64] =
|
||||
{
|
||||
{
|
||||
0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
|
@ -32,8 +32,7 @@ static const uint8_t padding[64] =
|
|||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
|
||||
|
||||
static inline uint64_t byteswap64(uint64_t x)
|
||||
{
|
||||
|
@ -62,22 +61,22 @@ void sha256_update(sha256_context_t *context, const void *input, size_t input_le
|
|||
size_t bytes_to_copy;
|
||||
uint32_t i;
|
||||
|
||||
while (input_len)
|
||||
while(input_len)
|
||||
{
|
||||
buffer_bytes_left = SHA256_BLOCK_LEN - context->buffer_len;
|
||||
bytes_to_copy = buffer_bytes_left;
|
||||
if (bytes_to_copy > input_len)
|
||||
if(bytes_to_copy > input_len)
|
||||
bytes_to_copy = input_len;
|
||||
memcpy(&context->buffer.bytes[context->buffer_len], data, bytes_to_copy);
|
||||
context->total_len += bytes_to_copy * 8L;
|
||||
context->buffer_len += bytes_to_copy;
|
||||
data += bytes_to_copy;
|
||||
input_len -= bytes_to_copy;
|
||||
if (context->buffer_len == SHA256_BLOCK_LEN)
|
||||
if(context->buffer_len == SHA256_BLOCK_LEN)
|
||||
{
|
||||
for (i = 0; i < 16; i++)
|
||||
for(i = 0; i < 16; i++)
|
||||
{
|
||||
while (sha256->sha_function_reg_1.fifo_in_full)
|
||||
while(sha256->sha_function_reg_1.fifo_in_full)
|
||||
;
|
||||
sha256->sha_data_in1 = context->buffer.words[i];
|
||||
}
|
||||
|
@ -93,16 +92,16 @@ void sha256_final(sha256_context_t *context, uint8_t *output)
|
|||
uint32_t i;
|
||||
|
||||
bytes_to_pad = 120L - context->buffer_len;
|
||||
if (bytes_to_pad > 64L)
|
||||
if(bytes_to_pad > 64L)
|
||||
bytes_to_pad -= 64L;
|
||||
length_pad = BYTESWAP64(context->total_len);
|
||||
sha256_update(context, padding, bytes_to_pad);
|
||||
sha256_update(context, &length_pad, 8L);
|
||||
while (!(sha256->sha_function_reg_0.sha_en))
|
||||
while(!(sha256->sha_function_reg_0.sha_en))
|
||||
;
|
||||
if (output)
|
||||
if(output)
|
||||
{
|
||||
for (i = 0; i < SHA256_HASH_WORDS; i++)
|
||||
for(i = 0; i < SHA256_HASH_WORDS; i++)
|
||||
{
|
||||
*((uint32_t *)output) = sha256->sha_result[SHA256_HASH_WORDS - i - 1];
|
||||
output += 4;
|
||||
|
@ -117,4 +116,3 @@ void sha256_hard_calculate(const uint8_t *input, size_t input_len, uint8_t *outp
|
|||
sha256_update(&sha, input, input_len);
|
||||
sha256_final(&sha, output);
|
||||
}
|
||||
|
||||
|
|
|
@ -12,24 +12,23 @@
|
|||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
#include "platform.h"
|
||||
#include "spi.h"
|
||||
#include "fpioa.h"
|
||||
#include "utils.h"
|
||||
#include "gpiohs.h"
|
||||
#include "sysctl.h"
|
||||
#include <bsp.h>
|
||||
#include <stddef.h>
|
||||
#include <stdlib.h>
|
||||
#include <string.h>
|
||||
#include <bsp.h>
|
||||
#include "fpioa.h"
|
||||
#include "gpiohs.h"
|
||||
#include "platform.h"
|
||||
#include "spi.h"
|
||||
#include "sysctl.h"
|
||||
#include "utils.h"
|
||||
|
||||
volatile spi_t *const spi[4] =
|
||||
{
|
||||
{
|
||||
(volatile spi_t *)SPI0_BASE_ADDR,
|
||||
(volatile spi_t *)SPI1_BASE_ADDR,
|
||||
(volatile spi_t *)SPI_SLAVE_BASE_ADDR,
|
||||
(volatile spi_t *)SPI3_BASE_ADDR
|
||||
};
|
||||
(volatile spi_t *)SPI3_BASE_ADDR};
|
||||
|
||||
typedef struct _spi_dma_context
|
||||
{
|
||||
|
@ -80,9 +79,9 @@ static spi_frame_format_t spi_get_frame_format(spi_device_num_t spi_num)
|
|||
|
||||
static spi_transfer_width_t spi_get_frame_size(size_t data_bit_length)
|
||||
{
|
||||
if (data_bit_length < 8)
|
||||
if(data_bit_length < 8)
|
||||
return SPI_TRANS_CHAR;
|
||||
else if (data_bit_length < 16)
|
||||
else if(data_bit_length < 16)
|
||||
return SPI_TRANS_SHORT;
|
||||
return SPI_TRANS_INT;
|
||||
}
|
||||
|
@ -92,7 +91,8 @@ static int spi_dma_irq(void *ctx)
|
|||
spi_instance_t *v_instance = (spi_instance_t *)ctx;
|
||||
volatile spi_t *spi_handle = spi[v_instance->spi_num];
|
||||
dmac_irq_unregister(v_instance->dmac_channel);
|
||||
while ((spi_handle->sr & 0x05) != 0x04);
|
||||
while((spi_handle->sr & 0x05) != 0x04)
|
||||
;
|
||||
spi_handle->ser = 0x00;
|
||||
spi_handle->ssienr = 0x00;
|
||||
spinlock_unlock(&v_instance->lock);
|
||||
|
@ -160,7 +160,7 @@ void spi_init(spi_device_num_t spi_num, spi_work_mode_t work_mode, spi_frame_for
|
|||
break;
|
||||
}
|
||||
|
||||
switch (frame_format)
|
||||
switch(frame_format)
|
||||
{
|
||||
case SPI_FF_DUAL:
|
||||
configASSERT(data_bit_length % 2 == 0);
|
||||
|
@ -196,7 +196,7 @@ void spi_init_non_standard(spi_device_num_t spi_num, uint32_t instruction_length
|
|||
configASSERT(spi_num < SPI_DEVICE_MAX && spi_num != 2);
|
||||
volatile spi_t *spi_handle = spi[spi_num];
|
||||
uint32_t inst_l = 0;
|
||||
switch (instruction_length)
|
||||
switch(instruction_length)
|
||||
{
|
||||
case 0:
|
||||
inst_l = 0;
|
||||
|
@ -224,11 +224,10 @@ void spi_init_non_standard(spi_device_num_t spi_num, uint32_t instruction_length
|
|||
uint32_t spi_set_clk_rate(spi_device_num_t spi_num, uint32_t spi_clk)
|
||||
{
|
||||
uint32_t spi_baudr = sysctl_clock_get_freq(SYSCTL_CLOCK_SPI0 + spi_num) / spi_clk;
|
||||
if(spi_baudr < 2 )
|
||||
if(spi_baudr < 2)
|
||||
{
|
||||
spi_baudr = 2;
|
||||
}
|
||||
else if(spi_baudr > 65534)
|
||||
} else if(spi_baudr > 65534)
|
||||
{
|
||||
spi_baudr = 65534;
|
||||
}
|
||||
|
@ -272,7 +271,7 @@ void spi_send_data_normal(spi_device_num_t spi_num, spi_chip_select_t chip_selec
|
|||
spi_handle->ssienr = 0x01;
|
||||
spi_handle->ser = 1U << chip_select;
|
||||
uint32_t i = 0;
|
||||
while (tx_len)
|
||||
while(tx_len)
|
||||
{
|
||||
fifo_len = 32 - spi_handle->txflr;
|
||||
fifo_len = fifo_len < tx_len ? fifo_len : tx_len;
|
||||
|
@ -282,16 +281,15 @@ void spi_send_data_normal(spi_device_num_t spi_num, spi_chip_select_t chip_selec
|
|||
fifo_len = fifo_len / 4 * 4;
|
||||
if(v_misalign_flag)
|
||||
{
|
||||
for(index = 0; index < fifo_len; index +=4)
|
||||
for(index = 0; index < fifo_len; index += 4)
|
||||
{
|
||||
memcpy(&v_send_data, tx_buff + i , 4);
|
||||
memcpy(&v_send_data, tx_buff + i, 4);
|
||||
spi_handle->dr[0] = v_send_data;
|
||||
i += 4;
|
||||
}
|
||||
}
|
||||
else
|
||||
} else
|
||||
{
|
||||
for (index = 0; index < fifo_len / 4; index++)
|
||||
for(index = 0; index < fifo_len / 4; index++)
|
||||
spi_handle->dr[0] = ((uint32_t *)tx_buff)[i++];
|
||||
}
|
||||
break;
|
||||
|
@ -299,31 +297,29 @@ void spi_send_data_normal(spi_device_num_t spi_num, spi_chip_select_t chip_selec
|
|||
fifo_len = fifo_len / 2 * 2;
|
||||
if(v_misalign_flag)
|
||||
{
|
||||
for(index = 0; index < fifo_len; index +=2)
|
||||
for(index = 0; index < fifo_len; index += 2)
|
||||
{
|
||||
memcpy(&v_send_data, tx_buff + i, 2);
|
||||
spi_handle->dr[0] = v_send_data;
|
||||
i += 2;
|
||||
}
|
||||
}
|
||||
else
|
||||
} else
|
||||
{
|
||||
for (index = 0; index < fifo_len / 2; index++)
|
||||
for(index = 0; index < fifo_len / 2; index++)
|
||||
spi_handle->dr[0] = ((uint16_t *)tx_buff)[i++];
|
||||
}
|
||||
break;
|
||||
default:
|
||||
for (index = 0; index < fifo_len; index++)
|
||||
for(index = 0; index < fifo_len; index++)
|
||||
spi_handle->dr[0] = tx_buff[i++];
|
||||
break;
|
||||
}
|
||||
tx_len -= fifo_len;
|
||||
}
|
||||
while ((spi_handle->sr & 0x05) != 0x04)
|
||||
while((spi_handle->sr & 0x05) != 0x04)
|
||||
;
|
||||
spi_handle->ser = 0x00;
|
||||
spi_handle->ssienr = 0x00;
|
||||
|
||||
}
|
||||
|
||||
void spi_send_data_standard(spi_device_num_t spi_num, spi_chip_select_t chip_select, const uint8_t *cmd_buff,
|
||||
|
@ -432,7 +428,7 @@ void spi_send_data_normal_dma(dmac_channel_number_t channel_num, spi_device_num_
|
|||
spi_handle->dmacr = 0x2; /*enable dma transmit*/
|
||||
spi_handle->ssienr = 0x01;
|
||||
|
||||
sysctl_dma_select((sysctl_dma_channel_t) channel_num, SYSCTL_DMA_SELECT_SSI0_TX_REQ + spi_num * 2);
|
||||
sysctl_dma_select((sysctl_dma_channel_t)channel_num, SYSCTL_DMA_SELECT_SSI0_TX_REQ + spi_num * 2);
|
||||
dmac_set_single_mode(channel_num, buf, (void *)(&spi_handle->dr[0]), DMAC_ADDR_INCREMENT, DMAC_ADDR_NOCHANGE,
|
||||
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, tx_len);
|
||||
spi_handle->ser = 1U << chip_select;
|
||||
|
@ -440,7 +436,7 @@ void spi_send_data_normal_dma(dmac_channel_number_t channel_num, spi_device_num_
|
|||
if(spi_transfer_width != SPI_TRANS_INT)
|
||||
free((void *)buf);
|
||||
|
||||
while ((spi_handle->sr & 0x05) != 0x04)
|
||||
while((spi_handle->sr & 0x05) != 0x04)
|
||||
;
|
||||
spi_handle->ser = 0x00;
|
||||
spi_handle->ssienr = 0x00;
|
||||
|
@ -596,22 +592,22 @@ void spi_receive_data_standard(spi_device_num_t spi_num, spi_chip_select_t chip_
|
|||
spi_handle->ctrlr1 = (uint32_t)(v_rx_len - 1);
|
||||
spi_handle->ssienr = 0x01;
|
||||
|
||||
while (v_cmd_len)
|
||||
while(v_cmd_len)
|
||||
{
|
||||
fifo_len = 32 - spi_handle->txflr;
|
||||
fifo_len = fifo_len < v_cmd_len ? fifo_len : v_cmd_len;
|
||||
switch(frame_width)
|
||||
{
|
||||
case SPI_TRANS_INT:
|
||||
for (index = 0; index < fifo_len; index++)
|
||||
for(index = 0; index < fifo_len; index++)
|
||||
spi_handle->dr[0] = ((uint32_t *)cmd_buff)[i++];
|
||||
break;
|
||||
case SPI_TRANS_SHORT:
|
||||
for (index = 0; index < fifo_len; index++)
|
||||
for(index = 0; index < fifo_len; index++)
|
||||
spi_handle->dr[0] = ((uint16_t *)cmd_buff)[i++];
|
||||
break;
|
||||
default:
|
||||
for (index = 0; index < fifo_len; index++)
|
||||
for(index = 0; index < fifo_len; index++)
|
||||
spi_handle->dr[0] = cmd_buff[i++];
|
||||
break;
|
||||
}
|
||||
|
@ -626,22 +622,22 @@ void spi_receive_data_standard(spi_device_num_t spi_num, spi_chip_select_t chip_
|
|||
}
|
||||
|
||||
i = 0;
|
||||
while (v_rx_len)
|
||||
while(v_rx_len)
|
||||
{
|
||||
fifo_len = spi_handle->rxflr;
|
||||
fifo_len = fifo_len < v_rx_len ? fifo_len : v_rx_len;
|
||||
switch(frame_width)
|
||||
{
|
||||
case SPI_TRANS_INT:
|
||||
for (index = 0; index < fifo_len; index++)
|
||||
for(index = 0; index < fifo_len; index++)
|
||||
((uint32_t *)rx_buff)[i++] = spi_handle->dr[0];
|
||||
break;
|
||||
case SPI_TRANS_SHORT:
|
||||
for (index = 0; index < fifo_len; index++)
|
||||
for(index = 0; index < fifo_len; index++)
|
||||
((uint16_t *)rx_buff)[i++] = (uint16_t)spi_handle->dr[0];
|
||||
break;
|
||||
default:
|
||||
for (index = 0; index < fifo_len; index++)
|
||||
for(index = 0; index < fifo_len; index++)
|
||||
rx_buff[i++] = (uint8_t)spi_handle->dr[0];
|
||||
break;
|
||||
}
|
||||
|
@ -690,7 +686,6 @@ void spi_receive_data_normal_dma(dmac_channel_number_t dma_send_channel_num,
|
|||
spi_handle->ssienr = 0x00;
|
||||
}
|
||||
|
||||
|
||||
void spi_receive_data_standard_dma(dmac_channel_number_t dma_send_channel_num,
|
||||
dmac_channel_number_t dma_receive_channel_num,
|
||||
spi_device_num_t spi_num, spi_chip_select_t chip_select, const uint8_t *cmd_buff,
|
||||
|
@ -734,7 +729,7 @@ void spi_receive_data_standard_dma(dmac_channel_number_t dma_send_channel_num,
|
|||
v_cmd_len = cmd_len / 4;
|
||||
break;
|
||||
case SPI_TRANS_SHORT:
|
||||
write_cmd = malloc((cmd_len + rx_len) /2 * sizeof(uint32_t));
|
||||
write_cmd = malloc((cmd_len + rx_len) / 2 * sizeof(uint32_t));
|
||||
for(i = 0; i < cmd_len / 2; i++)
|
||||
write_cmd[i] = ((uint16_t *)cmd_buff)[i];
|
||||
read_buf = &write_cmd[i];
|
||||
|
@ -810,12 +805,12 @@ void spi_receive_data_multiple(spi_device_num_t spi_num, spi_chip_select_t chip_
|
|||
spi_handle->ctrlr1 = (uint32_t)(v_rx_len - 1);
|
||||
spi_handle->ssienr = 0x01;
|
||||
|
||||
while (v_cmd_len)
|
||||
while(v_cmd_len)
|
||||
{
|
||||
fifo_len = 32 - spi_handle->txflr;
|
||||
fifo_len = fifo_len < v_cmd_len ? fifo_len : v_cmd_len;
|
||||
|
||||
for (index = 0; index < fifo_len; index++)
|
||||
for(index = 0; index < fifo_len; index++)
|
||||
spi_handle->dr[0] = *cmd_buff++;
|
||||
|
||||
spi_handle->ser = 1U << chip_select;
|
||||
|
@ -827,22 +822,22 @@ void spi_receive_data_multiple(spi_device_num_t spi_num, spi_chip_select_t chip_
|
|||
spi_handle->ser = 1U << chip_select;
|
||||
}
|
||||
|
||||
while (v_rx_len)
|
||||
while(v_rx_len)
|
||||
{
|
||||
fifo_len = spi_handle->rxflr;
|
||||
fifo_len = fifo_len < v_rx_len ? fifo_len : v_rx_len;
|
||||
switch(frame_width)
|
||||
{
|
||||
case SPI_TRANS_INT:
|
||||
for (index = 0; index < fifo_len; index++)
|
||||
for(index = 0; index < fifo_len; index++)
|
||||
((uint32_t *)rx_buff)[i++] = spi_handle->dr[0];
|
||||
break;
|
||||
case SPI_TRANS_SHORT:
|
||||
for (index = 0; index < fifo_len; index++)
|
||||
for(index = 0; index < fifo_len; index++)
|
||||
((uint16_t *)rx_buff)[i++] = (uint16_t)spi_handle->dr[0];
|
||||
break;
|
||||
default:
|
||||
for (index = 0; index < fifo_len; index++)
|
||||
for(index = 0; index < fifo_len; index++)
|
||||
rx_buff[i++] = (uint8_t)spi_handle->dr[0];
|
||||
break;
|
||||
}
|
||||
|
@ -852,7 +847,6 @@ void spi_receive_data_multiple(spi_device_num_t spi_num, spi_chip_select_t chip_
|
|||
|
||||
spi_handle->ser = 0x00;
|
||||
spi_handle->ssienr = 0x00;
|
||||
|
||||
}
|
||||
|
||||
void spi_receive_data_multiple_dma(dmac_channel_number_t dma_send_channel_num,
|
||||
|
@ -893,7 +887,7 @@ void spi_receive_data_multiple_dma(dmac_channel_number_t dma_send_channel_num,
|
|||
v_recv_len = rx_len / 4;
|
||||
break;
|
||||
case SPI_TRANS_SHORT:
|
||||
write_cmd = malloc(cmd_len + rx_len /2 * sizeof(uint32_t));
|
||||
write_cmd = malloc(cmd_len + rx_len / 2 * sizeof(uint32_t));
|
||||
for(i = 0; i < cmd_len; i++)
|
||||
write_cmd[i] = cmd_buff[i];
|
||||
read_buf = &write_cmd[i];
|
||||
|
@ -947,7 +941,7 @@ void spi_send_data_multiple(spi_device_num_t spi_num, spi_chip_select_t chip_sel
|
|||
fifo_len = 32 - spi_handle->txflr;
|
||||
fifo_len = fifo_len < v_cmd_len ? fifo_len : v_cmd_len;
|
||||
fifo_len = fifo_len / 4 * 4;
|
||||
for (index = 0; index < fifo_len / 4; index++)
|
||||
for(index = 0; index < fifo_len / 4; index++)
|
||||
spi_handle->dr[0] = *cmd_buff++;
|
||||
v_cmd_len -= fifo_len;
|
||||
}
|
||||
|
@ -1031,7 +1025,7 @@ void spi_fill_data_dma(dmac_channel_number_t channel_num, spi_device_num_t spi_n
|
|||
spi_handle->ser = 1U << chip_select;
|
||||
dmac_wait_done(channel_num);
|
||||
|
||||
while ((spi_handle->sr & 0x05) != 0x04)
|
||||
while((spi_handle->sr & 0x05) != 0x04)
|
||||
;
|
||||
spi_handle->ser = 0x00;
|
||||
spi_handle->ssienr = 0x00;
|
||||
|
@ -1043,7 +1037,7 @@ static int spi_slave_irq(void *ctx)
|
|||
|
||||
spi_handle->imr = 0x00;
|
||||
*(volatile uint32_t *)((uintptr_t)spi_handle->icr);
|
||||
if (g_instance.status == IDLE)
|
||||
if(g_instance.status == IDLE)
|
||||
g_instance.status = COMMAND;
|
||||
return 0;
|
||||
}
|
||||
|
@ -1074,24 +1068,24 @@ static void spi_slave_command_mode(void)
|
|||
switch(frame_width)
|
||||
{
|
||||
case SPI_TRANS_INT:
|
||||
for (uint32_t i = 0; i < 8 / 4; i++)
|
||||
for(uint32_t i = 0; i < 8 / 4; i++)
|
||||
((uint32_t *)cmd_data)[i] = spi_handle->dr[0];
|
||||
break;
|
||||
case SPI_TRANS_SHORT:
|
||||
for (uint32_t i = 0; i < 8 / 2; i++)
|
||||
for(uint32_t i = 0; i < 8 / 2; i++)
|
||||
((uint16_t *)cmd_data)[i] = spi_handle->dr[0];
|
||||
break;
|
||||
default:
|
||||
for (uint32_t i = 0; i < 8; i++)
|
||||
for(uint32_t i = 0; i < 8; i++)
|
||||
cmd_data[i] = spi_handle->dr[0];
|
||||
break;
|
||||
}
|
||||
|
||||
for (uint32_t i = 0; i < 7; i++)
|
||||
for(uint32_t i = 0; i < 7; i++)
|
||||
{
|
||||
sum += cmd_data[i];
|
||||
}
|
||||
if (cmd_data[7] != sum)
|
||||
if(cmd_data[7] != sum)
|
||||
{
|
||||
spi_slave_idle_mode();
|
||||
return;
|
||||
|
@ -1099,23 +1093,22 @@ static void spi_slave_command_mode(void)
|
|||
g_instance.command.cmd = cmd_data[0];
|
||||
g_instance.command.addr = cmd_data[1] | (cmd_data[2] << 8) | (cmd_data[3] << 16) | (cmd_data[4] << 24);
|
||||
g_instance.command.len = cmd_data[5] | (cmd_data[6] << 8);
|
||||
if (g_instance.command.len == 0)
|
||||
if(g_instance.command.len == 0)
|
||||
g_instance.command.len = 65536;
|
||||
if ((g_instance.command.cmd < WRITE_DATA_BLOCK) && (g_instance.command.len > 8))
|
||||
if((g_instance.command.cmd < WRITE_DATA_BLOCK) && (g_instance.command.len > 8))
|
||||
{
|
||||
spi_slave_idle_mode();
|
||||
return;
|
||||
}
|
||||
g_instance.status = TRANSFER;
|
||||
spi_handle->ssienr = 0x00;
|
||||
if (g_instance.command.cmd == WRITE_CONFIG)
|
||||
if(g_instance.command.cmd == WRITE_CONFIG)
|
||||
{
|
||||
spi_handle->ctrlr0 = (0x0 << g_instance.work_mode) | (0x1 << g_instance.slv_oe) | ((g_instance.data_bit_length - 1) << g_instance.dfs);
|
||||
spi[2]->rxftlr = g_instance.command.len / data_width - 1;
|
||||
spi_handle->imr = 0x00;
|
||||
spi_handle->ssienr = 0x01;
|
||||
}
|
||||
else if (g_instance.command.cmd == READ_CONFIG)
|
||||
} else if(g_instance.command.cmd == READ_CONFIG)
|
||||
{
|
||||
spi_handle->ctrlr0 = (0x0 << g_instance.work_mode) | (0x0 << g_instance.slv_oe) | ((g_instance.data_bit_length - 1) << g_instance.dfs);
|
||||
spi_set_tmod(2, SPI_TMOD_TRANS);
|
||||
|
@ -1125,33 +1118,31 @@ static void spi_slave_command_mode(void)
|
|||
switch(frame_width)
|
||||
{
|
||||
case SPI_TRANS_INT:
|
||||
for (uint32_t i = 0; i < g_instance.command.len / 4; i++)
|
||||
for(uint32_t i = 0; i < g_instance.command.len / 4; i++)
|
||||
{
|
||||
spi_handle->dr[0] = ((uint32_t *)&g_instance.config_ptr[g_instance.command.addr])[i];
|
||||
}
|
||||
break;
|
||||
case SPI_TRANS_SHORT:
|
||||
for (uint32_t i = 0; i < g_instance.command.len / 2; i++)
|
||||
for(uint32_t i = 0; i < g_instance.command.len / 2; i++)
|
||||
{
|
||||
spi_handle->dr[0] = ((uint16_t *)&g_instance.config_ptr[g_instance.command.addr])[i];
|
||||
}
|
||||
break;
|
||||
default:
|
||||
for (uint32_t i = 0; i < g_instance.command.len; i++)
|
||||
for(uint32_t i = 0; i < g_instance.command.len; i++)
|
||||
{
|
||||
spi_handle->dr[0] = ((uint8_t *)&g_instance.config_ptr[g_instance.command.addr])[i];
|
||||
}
|
||||
break;
|
||||
}
|
||||
}
|
||||
else if (g_instance.command.cmd == WRITE_DATA_BYTE)
|
||||
} else if(g_instance.command.cmd == WRITE_DATA_BYTE)
|
||||
{
|
||||
spi_handle->ctrlr0 = (0x0 << g_instance.work_mode) | (0x1 << g_instance.slv_oe) | ((g_instance.data_bit_length - 1) << g_instance.dfs);
|
||||
spi[2]->rxftlr = g_instance.command.len / data_width - 1;
|
||||
spi_handle->imr = 0x00;
|
||||
spi_handle->ssienr = 0x01;
|
||||
}
|
||||
else if (g_instance.command.cmd == READ_DATA_BYTE)
|
||||
} else if(g_instance.command.cmd == READ_DATA_BYTE)
|
||||
{
|
||||
spi_handle->ctrlr0 = (0x0 << g_instance.work_mode) | (0x0 << g_instance.slv_oe) | ((g_instance.data_bit_length - 1) << g_instance.dfs);
|
||||
spi_set_tmod(2, SPI_TMOD_TRANS);
|
||||
|
@ -1161,26 +1152,25 @@ static void spi_slave_command_mode(void)
|
|||
switch(frame_width)
|
||||
{
|
||||
case SPI_TRANS_INT:
|
||||
for (uint32_t i = 0; i < g_instance.command.len / 4; i++)
|
||||
for(uint32_t i = 0; i < g_instance.command.len / 4; i++)
|
||||
{
|
||||
spi_handle->dr[0] = ((uint32_t *)(uintptr_t)g_instance.command.addr)[i];
|
||||
}
|
||||
break;
|
||||
case SPI_TRANS_SHORT:
|
||||
for (uint32_t i = 0; i < g_instance.command.len / 2; i++)
|
||||
for(uint32_t i = 0; i < g_instance.command.len / 2; i++)
|
||||
{
|
||||
spi_handle->dr[0] = ((uint16_t *)(uintptr_t)g_instance.command.addr)[i];
|
||||
}
|
||||
break;
|
||||
default:
|
||||
for (uint32_t i = 0; i < g_instance.command.len; i++)
|
||||
for(uint32_t i = 0; i < g_instance.command.len; i++)
|
||||
{
|
||||
spi_handle->dr[0] = ((uint8_t *)(uintptr_t)g_instance.command.addr)[i];
|
||||
}
|
||||
break;
|
||||
}
|
||||
}
|
||||
else if (g_instance.command.cmd == WRITE_DATA_BLOCK)
|
||||
} else if(g_instance.command.cmd == WRITE_DATA_BLOCK)
|
||||
{
|
||||
spi_handle->ctrlr0 = (0x0 << g_instance.work_mode) | (0x1 << g_instance.slv_oe) | ((32 - 1) << g_instance.dfs);
|
||||
|
||||
|
@ -1192,8 +1182,7 @@ static void spi_slave_command_mode(void)
|
|||
|
||||
dmac_set_single_mode(g_instance.dmac_channel, (void *)(&spi_handle->dr[0]), (void *)((uintptr_t)g_instance.command.addr & 0xFFFFFFF0), DMAC_ADDR_NOCHANGE, DMAC_ADDR_INCREMENT,
|
||||
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, g_instance.command.len * 4);
|
||||
}
|
||||
else if (g_instance.command.cmd == READ_DATA_BLOCK)
|
||||
} else if(g_instance.command.cmd == READ_DATA_BLOCK)
|
||||
{
|
||||
spi_handle->ctrlr0 = (0x0 << g_instance.work_mode) | (0x0 << g_instance.slv_oe) | ((32 - 1) << g_instance.dfs);
|
||||
spi_set_tmod(2, SPI_TMOD_TRANS);
|
||||
|
@ -1204,8 +1193,7 @@ static void spi_slave_command_mode(void)
|
|||
sysctl_dma_select(g_instance.dmac_channel, SYSCTL_DMA_SELECT_SSI0_TX_REQ + spi_num * 2);
|
||||
dmac_set_single_mode(g_instance.dmac_channel, (void *)((uintptr_t)g_instance.command.addr & 0xFFFFFFF0), (void *)(&spi_handle->dr[0]), DMAC_ADDR_INCREMENT, DMAC_ADDR_NOCHANGE,
|
||||
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, g_instance.command.len * 4);
|
||||
}
|
||||
else
|
||||
} else
|
||||
{
|
||||
spi_slave_idle_mode();
|
||||
return;
|
||||
|
@ -1232,70 +1220,67 @@ static void spi_slave_transfer_mode(void)
|
|||
}
|
||||
volatile spi_t *spi_handle = spi[2];
|
||||
g_instance.command.err = 0;
|
||||
if (g_instance.command.cmd == WRITE_CONFIG || g_instance.command.cmd == WRITE_DATA_BYTE)
|
||||
if(g_instance.command.cmd == WRITE_CONFIG || g_instance.command.cmd == WRITE_DATA_BYTE)
|
||||
{
|
||||
if (spi_handle->rxflr < command_len - 1)
|
||||
if(spi_handle->rxflr < command_len - 1)
|
||||
g_instance.command.err = 1;
|
||||
}
|
||||
else if (g_instance.command.cmd == READ_CONFIG || g_instance.command.cmd == READ_DATA_BYTE)
|
||||
} else if(g_instance.command.cmd == READ_CONFIG || g_instance.command.cmd == READ_DATA_BYTE)
|
||||
{
|
||||
if (spi_handle->txflr != 0)
|
||||
if(spi_handle->txflr != 0)
|
||||
g_instance.command.err = 2;
|
||||
} else if (g_instance.command.cmd == WRITE_DATA_BLOCK || g_instance.command.cmd == READ_DATA_BLOCK)
|
||||
} else if(g_instance.command.cmd == WRITE_DATA_BLOCK || g_instance.command.cmd == READ_DATA_BLOCK)
|
||||
{
|
||||
if (dmac->channel[g_instance.dmac_channel].intstatus != 0x02)
|
||||
if(dmac->channel[g_instance.dmac_channel].intstatus != 0x02)
|
||||
g_instance.command.err = 3;
|
||||
}
|
||||
else
|
||||
} else
|
||||
{
|
||||
spi_slave_idle_mode();
|
||||
return;
|
||||
}
|
||||
|
||||
if (g_instance.command.err == 0)
|
||||
if(g_instance.command.err == 0)
|
||||
{
|
||||
if (g_instance.command.cmd == WRITE_CONFIG)
|
||||
if(g_instance.command.cmd == WRITE_CONFIG)
|
||||
{
|
||||
switch(frame_width)
|
||||
{
|
||||
case SPI_TRANS_INT:
|
||||
for (uint32_t i = 0; i < command_len; i++)
|
||||
for(uint32_t i = 0; i < command_len; i++)
|
||||
{
|
||||
((uint32_t *)&g_instance.config_ptr[g_instance.command.addr])[i] = spi_handle->dr[0];
|
||||
}
|
||||
break;
|
||||
case SPI_TRANS_SHORT:
|
||||
for (uint32_t i = 0; i < command_len; i++)
|
||||
for(uint32_t i = 0; i < command_len; i++)
|
||||
{
|
||||
((uint16_t *)&g_instance.config_ptr[g_instance.command.addr])[i] = spi_handle->dr[0];
|
||||
}
|
||||
break;
|
||||
default:
|
||||
for (uint32_t i = 0; i < command_len; i++)
|
||||
for(uint32_t i = 0; i < command_len; i++)
|
||||
{
|
||||
((uint8_t *)&g_instance.config_ptr[g_instance.command.addr])[i] = spi_handle->dr[0];
|
||||
}
|
||||
break;
|
||||
}
|
||||
}
|
||||
else if (g_instance.command.cmd == WRITE_DATA_BYTE)
|
||||
} else if(g_instance.command.cmd == WRITE_DATA_BYTE)
|
||||
{
|
||||
switch(frame_width)
|
||||
{
|
||||
case SPI_TRANS_INT:
|
||||
for (uint32_t i = 0; i < command_len; i++)
|
||||
for(uint32_t i = 0; i < command_len; i++)
|
||||
{
|
||||
((uint32_t *)(uintptr_t)g_instance.command.addr)[i] = spi_handle->dr[0];
|
||||
}
|
||||
break;
|
||||
case SPI_TRANS_SHORT:
|
||||
for (uint32_t i = 0; i < command_len; i++)
|
||||
for(uint32_t i = 0; i < command_len; i++)
|
||||
{
|
||||
((uint16_t *)(uintptr_t)g_instance.command.addr)[i] = spi_handle->dr[0];
|
||||
}
|
||||
break;
|
||||
default:
|
||||
for (uint32_t i = 0; i < command_len; i++)
|
||||
for(uint32_t i = 0; i < command_len; i++)
|
||||
{
|
||||
((uint8_t *)(uintptr_t)g_instance.command.addr)[i] = spi_handle->dr[0];
|
||||
}
|
||||
|
@ -1312,11 +1297,11 @@ static void spi_slave_transfer_mode(void)
|
|||
|
||||
static void spi_slave_cs_irq(void)
|
||||
{
|
||||
if (g_instance.status == IDLE)
|
||||
if(g_instance.status == IDLE)
|
||||
spi_slave_idle_mode();
|
||||
else if (g_instance.status == COMMAND)
|
||||
else if(g_instance.status == COMMAND)
|
||||
spi_slave_command_mode();
|
||||
else if (g_instance.status == TRANSFER)
|
||||
else if(g_instance.status == TRANSFER)
|
||||
spi_slave_transfer_mode();
|
||||
}
|
||||
|
||||
|
@ -1434,7 +1419,7 @@ void spi_handle_data_dma(spi_device_num_t spi_num, spi_chip_select_t chip_select
|
|||
if(!cb)
|
||||
{
|
||||
dmac_wait_idle(data.tx_channel);
|
||||
while ((spi_handle->sr & 0x05) != 0x04)
|
||||
while((spi_handle->sr & 0x05) != 0x04)
|
||||
;
|
||||
}
|
||||
break;
|
||||
|
@ -1475,8 +1460,7 @@ void spi_handle_data_dma(spi_device_num_t spi_num, spi_chip_select_t chip_select
|
|||
{
|
||||
dmac_irq_register(data.tx_channel, spi_dma_irq, &g_spi_instance[spi_num], cb->priority);
|
||||
g_spi_instance[spi_num].dmac_channel = data.tx_channel;
|
||||
}
|
||||
else
|
||||
} else
|
||||
{
|
||||
dmac_irq_register(data.rx_channel, spi_dma_irq, &g_spi_instance[spi_num], cb->priority);
|
||||
g_spi_instance[spi_num].dmac_channel = data.rx_channel;
|
||||
|
@ -1510,4 +1494,3 @@ void spi_handle_data_dma(spi_device_num_t spi_num, spi_chip_select_t chip_select
|
|||
spi_handle->ssienr = 0x00;
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
@ -12,40 +12,40 @@
|
|||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
#include <stdint.h>
|
||||
#include <stdlib.h>
|
||||
#include <math.h>
|
||||
#include <stdint.h>
|
||||
#include <stdio.h>
|
||||
#include "sysctl.h"
|
||||
#include "string.h"
|
||||
#include "encoding.h"
|
||||
#include <stdlib.h>
|
||||
#include "bsp.h"
|
||||
#include "encoding.h"
|
||||
#include "string.h"
|
||||
#include "sysctl.h"
|
||||
#include "uart.h"
|
||||
|
||||
#define SYSCTRL_CLOCK_FREQ_IN0 (26000000UL)
|
||||
|
||||
const uint8_t get_select_pll2[] =
|
||||
{
|
||||
{
|
||||
[SYSCTL_SOURCE_IN0] = 0,
|
||||
[SYSCTL_SOURCE_PLL0] = 1,
|
||||
[SYSCTL_SOURCE_PLL1] = 2,
|
||||
};
|
||||
|
||||
const uint8_t get_source_pll2[] =
|
||||
{
|
||||
{
|
||||
[0] = SYSCTL_SOURCE_IN0,
|
||||
[1] = SYSCTL_SOURCE_PLL0,
|
||||
[2] = SYSCTL_SOURCE_PLL1,
|
||||
};
|
||||
|
||||
const uint8_t get_select_aclk[] =
|
||||
{
|
||||
{
|
||||
[SYSCTL_SOURCE_IN0] = 0,
|
||||
[SYSCTL_SOURCE_PLL0] = 1,
|
||||
};
|
||||
|
||||
const uint8_t get_source_aclk[] =
|
||||
{
|
||||
{
|
||||
[0] = SYSCTL_SOURCE_IN0,
|
||||
[1] = SYSCTL_SOURCE_PLL0,
|
||||
};
|
||||
|
@ -64,7 +64,7 @@ uint32_t sysctl_get_freq(void)
|
|||
|
||||
static void sysctl_reset_ctl(sysctl_reset_t reset, uint8_t rst_value)
|
||||
{
|
||||
switch (reset)
|
||||
switch(reset)
|
||||
{
|
||||
case SYSCTL_RESET_SOC:
|
||||
sysctl->soft_reset.soft_reset = rst_value;
|
||||
|
@ -178,9 +178,9 @@ static int sysctl_clock_bus_en(sysctl_clock_t clock, uint8_t en)
|
|||
*/
|
||||
|
||||
/* The APB clock should carefully disable */
|
||||
if (en)
|
||||
if(en)
|
||||
{
|
||||
switch (clock)
|
||||
switch(clock)
|
||||
{
|
||||
/*
|
||||
* These peripheral devices are under APB0
|
||||
|
@ -238,7 +238,7 @@ static int sysctl_clock_bus_en(sysctl_clock_t clock, uint8_t en)
|
|||
|
||||
static int sysctl_clock_device_en(sysctl_clock_t clock, uint8_t en)
|
||||
{
|
||||
switch (clock)
|
||||
switch(clock)
|
||||
{
|
||||
/*
|
||||
* These devices are PLL
|
||||
|
@ -388,7 +388,7 @@ static int sysctl_clock_device_en(sysctl_clock_t clock, uint8_t en)
|
|||
|
||||
int sysctl_clock_enable(sysctl_clock_t clock)
|
||||
{
|
||||
if (clock >= SYSCTL_CLOCK_MAX)
|
||||
if(clock >= SYSCTL_CLOCK_MAX)
|
||||
return -1;
|
||||
sysctl_clock_bus_en(clock, 1);
|
||||
sysctl_clock_device_en(clock, 1);
|
||||
|
@ -397,7 +397,7 @@ int sysctl_clock_enable(sysctl_clock_t clock)
|
|||
|
||||
int sysctl_clock_disable(sysctl_clock_t clock)
|
||||
{
|
||||
if (clock >= SYSCTL_CLOCK_MAX)
|
||||
if(clock >= SYSCTL_CLOCK_MAX)
|
||||
return -1;
|
||||
sysctl_clock_device_en(clock, 0);
|
||||
return 0;
|
||||
|
@ -406,7 +406,7 @@ int sysctl_clock_disable(sysctl_clock_t clock)
|
|||
int sysctl_clock_set_threshold(sysctl_threshold_t which, int threshold)
|
||||
{
|
||||
int result = 0;
|
||||
switch (which)
|
||||
switch(which)
|
||||
{
|
||||
/*
|
||||
* These threshold is 2 bit width
|
||||
|
@ -520,7 +520,7 @@ int sysctl_clock_get_threshold(sysctl_threshold_t which)
|
|||
{
|
||||
int threshold = 0;
|
||||
|
||||
switch (which)
|
||||
switch(which)
|
||||
{
|
||||
/*
|
||||
* Select and get threshold value
|
||||
|
@ -617,7 +617,7 @@ int sysctl_clock_get_threshold(sysctl_threshold_t which)
|
|||
int sysctl_clock_set_clock_select(sysctl_clock_select_t which, int select)
|
||||
{
|
||||
int result = 0;
|
||||
switch (which)
|
||||
switch(which)
|
||||
{
|
||||
/*
|
||||
* These clock select is 1 bit width
|
||||
|
@ -669,7 +669,7 @@ int sysctl_clock_get_clock_select(sysctl_clock_select_t which)
|
|||
{
|
||||
int clock_select = 0;
|
||||
|
||||
switch (which)
|
||||
switch(which)
|
||||
{
|
||||
/*
|
||||
* Select and get clock select value
|
||||
|
@ -716,7 +716,7 @@ uint32_t sysctl_clock_source_get_freq(sysctl_clock_source_t input)
|
|||
{
|
||||
uint32_t result;
|
||||
|
||||
switch (input)
|
||||
switch(input)
|
||||
{
|
||||
case SYSCTL_SOURCE_IN0:
|
||||
result = SYSCTRL_CLOCK_FREQ_IN0;
|
||||
|
@ -754,10 +754,10 @@ static int sysctl_pll_is_lock(sysctl_pll_t pll)
|
|||
*
|
||||
*/
|
||||
|
||||
if (pll >= SYSCTL_PLL_MAX)
|
||||
if(pll >= SYSCTL_PLL_MAX)
|
||||
return 0;
|
||||
|
||||
switch (pll)
|
||||
switch(pll)
|
||||
{
|
||||
case SYSCTL_PLL0:
|
||||
return sysctl->pll_lock.pll_lock0 == 3;
|
||||
|
@ -777,10 +777,10 @@ static int sysctl_pll_is_lock(sysctl_pll_t pll)
|
|||
|
||||
static int sysctl_pll_clear_slip(sysctl_pll_t pll)
|
||||
{
|
||||
if (pll >= SYSCTL_PLL_MAX)
|
||||
if(pll >= SYSCTL_PLL_MAX)
|
||||
return -1;
|
||||
|
||||
switch (pll)
|
||||
switch(pll)
|
||||
{
|
||||
case SYSCTL_PLL0:
|
||||
sysctl->pll_lock.pll_slip_clear0 = 1;
|
||||
|
@ -820,10 +820,10 @@ int sysctl_pll_enable(sysctl_pll_t pll)
|
|||
* t2 t3 t4
|
||||
*/
|
||||
|
||||
if (pll >= SYSCTL_PLL_MAX)
|
||||
if(pll >= SYSCTL_PLL_MAX)
|
||||
return -1;
|
||||
|
||||
switch (pll)
|
||||
switch(pll)
|
||||
{
|
||||
case SYSCTL_PLL0:
|
||||
/* Do not bypass PLL */
|
||||
|
@ -841,8 +841,8 @@ int sysctl_pll_enable(sysctl_pll_t pll)
|
|||
*/
|
||||
sysctl->pll0.pll_reset0 = 0;
|
||||
sysctl->pll0.pll_reset0 = 1;
|
||||
asm volatile ("nop");
|
||||
asm volatile ("nop");
|
||||
asm volatile("nop");
|
||||
asm volatile("nop");
|
||||
sysctl->pll0.pll_reset0 = 0;
|
||||
break;
|
||||
|
||||
|
@ -862,8 +862,8 @@ int sysctl_pll_enable(sysctl_pll_t pll)
|
|||
*/
|
||||
sysctl->pll1.pll_reset1 = 0;
|
||||
sysctl->pll1.pll_reset1 = 1;
|
||||
asm volatile ("nop");
|
||||
asm volatile ("nop");
|
||||
asm volatile("nop");
|
||||
asm volatile("nop");
|
||||
sysctl->pll1.pll_reset1 = 0;
|
||||
break;
|
||||
|
||||
|
@ -883,8 +883,8 @@ int sysctl_pll_enable(sysctl_pll_t pll)
|
|||
*/
|
||||
sysctl->pll2.pll_reset2 = 0;
|
||||
sysctl->pll2.pll_reset2 = 1;
|
||||
asm volatile ("nop");
|
||||
asm volatile ("nop");
|
||||
asm volatile("nop");
|
||||
asm volatile("nop");
|
||||
sysctl->pll2.pll_reset2 = 0;
|
||||
break;
|
||||
|
||||
|
@ -897,10 +897,10 @@ int sysctl_pll_enable(sysctl_pll_t pll)
|
|||
|
||||
int sysctl_pll_disable(sysctl_pll_t pll)
|
||||
{
|
||||
if (pll >= SYSCTL_PLL_MAX)
|
||||
if(pll >= SYSCTL_PLL_MAX)
|
||||
return -1;
|
||||
|
||||
switch (pll)
|
||||
switch(pll)
|
||||
{
|
||||
case SYSCTL_PLL0:
|
||||
/* Bypass PLL */
|
||||
|
@ -948,10 +948,10 @@ uint32_t sysctl_pll_get_freq(sysctl_pll_t pll)
|
|||
uint32_t nr = 0, nf = 0, od = 0;
|
||||
uint8_t select = 0;
|
||||
|
||||
if (pll >= SYSCTL_PLL_MAX)
|
||||
if(pll >= SYSCTL_PLL_MAX)
|
||||
return 0;
|
||||
|
||||
switch (pll)
|
||||
switch(pll)
|
||||
{
|
||||
case SYSCTL_PLL0:
|
||||
freq_in = sysctl_clock_source_get_freq(SYSCTL_SOURCE_IN0);
|
||||
|
@ -972,7 +972,7 @@ uint32_t sysctl_pll_get_freq(sysctl_pll_t pll)
|
|||
* Get input freq accroding select register
|
||||
*/
|
||||
select = sysctl->pll2.pll_ckin_sel2;
|
||||
if (select < sizeof(get_source_pll2))
|
||||
if(select < sizeof(get_source_pll2))
|
||||
freq_in = sysctl_clock_source_get_freq(get_source_pll2[select]);
|
||||
else
|
||||
return 0;
|
||||
|
@ -998,26 +998,26 @@ static uint32_t sysctl_pll_source_set_freq(sysctl_pll_t pll, sysctl_clock_source
|
|||
{
|
||||
uint32_t freq_in = 0;
|
||||
|
||||
if (pll >= SYSCTL_PLL_MAX)
|
||||
if(pll >= SYSCTL_PLL_MAX)
|
||||
return 0;
|
||||
|
||||
if (source >= SYSCTL_SOURCE_MAX)
|
||||
if(source >= SYSCTL_SOURCE_MAX)
|
||||
return 0;
|
||||
|
||||
switch (pll)
|
||||
switch(pll)
|
||||
{
|
||||
case SYSCTL_PLL0:
|
||||
case SYSCTL_PLL1:
|
||||
/*
|
||||
* Check input clock source
|
||||
*/
|
||||
if (source != SYSCTL_SOURCE_IN0)
|
||||
if(source != SYSCTL_SOURCE_IN0)
|
||||
return 0;
|
||||
freq_in = sysctl_clock_source_get_freq(SYSCTL_SOURCE_IN0);
|
||||
/*
|
||||
* Check input clock freq
|
||||
*/
|
||||
if (freq_in == 0)
|
||||
if(freq_in == 0)
|
||||
return 0;
|
||||
break;
|
||||
|
||||
|
@ -1025,12 +1025,12 @@ static uint32_t sysctl_pll_source_set_freq(sysctl_pll_t pll, sysctl_clock_source
|
|||
/*
|
||||
* Check input clock source
|
||||
*/
|
||||
if (source < sizeof(get_select_pll2))
|
||||
if(source < sizeof(get_select_pll2))
|
||||
freq_in = sysctl_clock_source_get_freq(source);
|
||||
/*
|
||||
* Check input clock freq
|
||||
*/
|
||||
if (freq_in == 0)
|
||||
if(freq_in == 0)
|
||||
return 0;
|
||||
break;
|
||||
|
||||
|
@ -1085,99 +1085,98 @@ static uint32_t sysctl_pll_source_set_freq(sysctl_pll_t pll, sysctl_clock_source
|
|||
val = fout / fin;
|
||||
terr = 0.5 / ((double)(nf_max / 2));
|
||||
first = firstx = 1;
|
||||
if (terr != -2)
|
||||
if(terr != -2)
|
||||
{
|
||||
first = 0;
|
||||
if (terr == 0)
|
||||
if(terr == 0)
|
||||
terr = 1e-16;
|
||||
merr = fabs(terr);
|
||||
}
|
||||
found = 0;
|
||||
for (nfi = val; nfi < nf_max; ++nfi)
|
||||
for(nfi = val; nfi < nf_max; ++nfi)
|
||||
{
|
||||
nr = rint(((double)nfi) / val);
|
||||
if (nr == 0)
|
||||
if(nr == 0)
|
||||
continue;
|
||||
if ((ref_rng) && (nr < nr_min))
|
||||
if((ref_rng) && (nr < nr_min))
|
||||
continue;
|
||||
if (fin / ((double)nr) > ref_max)
|
||||
if(fin / ((double)nr) > ref_max)
|
||||
continue;
|
||||
nrx = nr;
|
||||
nf = nfx = nfi;
|
||||
nval = ((double)nfx) / ((double)nr);
|
||||
if (nf == 0)
|
||||
if(nf == 0)
|
||||
nf = 1;
|
||||
err = 1 - nval / val;
|
||||
|
||||
if ((first) || (fabs(err) < merr * (1 + 1e-6)) || (fabs(err) < 1e-16))
|
||||
if((first) || (fabs(err) < merr * (1 + 1e-6)) || (fabs(err) < 1e-16))
|
||||
{
|
||||
not = floor(vco_max / fout);
|
||||
for (no = (not > no_max) ? no_max : not; no > no_min; --no)
|
||||
for(no = (not > no_max) ? no_max : not; no > no_min; --no)
|
||||
{
|
||||
if ((ref_rng) && ((nr / no) < nr_min))
|
||||
if((ref_rng) && ((nr / no) < nr_min))
|
||||
continue;
|
||||
if ((nr % no) == 0)
|
||||
if((nr % no) == 0)
|
||||
break;
|
||||
}
|
||||
if ((nr % no) != 0)
|
||||
if((nr % no) != 0)
|
||||
continue;
|
||||
nor = ((not > no_max) ? no_max : not) / no;
|
||||
nore = nf_max / nf;
|
||||
if (nor > nore)
|
||||
if(nor > nore)
|
||||
nor = nore;
|
||||
noe = ceil(vco_min / fout);
|
||||
if (!max_vco)
|
||||
if(!max_vco)
|
||||
{
|
||||
nore = (noe - 1) / no + 1;
|
||||
nor = nore;
|
||||
not = 0; /* force next if to fail */
|
||||
}
|
||||
if ((((no * nor) < (not >> 1)) || ((no * nor) < noe)) && ((no * nor) < (nf_max / nf)))
|
||||
if((((no * nor) < (not >> 1)) || ((no * nor) < noe)) && ((no * nor) < (nf_max / nf)))
|
||||
{
|
||||
no = nf_max / nf;
|
||||
if (no > no_max)
|
||||
if(no > no_max)
|
||||
no = no_max;
|
||||
if (no > not)
|
||||
if(no > not)
|
||||
no = not;
|
||||
nfx *= no;
|
||||
nf *= no;
|
||||
if ((no > 1) && (!firstx))
|
||||
if((no > 1) && (!firstx))
|
||||
continue;
|
||||
/* wait for larger nf in later iterations */
|
||||
}
|
||||
else
|
||||
} else
|
||||
{
|
||||
nrx /= no;
|
||||
nfx *= nor;
|
||||
nf *= nor;
|
||||
no *= nor;
|
||||
if (no > no_max)
|
||||
if(no > no_max)
|
||||
continue;
|
||||
if ((nor > 1) && (!firstx))
|
||||
if((nor > 1) && (!firstx))
|
||||
continue;
|
||||
/* wait for larger nf in later iterations */
|
||||
}
|
||||
|
||||
nb = nfx;
|
||||
if (nb < nb_min)
|
||||
if(nb < nb_min)
|
||||
nb = nb_min;
|
||||
if (nb > nb_max)
|
||||
if(nb > nb_max)
|
||||
continue;
|
||||
|
||||
fvco = fin / ((double)nrx) * ((double)nfx);
|
||||
if (fvco < vco_min)
|
||||
if(fvco < vco_min)
|
||||
continue;
|
||||
if (fvco > vco_max)
|
||||
if(fvco > vco_max)
|
||||
continue;
|
||||
if (nf < nf_min)
|
||||
if(nf < nf_min)
|
||||
continue;
|
||||
if ((ref_rng) && (fin / ((double)nrx) < ref_min))
|
||||
if((ref_rng) && (fin / ((double)nrx) < ref_min))
|
||||
continue;
|
||||
if ((ref_rng) && (nrx > nr_max))
|
||||
if((ref_rng) && (nrx > nr_max))
|
||||
continue;
|
||||
if (!(((firstx) && (terr < 0)) || (fabs(err) < merr * (1 - 1e-6)) || ((max_vco) && (no > x_no))))
|
||||
if(!(((firstx) && (terr < 0)) || (fabs(err) < merr * (1 - 1e-6)) || ((max_vco) && (no > x_no))))
|
||||
continue;
|
||||
if ((!firstx) && (terr >= 0) && (nrx > x_nrx))
|
||||
if((!firstx) && (terr >= 0) && (nrx > x_nrx))
|
||||
continue;
|
||||
|
||||
found = 1;
|
||||
|
@ -1189,11 +1188,11 @@ static uint32_t sysctl_pll_source_set_freq(sysctl_pll_t pll, sysctl_clock_source
|
|||
x_err = err;
|
||||
first = firstx = 0;
|
||||
merr = fabs(err);
|
||||
if (terr != -1)
|
||||
if(terr != -1)
|
||||
continue;
|
||||
}
|
||||
}
|
||||
if (!found)
|
||||
if(!found)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
@ -1204,7 +1203,7 @@ static uint32_t sysctl_pll_source_set_freq(sysctl_pll_t pll, sysctl_clock_source
|
|||
nb = x_nb;
|
||||
fvco = x_fvco;
|
||||
err = x_err;
|
||||
if ((terr != -2) && (fabs(err) >= terr * (1 - 1e-6)))
|
||||
if((terr != -2) && (fabs(err) >= terr * (1 - 1e-6)))
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
@ -1217,7 +1216,7 @@ static uint32_t sysctl_pll_source_set_freq(sysctl_pll_t pll, sysctl_clock_source
|
|||
sysctl_pll1_t pll1;
|
||||
sysctl_pll2_t pll2;
|
||||
|
||||
switch (pll)
|
||||
switch(pll)
|
||||
{
|
||||
case SYSCTL_PLL0:
|
||||
/* Read register from bus */
|
||||
|
@ -1247,7 +1246,7 @@ static uint32_t sysctl_pll_source_set_freq(sysctl_pll_t pll, sysctl_clock_source
|
|||
/* Read register from bus */
|
||||
pll2 = sysctl->pll2;
|
||||
/* Set register temporary value */
|
||||
if (source < sizeof(get_select_pll2))
|
||||
if(source < sizeof(get_select_pll2))
|
||||
pll2.pll_ckin_sel2 = get_select_pll2[source];
|
||||
|
||||
pll2.clkr2 = nrx - 1;
|
||||
|
@ -1270,7 +1269,7 @@ uint32_t sysctl_clock_get_freq(sysctl_clock_t clock)
|
|||
uint32_t source = 0;
|
||||
uint32_t result = 0;
|
||||
|
||||
switch (clock)
|
||||
switch(clock)
|
||||
{
|
||||
/*
|
||||
* The clock IN0
|
||||
|
@ -1301,7 +1300,7 @@ uint32_t sysctl_clock_get_freq(sysctl_clock_t clock)
|
|||
* These clock directly under ACLK clock domain
|
||||
*/
|
||||
case SYSCTL_CLOCK_CPU:
|
||||
switch (sysctl_clock_get_clock_select(SYSCTL_CLOCK_SELECT_ACLK))
|
||||
switch(sysctl_clock_get_clock_select(SYSCTL_CLOCK_SELECT_ACLK))
|
||||
{
|
||||
case 0:
|
||||
source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_IN0);
|
||||
|
@ -1316,7 +1315,7 @@ uint32_t sysctl_clock_get_freq(sysctl_clock_t clock)
|
|||
result = source;
|
||||
break;
|
||||
case SYSCTL_CLOCK_DMA:
|
||||
switch (sysctl_clock_get_clock_select(SYSCTL_CLOCK_SELECT_ACLK))
|
||||
switch(sysctl_clock_get_clock_select(SYSCTL_CLOCK_SELECT_ACLK))
|
||||
{
|
||||
case 0:
|
||||
source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_IN0);
|
||||
|
@ -1331,7 +1330,7 @@ uint32_t sysctl_clock_get_freq(sysctl_clock_t clock)
|
|||
result = source;
|
||||
break;
|
||||
case SYSCTL_CLOCK_FFT:
|
||||
switch (sysctl_clock_get_clock_select(SYSCTL_CLOCK_SELECT_ACLK))
|
||||
switch(sysctl_clock_get_clock_select(SYSCTL_CLOCK_SELECT_ACLK))
|
||||
{
|
||||
case 0:
|
||||
source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_IN0);
|
||||
|
@ -1346,7 +1345,7 @@ uint32_t sysctl_clock_get_freq(sysctl_clock_t clock)
|
|||
result = source;
|
||||
break;
|
||||
case SYSCTL_CLOCK_ACLK:
|
||||
switch (sysctl_clock_get_clock_select(SYSCTL_CLOCK_SELECT_ACLK))
|
||||
switch(sysctl_clock_get_clock_select(SYSCTL_CLOCK_SELECT_ACLK))
|
||||
{
|
||||
case 0:
|
||||
source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_IN0);
|
||||
|
@ -1361,7 +1360,7 @@ uint32_t sysctl_clock_get_freq(sysctl_clock_t clock)
|
|||
result = source;
|
||||
break;
|
||||
case SYSCTL_CLOCK_HCLK:
|
||||
switch (sysctl_clock_get_clock_select(SYSCTL_CLOCK_SELECT_ACLK))
|
||||
switch(sysctl_clock_get_clock_select(SYSCTL_CLOCK_SELECT_ACLK))
|
||||
{
|
||||
case 0:
|
||||
source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_IN0);
|
||||
|
@ -1487,7 +1486,7 @@ uint32_t sysctl_clock_get_freq(sysctl_clock_t clock)
|
|||
* They are using even divider.
|
||||
*/
|
||||
case SYSCTL_CLOCK_SPI3:
|
||||
switch (sysctl_clock_get_clock_select(SYSCTL_CLOCK_SELECT_SPI3))
|
||||
switch(sysctl_clock_get_clock_select(SYSCTL_CLOCK_SELECT_SPI3))
|
||||
{
|
||||
case 0:
|
||||
source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_IN0);
|
||||
|
@ -1502,7 +1501,7 @@ uint32_t sysctl_clock_get_freq(sysctl_clock_t clock)
|
|||
result = source / ((sysctl_clock_get_threshold(SYSCTL_THRESHOLD_SPI3) + 1) * 2);
|
||||
break;
|
||||
case SYSCTL_CLOCK_TIMER0:
|
||||
switch (sysctl_clock_get_clock_select(SYSCTL_CLOCK_SELECT_TIMER0))
|
||||
switch(sysctl_clock_get_clock_select(SYSCTL_CLOCK_SELECT_TIMER0))
|
||||
{
|
||||
case 0:
|
||||
source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_IN0);
|
||||
|
@ -1517,7 +1516,7 @@ uint32_t sysctl_clock_get_freq(sysctl_clock_t clock)
|
|||
result = source / ((sysctl_clock_get_threshold(SYSCTL_THRESHOLD_TIMER0) + 1) * 2);
|
||||
break;
|
||||
case SYSCTL_CLOCK_TIMER1:
|
||||
switch (sysctl_clock_get_clock_select(SYSCTL_CLOCK_SELECT_TIMER1))
|
||||
switch(sysctl_clock_get_clock_select(SYSCTL_CLOCK_SELECT_TIMER1))
|
||||
{
|
||||
case 0:
|
||||
source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_IN0);
|
||||
|
@ -1532,7 +1531,7 @@ uint32_t sysctl_clock_get_freq(sysctl_clock_t clock)
|
|||
result = source / ((sysctl_clock_get_threshold(SYSCTL_THRESHOLD_TIMER1) + 1) * 2);
|
||||
break;
|
||||
case SYSCTL_CLOCK_TIMER2:
|
||||
switch (sysctl_clock_get_clock_select(SYSCTL_CLOCK_SELECT_TIMER2))
|
||||
switch(sysctl_clock_get_clock_select(SYSCTL_CLOCK_SELECT_TIMER2))
|
||||
{
|
||||
case 0:
|
||||
source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_IN0);
|
||||
|
@ -1619,7 +1618,7 @@ int sysctl_dma_select(sysctl_dma_channel_t channel, sysctl_dma_select_t select)
|
|||
/* Read register from bus */
|
||||
dma_sel0 = sysctl->dma_sel0;
|
||||
dma_sel1 = sysctl->dma_sel1;
|
||||
switch (channel)
|
||||
switch(channel)
|
||||
{
|
||||
case SYSCTL_DMA_CHANNEL_0:
|
||||
dma_sel0.dma_sel0 = select;
|
||||
|
@ -1700,11 +1699,11 @@ uint32_t sysctl_pll_fast_enable_pll(void)
|
|||
sysctl_pll_enable(SYSCTL_PLL1);
|
||||
sysctl_pll_enable(SYSCTL_PLL2);
|
||||
|
||||
while (sysctl_pll_is_lock(SYSCTL_PLL0) == 0)
|
||||
while(sysctl_pll_is_lock(SYSCTL_PLL0) == 0)
|
||||
sysctl_pll_clear_slip(SYSCTL_PLL0);
|
||||
while (sysctl_pll_is_lock(SYSCTL_PLL1) == 0)
|
||||
while(sysctl_pll_is_lock(SYSCTL_PLL1) == 0)
|
||||
sysctl_pll_clear_slip(SYSCTL_PLL1);
|
||||
while (sysctl_pll_is_lock(SYSCTL_PLL2) == 0)
|
||||
while(sysctl_pll_is_lock(SYSCTL_PLL2) == 0)
|
||||
sysctl_pll_clear_slip(SYSCTL_PLL2);
|
||||
|
||||
sysctl_clock_enable(SYSCTL_CLOCK_PLL0);
|
||||
|
@ -1783,7 +1782,7 @@ uint32_t sysctl_pll_set_freq(sysctl_pll_t pll, uint32_t pll_freq)
|
|||
v_pll_t->pll_reset = 0;
|
||||
|
||||
/* 7. Get lock status, wait PLL stable */
|
||||
while (sysctl_pll_is_lock(pll) == 0)
|
||||
while(sysctl_pll_is_lock(pll) == 0)
|
||||
sysctl_pll_clear_slip(pll);
|
||||
|
||||
/* 8. Enable PLL output */
|
||||
|
@ -1843,16 +1842,13 @@ sysctl_reset_enum_status_t sysctl_get_reset_status(void)
|
|||
if(sysctl->reset_status.wdt0_reset_sts)
|
||||
{
|
||||
s_reset_status = SYSCTL_RESET_STATUS_WDT0;
|
||||
}
|
||||
else if(sysctl->reset_status.wdt1_reset_sts)
|
||||
} else if(sysctl->reset_status.wdt1_reset_sts)
|
||||
{
|
||||
s_reset_status = SYSCTL_RESET_STATUS_WDT1;
|
||||
}
|
||||
else if(sysctl->reset_status.soft_reset_sts)
|
||||
} else if(sysctl->reset_status.soft_reset_sts)
|
||||
{
|
||||
s_reset_status = SYSCTL_RESET_STATUS_SOFT;
|
||||
}
|
||||
else
|
||||
} else
|
||||
{
|
||||
s_reset_status = SYSCTL_RESET_STATUS_HARD;
|
||||
}
|
||||
|
@ -1860,4 +1856,3 @@ sysctl_reset_enum_status_t sysctl_get_reset_status(void)
|
|||
|
||||
return s_reset_status;
|
||||
}
|
||||
|
||||
|
|
|
@ -14,12 +14,12 @@
|
|||
*/
|
||||
|
||||
#include <syslog.h>
|
||||
#include "timer.h"
|
||||
#include "sysctl.h"
|
||||
#include "stddef.h"
|
||||
#include "utils.h"
|
||||
#include "plic.h"
|
||||
#include "io.h"
|
||||
#include "plic.h"
|
||||
#include "stddef.h"
|
||||
#include "sysctl.h"
|
||||
#include "timer.h"
|
||||
#include "utils.h"
|
||||
|
||||
/**
|
||||
* @brief Private definitions for the timer instance
|
||||
|
@ -34,16 +34,15 @@ typedef struct timer_instance
|
|||
volatile timer_instance_t timer_instance[TIMER_DEVICE_MAX][TIMER_CHANNEL_MAX];
|
||||
|
||||
volatile kendryte_timer_t *const timer[3] =
|
||||
{
|
||||
{
|
||||
(volatile kendryte_timer_t *)TIMER0_BASE_ADDR,
|
||||
(volatile kendryte_timer_t *)TIMER1_BASE_ADDR,
|
||||
(volatile kendryte_timer_t *)TIMER2_BASE_ADDR
|
||||
};
|
||||
(volatile kendryte_timer_t *)TIMER2_BASE_ADDR};
|
||||
|
||||
void timer_init(timer_device_number_t timer_number)
|
||||
{
|
||||
for(size_t i = 0; i < TIMER_CHANNEL_MAX; i++)
|
||||
timer_instance[timer_number][i] = (const timer_instance_t) {
|
||||
timer_instance[timer_number][i] = (const timer_instance_t){
|
||||
.callback = NULL,
|
||||
.ctx = NULL,
|
||||
.single_shot = 0,
|
||||
|
@ -54,9 +53,7 @@ void timer_init(timer_device_number_t timer_number)
|
|||
|
||||
void timer_set_clock_div(timer_device_number_t timer_number, uint32_t div)
|
||||
{
|
||||
sysctl_clock_set_threshold(timer_number == 0 ? SYSCTL_THRESHOLD_TIMER0 :
|
||||
timer_number == 1 ? SYSCTL_THRESHOLD_TIMER1 :
|
||||
SYSCTL_THRESHOLD_TIMER2, div);
|
||||
sysctl_clock_set_threshold(timer_number == 0 ? SYSCTL_THRESHOLD_TIMER0 : timer_number == 1 ? SYSCTL_THRESHOLD_TIMER1 : SYSCTL_THRESHOLD_TIMER2, div);
|
||||
}
|
||||
|
||||
void timer_enable(timer_device_number_t timer_number, timer_channel_number_t channel)
|
||||
|
@ -147,7 +144,7 @@ void timer_channel_clear_interrupt(timer_device_number_t timer_number, timer_cha
|
|||
|
||||
void timer_set_enable(timer_device_number_t timer_number, timer_channel_number_t channel, uint32_t enable)
|
||||
{
|
||||
if (enable)
|
||||
if(enable)
|
||||
timer[timer_number]->channel[channel].control = TIMER_CR_USER_MODE | TIMER_CR_ENABLE;
|
||||
else
|
||||
timer[timer_number]->channel[channel].control = TIMER_CR_INTERRUPT_MASK;
|
||||
|
@ -164,25 +161,25 @@ size_t timer_set_interval(timer_device_number_t timer_number, timer_channel_numb
|
|||
return (size_t)(min_step * value);
|
||||
}
|
||||
|
||||
typedef void(*timer_ontick)();
|
||||
timer_ontick time_irq[3][4] = { NULL };
|
||||
typedef void (*timer_ontick)();
|
||||
timer_ontick time_irq[3][4] = {NULL};
|
||||
|
||||
static int timer_isr(void *parm)
|
||||
{
|
||||
uint32_t timer_number;
|
||||
for (timer_number = 0; timer_number < 3; timer_number++)
|
||||
for(timer_number = 0; timer_number < 3; timer_number++)
|
||||
{
|
||||
if (parm == timer[timer_number])
|
||||
if(parm == timer[timer_number])
|
||||
break;
|
||||
}
|
||||
|
||||
uint32_t channel = timer[timer_number]->intr_stat;
|
||||
size_t i = 0;
|
||||
for (i = 0; i < 4; i++)
|
||||
for(i = 0; i < 4; i++)
|
||||
{
|
||||
if (channel & 1)
|
||||
if(channel & 1)
|
||||
{
|
||||
if (time_irq[timer_number][i])
|
||||
if(time_irq[timer_number][i])
|
||||
(time_irq[timer_number][i])();
|
||||
break;
|
||||
}
|
||||
|
@ -194,16 +191,15 @@ static int timer_isr(void *parm)
|
|||
return 0;
|
||||
}
|
||||
|
||||
void timer_set_irq(timer_device_number_t timer_number, timer_channel_number_t channel, void(*func)(), uint32_t priority)
|
||||
void timer_set_irq(timer_device_number_t timer_number, timer_channel_number_t channel, void (*func)(), uint32_t priority)
|
||||
{
|
||||
time_irq[timer_number][channel] = func;
|
||||
if (channel < 2)
|
||||
if(channel < 2)
|
||||
{
|
||||
plic_set_priority(IRQN_TIMER0A_INTERRUPT + timer_number * 2, priority);
|
||||
plic_irq_register(IRQN_TIMER0A_INTERRUPT + timer_number * 2, timer_isr, (void *)timer[timer_number]);
|
||||
plic_irq_enable(IRQN_TIMER0A_INTERRUPT + timer_number * 2);
|
||||
}
|
||||
else
|
||||
} else
|
||||
{
|
||||
plic_set_priority(IRQN_TIMER0B_INTERRUPT + timer_number * 2, priority);
|
||||
plic_irq_register(IRQN_TIMER0B_INTERRUPT + timer_number * 2, timer_isr, (void *)timer[timer_number]);
|
||||
|
@ -221,7 +217,8 @@ void timer_set_irq(timer_device_number_t timer_number, timer_channel_number_t ch
|
|||
*/
|
||||
static plic_irq_t get_timer_irqn_by_device_and_channel(timer_device_number_t device, timer_channel_number_t channel)
|
||||
{
|
||||
if (device < TIMER_DEVICE_MAX && channel < TIMER_CHANNEL_MAX) {
|
||||
if(device < TIMER_DEVICE_MAX && channel < TIMER_CHANNEL_MAX)
|
||||
{
|
||||
/*
|
||||
* Select timer interrupt part
|
||||
* Hierarchy of Timer interrupt to PLIC
|
||||
|
@ -256,11 +253,12 @@ static plic_irq_t get_timer_irqn_by_device_and_channel(timer_device_number_t dev
|
|||
* +---------+ +-----------+
|
||||
*
|
||||
*/
|
||||
if (channel < 2) {
|
||||
if(channel < 2)
|
||||
{
|
||||
/* It is part A interrupt, offset + 0 */
|
||||
return IRQN_TIMER0A_INTERRUPT + device * 2;
|
||||
}
|
||||
else {
|
||||
} else
|
||||
{
|
||||
/* It is part B interrupt, offset + 1 */
|
||||
return IRQN_TIMER0B_INTERRUPT + device * 2;
|
||||
}
|
||||
|
@ -280,16 +278,18 @@ static int timer_interrupt_handler(timer_device_number_t device, void *ctx)
|
|||
{
|
||||
uint32_t channel_int_stat = timer[device]->intr_stat;
|
||||
|
||||
for (size_t i = 0; i < TIMER_CHANNEL_MAX; i++)
|
||||
for(size_t i = 0; i < TIMER_CHANNEL_MAX; i++)
|
||||
{
|
||||
/* Check every bit for interrupt status */
|
||||
if (channel_int_stat & 1)
|
||||
if(channel_int_stat & 1)
|
||||
{
|
||||
if(timer_instance[device][i].callback)
|
||||
{
|
||||
if (timer_instance[device][i].callback) {
|
||||
/* Process user callback function */
|
||||
timer_instance[device][i].callback(timer_instance[device][i].ctx);
|
||||
/* Check if this timer is a single shot timer */
|
||||
if (timer_instance[device][i].single_shot) {
|
||||
if(timer_instance[device][i].single_shot)
|
||||
{
|
||||
/* Single shot timer, disable it */
|
||||
timer_set_enable(device, i, 0);
|
||||
}
|
||||
|
@ -347,7 +347,8 @@ static int timer2_interrupt_callback(void *ctx)
|
|||
|
||||
int timer_irq_register(timer_device_number_t device, timer_channel_number_t channel, int is_single_shot, uint32_t priority, timer_callback_t callback, void *ctx)
|
||||
{
|
||||
if (device < TIMER_DEVICE_MAX && channel < TIMER_CHANNEL_MAX) {
|
||||
if(device < TIMER_DEVICE_MAX && channel < TIMER_CHANNEL_MAX)
|
||||
{
|
||||
plic_irq_t irq_number = get_timer_irqn_by_device_and_channel(device, channel);
|
||||
plic_irq_callback_t plic_irq_callback[TIMER_DEVICE_MAX] = {
|
||||
timer0_interrupt_callback,
|
||||
|
@ -355,7 +356,7 @@ int timer_irq_register(timer_device_number_t device, timer_channel_number_t chan
|
|||
timer2_interrupt_callback,
|
||||
};
|
||||
|
||||
timer_instance[device][channel] = (const timer_instance_t) {
|
||||
timer_instance[device][channel] = (const timer_instance_t){
|
||||
.callback = callback,
|
||||
.ctx = ctx,
|
||||
.single_shot = is_single_shot,
|
||||
|
@ -370,18 +371,20 @@ int timer_irq_register(timer_device_number_t device, timer_channel_number_t chan
|
|||
|
||||
int timer_irq_unregister(timer_device_number_t device, timer_channel_number_t channel)
|
||||
{
|
||||
if (device < TIMER_DEVICE_MAX && channel < TIMER_CHANNEL_MAX) {
|
||||
timer_instance[device][channel] = (const timer_instance_t) {
|
||||
if(device < TIMER_DEVICE_MAX && channel < TIMER_CHANNEL_MAX)
|
||||
{
|
||||
timer_instance[device][channel] = (const timer_instance_t){
|
||||
.callback = NULL,
|
||||
.ctx = NULL,
|
||||
.single_shot = 0,
|
||||
};
|
||||
|
||||
/* Combine 0 and 1 to A interrupt, 2 and 3 to B interrupt */
|
||||
if ((!(timer_instance[device][TIMER_CHANNEL_0].callback ||
|
||||
if((!(timer_instance[device][TIMER_CHANNEL_0].callback ||
|
||||
timer_instance[device][TIMER_CHANNEL_1].callback)) ||
|
||||
(!(timer_instance[device][TIMER_CHANNEL_2].callback ||
|
||||
timer_instance[device][TIMER_CHANNEL_3].callback))) {
|
||||
timer_instance[device][TIMER_CHANNEL_3].callback)))
|
||||
{
|
||||
plic_irq_t irq_number = get_timer_irqn_by_device_and_channel(device, channel);
|
||||
plic_irq_unregister(irq_number);
|
||||
}
|
||||
|
|
|
@ -12,23 +12,22 @@
|
|||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
#include <stdlib.h>
|
||||
#include <stdint.h>
|
||||
#include <stdlib.h>
|
||||
#include "atomic.h"
|
||||
#include "plic.h"
|
||||
#include "syscalls.h"
|
||||
#include "sysctl.h"
|
||||
#include "uart.h"
|
||||
#include "utils.h"
|
||||
#include "atomic.h"
|
||||
#include "syscalls.h"
|
||||
|
||||
#define __UART_BRATE_CONST 16
|
||||
|
||||
volatile uart_t* const uart[3] =
|
||||
{
|
||||
(volatile uart_t*)UART1_BASE_ADDR,
|
||||
(volatile uart_t*)UART2_BASE_ADDR,
|
||||
(volatile uart_t*)UART3_BASE_ADDR
|
||||
};
|
||||
volatile uart_t *const uart[3] =
|
||||
{
|
||||
(volatile uart_t *)UART1_BASE_ADDR,
|
||||
(volatile uart_t *)UART2_BASE_ADDR,
|
||||
(volatile uart_t *)UART3_BASE_ADDR};
|
||||
|
||||
#define UART_INTERRUPT_SEND 0x02U
|
||||
#define UART_INTERRUPT_RECEIVE 0x04U
|
||||
|
@ -87,8 +86,7 @@ static int uart_irq_callback(void *param)
|
|||
{
|
||||
if(uart_instance->uart_send_instance.callback != NULL)
|
||||
uart_instance->uart_send_instance.callback(uart_instance->uart_send_instance.ctx);
|
||||
}
|
||||
else if(v_int_status == UART_INTERRUPT_RECEIVE || v_int_status == UART_INTERRUPT_CHARACTER_TIMEOUT)
|
||||
} else if(v_int_status == UART_INTERRUPT_RECEIVE || v_int_status == UART_INTERRUPT_CHARACTER_TIMEOUT)
|
||||
{
|
||||
if(uart_instance->uart_receive_instance.callback != NULL)
|
||||
uart_instance->uart_receive_instance.callback(uart_instance->uart_receive_instance.ctx);
|
||||
|
@ -100,7 +98,7 @@ static uart_device_number_t s_uart_debug_channel = UART_DEVICE_3;
|
|||
|
||||
static int uart_channel_putc(char c, uart_device_number_t channel)
|
||||
{
|
||||
while (uart[channel]->LSR & (1u << 5))
|
||||
while(uart[channel]->LSR & (1u << 5))
|
||||
continue;
|
||||
uart[channel]->THR = c;
|
||||
return c & 0xff;
|
||||
|
@ -109,7 +107,7 @@ static int uart_channel_putc(char c, uart_device_number_t channel)
|
|||
static int uart_channel_getc(uart_device_number_t channel)
|
||||
{
|
||||
/* If received empty */
|
||||
if (!(uart[channel]->LSR & 1))
|
||||
if(!(uart[channel]->LSR & 1))
|
||||
return EOF;
|
||||
else
|
||||
return (char)(uart[channel]->RBR & 0xff);
|
||||
|
@ -140,8 +138,7 @@ void uart_debug_init(uart_device_number_t uart_channel)
|
|||
{
|
||||
sys_register_getchar(uart_debug_getchar);
|
||||
sys_register_putchar(uart_debug_putchar);
|
||||
}
|
||||
else
|
||||
} else
|
||||
{
|
||||
if(sys_getchar == NULL)
|
||||
sys_register_getchar(uart_debug_getchar);
|
||||
|
@ -175,7 +172,7 @@ static int uart_dma_callback(void *ctx)
|
|||
int uart_receive_data(uart_device_number_t channel, char *buffer, size_t buf_len)
|
||||
{
|
||||
size_t i = 0;
|
||||
for(i = 0;i < buf_len; i++)
|
||||
for(i = 0; i < buf_len; i++)
|
||||
{
|
||||
if(uart[channel]->LSR & 1)
|
||||
buffer[i] = (char)(uart[channel]->RBR & 0xff);
|
||||
|
@ -188,7 +185,7 @@ int uart_receive_data(uart_device_number_t channel, char *buffer, size_t buf_len
|
|||
void uart_receive_data_dma(uart_device_number_t uart_channel, dmac_channel_number_t dmac_channel, uint8_t *buffer, size_t buf_len)
|
||||
{
|
||||
uint32_t *v_recv_buf = malloc(buf_len * sizeof(uint32_t));
|
||||
configASSERT(v_recv_buf!=NULL);
|
||||
configASSERT(v_recv_buf != NULL);
|
||||
|
||||
sysctl_dma_select((sysctl_dma_channel_t)dmac_channel, SYSCTL_DMA_SELECT_UART1_RX_REQ + uart_channel * 2);
|
||||
dmac_set_single_mode(dmac_channel, (void *)(&uart[uart_channel]->RBR), v_recv_buf, DMAC_ADDR_NOCHANGE, DMAC_ADDR_INCREMENT,
|
||||
|
@ -206,7 +203,7 @@ void uart_receive_data_dma_irq(uart_device_number_t uart_channel, dmac_channel_n
|
|||
void *ctx, uint32_t priority)
|
||||
{
|
||||
uint32_t *v_recv_buf = malloc(buf_len * sizeof(uint32_t));
|
||||
configASSERT(v_recv_buf!=NULL);
|
||||
configASSERT(v_recv_buf != NULL);
|
||||
|
||||
uart_recv_dma_instance[uart_channel].dmac_channel = dmac_channel;
|
||||
uart_recv_dma_instance[uart_channel].uart_num = uart_channel;
|
||||
|
@ -226,7 +223,7 @@ void uart_receive_data_dma_irq(uart_device_number_t uart_channel, dmac_channel_n
|
|||
int uart_send_data(uart_device_number_t channel, const char *buffer, size_t buf_len)
|
||||
{
|
||||
g_write_count = 0;
|
||||
while (g_write_count < buf_len)
|
||||
while(g_write_count < buf_len)
|
||||
{
|
||||
uart_channel_putc(*buffer++, channel);
|
||||
g_write_count++;
|
||||
|
@ -237,7 +234,7 @@ int uart_send_data(uart_device_number_t channel, const char *buffer, size_t buf_
|
|||
void uart_send_data_dma(uart_device_number_t uart_channel, dmac_channel_number_t dmac_channel, const uint8_t *buffer, size_t buf_len)
|
||||
{
|
||||
uint32_t *v_send_buf = malloc(buf_len * sizeof(uint32_t));
|
||||
configASSERT(v_send_buf!=NULL);
|
||||
configASSERT(v_send_buf != NULL);
|
||||
for(uint32_t i = 0; i < buf_len; i++)
|
||||
v_send_buf[i] = buffer[i];
|
||||
sysctl_dma_select((sysctl_dma_channel_t)dmac_channel, SYSCTL_DMA_SELECT_UART1_TX_REQ + uart_channel * 2);
|
||||
|
@ -252,9 +249,9 @@ void uart_send_data_dma_irq(uart_device_number_t uart_channel, dmac_channel_numb
|
|||
void *ctx, uint32_t priority)
|
||||
{
|
||||
uint32_t *v_send_buf = malloc(buf_len * sizeof(uint32_t));
|
||||
configASSERT(v_send_buf!=NULL);
|
||||
configASSERT(v_send_buf != NULL);
|
||||
|
||||
uart_send_dma_instance[uart_channel] = (uart_dma_instance_t) {
|
||||
uart_send_dma_instance[uart_channel] = (uart_dma_instance_t){
|
||||
.dmac_channel = dmac_channel,
|
||||
.uart_num = uart_channel,
|
||||
.malloc_buffer = v_send_buf,
|
||||
|
@ -271,24 +268,22 @@ void uart_send_data_dma_irq(uart_device_number_t uart_channel, dmac_channel_numb
|
|||
sysctl_dma_select((sysctl_dma_channel_t)dmac_channel, SYSCTL_DMA_SELECT_UART1_TX_REQ + uart_channel * 2);
|
||||
dmac_set_single_mode(dmac_channel, v_send_buf, (void *)(&uart[uart_channel]->THR), DMAC_ADDR_INCREMENT, DMAC_ADDR_NOCHANGE,
|
||||
DMAC_MSIZE_1, DMAC_TRANS_WIDTH_32, buf_len);
|
||||
|
||||
}
|
||||
|
||||
void uart_configure(uart_device_number_t channel, uint32_t baud_rate, uart_bitwidth_t data_width, uart_stopbit_t stopbit, uart_parity_t parity)
|
||||
{
|
||||
configASSERT(data_width >= 5 && data_width <= 8);
|
||||
if (data_width == 5)
|
||||
if(data_width == 5)
|
||||
{
|
||||
configASSERT(stopbit != UART_STOP_2);
|
||||
}
|
||||
else
|
||||
} else
|
||||
{
|
||||
configASSERT(stopbit != UART_STOP_1_5);
|
||||
}
|
||||
|
||||
uint32_t stopbit_val = stopbit == UART_STOP_1 ? 0 : 1;
|
||||
uint32_t parity_val;
|
||||
switch (parity)
|
||||
switch(parity)
|
||||
{
|
||||
case UART_PARITY_NONE:
|
||||
parity_val = 0;
|
||||
|
@ -349,8 +344,7 @@ void uart_irq_register(uart_device_number_t channel, uart_interrupt_mode_t inter
|
|||
uart[channel]->IER |= 0x2;
|
||||
g_uart_instance[channel].uart_send_instance.callback = uart_callback;
|
||||
g_uart_instance[channel].uart_send_instance.ctx = ctx;
|
||||
}
|
||||
else if(interrupt_mode == UART_RECEIVE)
|
||||
} else if(interrupt_mode == UART_RECEIVE)
|
||||
{
|
||||
uart[channel]->IER |= 0x1;
|
||||
g_uart_instance[channel].uart_receive_instance.callback = uart_callback;
|
||||
|
@ -369,8 +363,7 @@ void uart_irq_unregister(uart_device_number_t channel, uart_interrupt_mode_t int
|
|||
uart[channel]->IER &= ~(0x2);
|
||||
g_uart_instance[channel].uart_send_instance.callback = NULL;
|
||||
g_uart_instance[channel].uart_send_instance.ctx = NULL;
|
||||
}
|
||||
else if(interrupt_mode == UART_RECEIVE)
|
||||
} else if(interrupt_mode == UART_RECEIVE)
|
||||
{
|
||||
uart[channel]->IER &= ~(0x1);
|
||||
g_uart_instance[channel].uart_receive_instance.callback = NULL;
|
||||
|
@ -388,7 +381,8 @@ int uart_dma_irq(void *ctx)
|
|||
dmac_irq_unregister(v_instance->dmac_channel);
|
||||
if(v_instance->transfer_mode == UART_SEND)
|
||||
{
|
||||
while(!(uart[v_instance->uart_num]->LSR & (1u << 6)));
|
||||
while(!(uart[v_instance->uart_num]->LSR & (1u << 6)))
|
||||
;
|
||||
}
|
||||
spinlock_unlock(&v_instance->lock);
|
||||
if(v_instance->uart_int_instance.callback)
|
||||
|
@ -398,7 +392,7 @@ int uart_dma_irq(void *ctx)
|
|||
return 0;
|
||||
}
|
||||
|
||||
void uart_handle_data_dma(uart_device_number_t uart_channel ,uart_data_t data, plic_interrupt_t *cb)
|
||||
void uart_handle_data_dma(uart_device_number_t uart_channel, uart_data_t data, plic_interrupt_t *cb)
|
||||
{
|
||||
configASSERT(uart_channel < UART_DEVICE_MAX);
|
||||
if(data.transfer_mode == UART_SEND)
|
||||
|
@ -419,11 +413,11 @@ void uart_handle_data_dma(uart_device_number_t uart_channel ,uart_data_t data, p
|
|||
if(!cb)
|
||||
{
|
||||
dmac_wait_done(data.tx_channel);
|
||||
while(!(uart[uart_channel]->LSR & (1u << 6)));
|
||||
while(!(uart[uart_channel]->LSR & (1u << 6)))
|
||||
;
|
||||
spinlock_unlock(&g_uart_send_instance_dma[uart_channel].lock);
|
||||
}
|
||||
}
|
||||
else
|
||||
} else
|
||||
{
|
||||
configASSERT(data.rx_buf && data.rx_len && data.rx_channel < DMAC_CHANNEL_MAX);
|
||||
spinlock_lock(&g_uart_recv_instance_dma[uart_channel].lock);
|
||||
|
@ -518,13 +512,13 @@ void uart_set_det(uart_device_number_t uart_channel, uart_det_mode_t det_mode, s
|
|||
switch(det_mode)
|
||||
{
|
||||
case UART_DE_ASSERTION:
|
||||
det ->de_assertion_time = v_clk_cnt;
|
||||
det->de_assertion_time = v_clk_cnt;
|
||||
break;
|
||||
case UART_DE_DE_ASSERTION:
|
||||
det->de_de_assertion_time = v_clk_cnt;
|
||||
break;
|
||||
default:
|
||||
det ->de_assertion_time = v_clk_cnt;
|
||||
det->de_assertion_time = v_clk_cnt;
|
||||
det->de_de_assertion_time = v_clk_cnt;
|
||||
break;
|
||||
}
|
||||
|
@ -551,4 +545,3 @@ void uart_set_tat(uart_device_number_t uart_channel, uart_tat_mode_t tat_mode, s
|
|||
break;
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
@ -15,9 +15,9 @@
|
|||
|
||||
#include <stdint.h>
|
||||
#include <stdio.h>
|
||||
#include "uarths.h"
|
||||
#include "sysctl.h"
|
||||
#include "encoding.h"
|
||||
#include "sysctl.h"
|
||||
#include "uarths.h"
|
||||
|
||||
volatile uarths_t *const uarths = (volatile uarths_t *)UARTHS_BASE_ADDR;
|
||||
|
||||
|
@ -93,7 +93,7 @@ void uarths_set_irq(uarths_interrupt_mode_t interrupt_mode, plic_irq_callback_t
|
|||
|
||||
int uarths_putchar(char c)
|
||||
{
|
||||
while (uarths->txdata.full)
|
||||
while(uarths->txdata.full)
|
||||
continue;
|
||||
uarths->txdata.data = (uint8_t)c;
|
||||
|
||||
|
@ -105,14 +105,14 @@ int uarths_getchar(void)
|
|||
/* while not empty */
|
||||
uarths_rxdata_t recv = uarths->rxdata;
|
||||
|
||||
if (recv.empty)
|
||||
if(recv.empty)
|
||||
return EOF;
|
||||
else
|
||||
return (recv.data & 0xff);
|
||||
}
|
||||
|
||||
/* [Deprecated] this function will remove in future */
|
||||
int uarths_getc(void) __attribute__ ((weak, alias ("uarths_getchar")));
|
||||
int uarths_getc(void) __attribute__((weak, alias("uarths_getchar")));
|
||||
|
||||
size_t uarths_receive_data(uint8_t *buf, size_t buf_len)
|
||||
{
|
||||
|
@ -131,7 +131,7 @@ size_t uarths_receive_data(uint8_t *buf, size_t buf_len)
|
|||
size_t uarths_send_data(const uint8_t *buf, size_t buf_len)
|
||||
{
|
||||
size_t write = 0;
|
||||
while (write < buf_len)
|
||||
while(write < buf_len)
|
||||
{
|
||||
uarths_putchar(*buf++);
|
||||
write++;
|
||||
|
@ -141,8 +141,8 @@ size_t uarths_send_data(const uint8_t *buf, size_t buf_len)
|
|||
|
||||
int uarths_puts(const char *s)
|
||||
{
|
||||
while (*s)
|
||||
if (uarths_putchar(*s++) != 0)
|
||||
while(*s)
|
||||
if(uarths_putchar(*s++) != 0)
|
||||
return -1;
|
||||
return 0;
|
||||
}
|
||||
|
@ -171,4 +171,3 @@ void uarths_config(uint32_t baud_rate, uarths_stopbit_t stopbit)
|
|||
uarths->div.div = div;
|
||||
uarths->txctrl.nstop = stopbit;
|
||||
}
|
||||
|
||||
|
|
|
@ -41,4 +41,3 @@ uint32_t get_gpio_bit(volatile uint32_t *bits, size_t offset)
|
|||
{
|
||||
return get_bit(bits, 1, offset);
|
||||
}
|
||||
|
||||
|
|
|
@ -12,19 +12,18 @@
|
|||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
#include "wdt.h"
|
||||
#include "platform.h"
|
||||
#include "stddef.h"
|
||||
#include "utils.h"
|
||||
#include "sysctl.h"
|
||||
#include "plic.h"
|
||||
#include "math.h"
|
||||
#include "platform.h"
|
||||
#include "plic.h"
|
||||
#include "stddef.h"
|
||||
#include "sysctl.h"
|
||||
#include "utils.h"
|
||||
#include "wdt.h"
|
||||
|
||||
volatile wdt_t *const wdt[2] =
|
||||
{
|
||||
{
|
||||
(volatile wdt_t *)WDT0_BASE_ADDR,
|
||||
(volatile wdt_t *)WDT1_BASE_ADDR
|
||||
};
|
||||
(volatile wdt_t *)WDT1_BASE_ADDR};
|
||||
|
||||
static void wdt_enable(wdt_device_number_t id)
|
||||
{
|
||||
|
@ -58,9 +57,9 @@ static uint8_t wdt_get_top(wdt_device_number_t id, uint64_t timeout_ms)
|
|||
{
|
||||
uint64_t wdt_clk = wdt_get_pclk(id);
|
||||
uint64_t ret = (timeout_ms * wdt_clk / 1000) >> 16;
|
||||
if (ret)
|
||||
if(ret)
|
||||
ret = (uint32_t)log2(ret);
|
||||
if (ret > 0xf)
|
||||
if(ret > 0xf)
|
||||
ret = 0xf;
|
||||
return (uint8_t)ret;
|
||||
}
|
||||
|
@ -112,4 +111,3 @@ void wdt_stop(wdt_device_number_t id)
|
|||
{
|
||||
wdt_disable(id);
|
||||
}
|
||||
|
||||
|
|
|
@ -17,8 +17,8 @@
|
|||
|
||||
#include <stdint.h>
|
||||
#include <stdio.h>
|
||||
#include "printf.h"
|
||||
#include "encoding.h"
|
||||
#include "printf.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
|
@ -105,7 +105,7 @@ typedef enum _kendryte_log_level
|
|||
#endif /* CONFIG_LOG_COLORS */
|
||||
/* clang-format on */
|
||||
|
||||
#define LOG_FORMAT(letter, format) LOG_COLOR_ ## letter #letter " (%lu) %s: " format LOG_RESET_COLOR "\n"
|
||||
#define LOG_FORMAT(letter, format) LOG_COLOR_##letter #letter " (%lu) %s: " format LOG_RESET_COLOR "\n"
|
||||
|
||||
#ifdef LOG_LEVEL
|
||||
#undef CONFIG_LOG_LEVEL
|
||||
|
@ -119,11 +119,36 @@ typedef enum _kendryte_log_level
|
|||
#endif
|
||||
|
||||
#ifdef CONFIG_LOG_ENABLE
|
||||
#define LOGE(tag, format, ...) do {if (CONFIG_LOG_LEVEL >= LOG_ERROR) LOG_PRINTF(LOG_FORMAT(E, format), read_cycle(), tag, ##__VA_ARGS__); } while (0)
|
||||
#define LOGW(tag, format, ...) do {if (CONFIG_LOG_LEVEL >= LOG_WARN) LOG_PRINTF(LOG_FORMAT(W, format), read_cycle(), tag, ##__VA_ARGS__); } while (0)
|
||||
#define LOGI(tag, format, ...) do {if (CONFIG_LOG_LEVEL >= LOG_INFO) LOG_PRINTF(LOG_FORMAT(I, format), read_cycle(), tag, ##__VA_ARGS__); } while (0)
|
||||
#define LOGD(tag, format, ...) do {if (CONFIG_LOG_LEVEL >= LOG_DEBUG) LOG_PRINTF(LOG_FORMAT(D, format), read_cycle(), tag, ##__VA_ARGS__); } while (0)
|
||||
#define LOGV(tag, format, ...) do {if (CONFIG_LOG_LEVEL >= LOG_VERBOSE) LOG_PRINTF(LOG_FORMAT(V, format), read_cycle(), tag, ##__VA_ARGS__); } while (0)
|
||||
#define LOGE(tag, format, ...) \
|
||||
do \
|
||||
{ \
|
||||
if(CONFIG_LOG_LEVEL >= LOG_ERROR) \
|
||||
LOG_PRINTF(LOG_FORMAT(E, format), read_cycle(), tag, ##__VA_ARGS__); \
|
||||
} while(0)
|
||||
#define LOGW(tag, format, ...) \
|
||||
do \
|
||||
{ \
|
||||
if(CONFIG_LOG_LEVEL >= LOG_WARN) \
|
||||
LOG_PRINTF(LOG_FORMAT(W, format), read_cycle(), tag, ##__VA_ARGS__); \
|
||||
} while(0)
|
||||
#define LOGI(tag, format, ...) \
|
||||
do \
|
||||
{ \
|
||||
if(CONFIG_LOG_LEVEL >= LOG_INFO) \
|
||||
LOG_PRINTF(LOG_FORMAT(I, format), read_cycle(), tag, ##__VA_ARGS__); \
|
||||
} while(0)
|
||||
#define LOGD(tag, format, ...) \
|
||||
do \
|
||||
{ \
|
||||
if(CONFIG_LOG_LEVEL >= LOG_DEBUG) \
|
||||
LOG_PRINTF(LOG_FORMAT(D, format), read_cycle(), tag, ##__VA_ARGS__); \
|
||||
} while(0)
|
||||
#define LOGV(tag, format, ...) \
|
||||
do \
|
||||
{ \
|
||||
if(CONFIG_LOG_LEVEL >= LOG_VERBOSE) \
|
||||
LOG_PRINTF(LOG_FORMAT(V, format), read_cycle(), tag, ##__VA_ARGS__); \
|
||||
} while(0)
|
||||
#else
|
||||
#define LOGE(tag, format, ...)
|
||||
#define LOGW(tag, format, ...)
|
||||
|
@ -136,6 +161,4 @@ typedef enum _kendryte_log_level
|
|||
}
|
||||
#endif
|
||||
|
||||
|
||||
#endif /* _SYSLOG_H */
|
||||
|
||||
|
|
|
@ -0,0 +1,22 @@
|
|||
#!/bin/bash
|
||||
|
||||
_CLANG_FORMAT=${CLANG_FORMAT-"clang-format"}
|
||||
|
||||
if ! command -v "$_CLANG_FORMAT" &>/dev/null ; then
|
||||
echo "You must install clang-format and add it to your PATH." >&2
|
||||
echo " See: http://releases.llvm.org/download.html" >&2
|
||||
echo "Use CLANG_FORMAT=/path/to/clang-format if you do not want it in PATH. " >&2
|
||||
|
||||
exit 1
|
||||
fi
|
||||
|
||||
cd "$(dirname "$(realpath "${BASH_SOURCE[0]}")")"
|
||||
cd ..
|
||||
|
||||
DIFF_BEFORE=$(git diff | wc -l)
|
||||
echo "Difference before format: $DIFF_BEFORE"
|
||||
|
||||
find lib -iname *.h -o -iname *.c -o -iname *.cpp -o -iname *.hpp | xargs "$_CLANG_FORMAT" -i
|
||||
|
||||
DIFF_AFTER=$(git diff | wc -l)
|
||||
echo "Difference after format: $DIFF_AFTER (delta: $(($DIFF_BEFORE - $DIFF_AFTER)))"
|
Loading…
Reference in New Issue